Lines Matching +full:r5f +full:- +full:0

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721s2.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
14 bootph-all;
16 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
17 <0x00000008 0x80000000 0x00000003 0x80000000>;
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
26 reg = <0x00 0x9e800000 0x00 0x01800000>;
27 no-map;
30 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
31 compatible = "shared-dma-pool";
32 reg = <0x00 0xa0000000 0x00 0x100000>;
33 no-map;
36 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
37 compatible = "shared-dma-pool";
38 reg = <0x00 0xa0100000 0x00 0xf00000>;
39 no-map;
42 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
43 compatible = "shared-dma-pool";
44 reg = <0x00 0xa1000000 0x00 0x100000>;
45 no-map;
48 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
49 compatible = "shared-dma-pool";
50 reg = <0x00 0xa1100000 0x00 0xf00000>;
51 no-map;
54 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
55 compatible = "shared-dma-pool";
56 reg = <0x00 0xa2000000 0x00 0x100000>;
57 no-map;
60 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
61 compatible = "shared-dma-pool";
62 reg = <0x00 0xa2100000 0x00 0xf00000>;
63 no-map;
66 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
67 compatible = "shared-dma-pool";
68 reg = <0x00 0xa3000000 0x00 0x100000>;
69 no-map;
72 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
73 compatible = "shared-dma-pool";
74 reg = <0x00 0xa3100000 0x00 0xf00000>;
75 no-map;
78 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
79 compatible = "shared-dma-pool";
80 reg = <0x00 0xa4000000 0x00 0x100000>;
81 no-map;
84 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
85 compatible = "shared-dma-pool";
86 reg = <0x00 0xa4100000 0x00 0xf00000>;
87 no-map;
90 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
91 compatible = "shared-dma-pool";
92 reg = <0x00 0xa5000000 0x00 0x100000>;
93 no-map;
96 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
97 compatible = "shared-dma-pool";
98 reg = <0x00 0xa5100000 0x00 0xf00000>;
99 no-map;
102 c71_0_dma_memory_region: c71-dma-memory@a6000000 {
103 compatible = "shared-dma-pool";
104 reg = <0x00 0xa6000000 0x00 0x100000>;
105 no-map;
108 c71_0_memory_region: c71-memory@a6100000 {
109 compatible = "shared-dma-pool";
110 reg = <0x00 0xa6100000 0x00 0xf00000>;
111 no-map;
114 c71_1_dma_memory_region: c71-dma-memory@a7000000 {
115 compatible = "shared-dma-pool";
116 reg = <0x00 0xa7000000 0x00 0x100000>;
117 no-map;
120 c71_1_memory_region: c71-memory@a7100000 {
121 compatible = "shared-dma-pool";
122 reg = <0x00 0xa7100000 0x00 0xf00000>;
123 no-map;
126 rtos_ipc_memory_region: ipc-memories@a8000000 {
127 reg = <0x00 0xa8000000 0x00 0x01c00000>;
128 alignment = <0x1000>;
129 no-map;
135 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins {
136 bootph-all;
137 pinctrl-single,pins = <
138 J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
139 J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
140 J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
141 J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
142 J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
143 J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
144 J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
145 J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
146 J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
147 J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
148 J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
154 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
155 pinctrl-single,pins = <
156 J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */
157 J721S2_WKUP_IOPAD(0x09c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */
159 bootph-all;
165 pinctrl-names = "default";
166 pinctrl-0 = <&wkup_i2c0_pins_default>;
167 clock-frequency = <400000>;
170 /* AT24C512C-MAHM-T */
172 reg = <0x51>;
173 bootph-all;
179 pinctrl-names = "default";
180 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
182 flash@0 {
183 compatible = "jedec,spi-nor";
184 reg = <0x0>;
185 spi-tx-bus-width = <8>;
186 spi-rx-bus-width = <8>;
187 spi-max-frequency = <25000000>;
188 cdns,tshsl-ns = <60>;
189 cdns,tsd2d-ns = <60>;
190 cdns,tchsh-ns = <60>;
191 cdns,tslch-ns = <60>;
192 cdns,read-delay = <4>;
195 compatible = "fixed-partitions";
196 #address-cells = <1>;
197 #size-cells = <1>;
199 partition@0 {
201 reg = <0x0 0x80000>;
206 reg = <0x80000 0x200000>;
210 label = "ospi.u-boot";
211 reg = <0x280000 0x400000>;
216 reg = <0x680000 0x40000>;
221 reg = <0x6c0000 0x40000>;
226 reg = <0x800000 0x37c0000>;
231 reg = <0x3fc0000 0x40000>;
232 bootph-all;
241 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
242 ti,mbox-rx = <0 0 0>;
243 ti,mbox-tx = <1 0 0>;
246 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
247 ti,mbox-rx = <2 0 0>;
248 ti,mbox-tx = <3 0 0>;
255 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
256 ti,mbox-rx = <0 0 0>;
257 ti,mbox-tx = <1 0 0>;
260 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
261 ti,mbox-rx = <2 0 0>;
262 ti,mbox-tx = <3 0 0>;
269 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
270 ti,mbox-rx = <0 0 0>;
271 ti,mbox-tx = <1 0 0>;
274 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
275 ti,mbox-rx = <2 0 0>;
276 ti,mbox-tx = <3 0 0>;
283 mbox_c71_0: mbox-c71-0 {
284 ti,mbox-rx = <0 0 0>;
285 ti,mbox-tx = <1 0 0>;
288 mbox_c71_1: mbox-c71-1 {
289 ti,mbox-rx = <2 0 0>;
290 ti,mbox-tx = <3 0 0>;
296 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
302 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
307 ti,cluster-mode = <0>;
311 ti,cluster-mode = <0>;
341 memory-region = <&main_r5fss0_core0_dma_memory_region>,
347 memory-region = <&main_r5fss0_core1_dma_memory_region>,
353 memory-region = <&main_r5fss1_core0_dma_memory_region>,
359 memory-region = <&main_r5fss1_core1_dma_memory_region>,
366 memory-region = <&c71_0_dma_memory_region>,
373 memory-region = <&c71_1_dma_memory_region>,