Lines Matching +full:am654 +full:- +full:serdes +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
31 compatible = "arm,gic-v3";
32 #address-cells = <2>;
33 #size-cells = <2>;
35 #interrupt-cells = <3>;
36 interrupt-controller;
48 gic_its: msi-controller@1820000 {
49 compatible = "arm,gic-v3-its";
51 socionext,synquacer-pre-its = <0x1000000 0x400000>;
52 msi-controller;
53 #msi-cells = <1>;
58 compatible = "ti,j721e-esm";
60 bootph-pre-ram;
62 ti,esm-pins = <224>, <225>, <226>, <227>;
65 serdes0: serdes@900000 {
66 compatible = "ti,phy-am654-serdes";
68 reg-names = "serdes";
69 #phy-cells = <2>;
70 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
72 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
73 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
74 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
75 ti,serdes-clk = <&serdes0_clk>;
76 #clock-cells = <1>;
77 mux-controls = <&serdes0_mux 0>;
80 serdes1: serdes@910000 {
81 compatible = "ti,phy-am654-serdes";
83 reg-names = "serdes";
84 #phy-cells = <2>;
85 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
87 clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
88 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
89 assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
90 ti,serdes-clk = <&serdes1_clk>;
91 #clock-cells = <1>;
92 mux-controls = <&serdes1_mux 0>;
96 compatible = "ti,am654-uart";
99 clock-frequency = <48000000>;
100 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
105 compatible = "ti,am654-uart";
108 clock-frequency = <48000000>;
109 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
114 compatible = "ti,am654-uart";
117 clock-frequency = <48000000>;
118 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
123 compatible = "ti,am654-sa2ul";
125 power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
126 #address-cells = <2>;
127 #size-cells = <2>;
132 dma-names = "tx", "rx1", "rx2";
135 compatible = "inside-secure,safexcel-eip76";
138 status = "disabled"; /* Used by OP-TEE */
144 compatible = "pinctrl-single";
146 #pinctrl-cells = <1>;
147 pinctrl-single,register-width = <32>;
148 pinctrl-single,function-mask = <0x0000001ff>;
153 compatible = "pinctrl-single";
155 #pinctrl-cells = <1>;
156 pinctrl-single,register-width = <32>;
157 pinctrl-single,function-mask = <0x0000000f>;
161 compatible = "pinctrl-single";
163 #pinctrl-cells = <1>;
164 pinctrl-single,register-width = <32>;
165 pinctrl-single,function-mask = <0xffffffff>;
169 compatible = "pinctrl-single";
171 #pinctrl-cells = <1>;
172 pinctrl-single,register-width = <32>;
173 pinctrl-single,function-mask = <0xffffffff>;
177 compatible = "ti,am654-i2c", "ti,omap4-i2c";
180 #address-cells = <1>;
181 #size-cells = <0>;
182 clock-names = "fck";
184 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
189 compatible = "ti,am654-i2c", "ti,omap4-i2c";
192 #address-cells = <1>;
193 #size-cells = <0>;
194 clock-names = "fck";
196 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
201 compatible = "ti,am654-i2c", "ti,omap4-i2c";
204 #address-cells = <1>;
205 #size-cells = <0>;
206 clock-names = "fck";
208 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
213 compatible = "ti,am654-i2c", "ti,omap4-i2c";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 clock-names = "fck";
220 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
225 compatible = "ti,am654-ecap", "ti,am3352-ecap";
226 #pwm-cells = <3>;
228 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
230 clock-names = "fck";
235 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
239 power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
240 #address-cells = <1>;
241 #size-cells = <0>;
243 dma-names = "tx0", "rx0";
248 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
252 power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
253 #address-cells = <1>;
254 #size-cells = <0>;
255 assigned-clocks = <&k3_clks 137 1>;
256 assigned-clock-rates = <48000000>;
261 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
265 power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
266 #address-cells = <1>;
267 #size-cells = <0>;
272 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
276 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
277 #address-cells = <1>;
278 #size-cells = <0>;
283 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
287 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
288 #address-cells = <1>;
289 #size-cells = <0>;
294 compatible = "ti,am654-timer";
298 clock-names = "fck";
299 assigned-clocks = <&k3_clks 23 0>;
300 assigned-clock-parents = <&k3_clks 23 1>;
301 power-domains = <&k3_pds 23 TI_SCI_PD_EXCLUSIVE>;
302 ti,timer-pwm;
306 compatible = "ti,am654-timer";
310 clock-names = "fck";
311 assigned-clocks = <&k3_clks 24 0>;
312 assigned-clock-parents = <&k3_clks 24 1>;
313 power-domains = <&k3_pds 24 TI_SCI_PD_EXCLUSIVE>;
314 ti,timer-pwm;
318 compatible = "ti,am654-timer";
322 clock-names = "fck";
323 assigned-clocks = <&k3_clks 27 0>;
324 assigned-clock-parents = <&k3_clks 27 1>;
325 power-domains = <&k3_pds 27 TI_SCI_PD_EXCLUSIVE>;
326 ti,timer-pwm;
330 compatible = "ti,am654-timer";
334 clock-names = "fck";
335 assigned-clocks = <&k3_clks 28 0>;
336 assigned-clock-parents = <&k3_clks 28 1>;
337 power-domains = <&k3_pds 28 TI_SCI_PD_EXCLUSIVE>;
338 ti,timer-pwm;
342 compatible = "ti,am654-timer";
346 clock-names = "fck";
347 assigned-clocks = <&k3_clks 29 0>;
348 assigned-clock-parents = <&k3_clks 29 1>;
349 power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>;
350 ti,timer-pwm;
354 compatible = "ti,am654-timer";
358 clock-names = "fck";
359 assigned-clocks = <&k3_clks 30 0>;
360 assigned-clock-parents = <&k3_clks 30 1>;
361 power-domains = <&k3_pds 30 TI_SCI_PD_EXCLUSIVE>;
362 ti,timer-pwm;
366 compatible = "ti,am654-timer";
370 assigned-clocks = <&k3_clks 31 0>;
371 assigned-clock-parents = <&k3_clks 31 1>;
372 clock-names = "fck";
373 power-domains = <&k3_pds 31 TI_SCI_PD_EXCLUSIVE>;
374 ti,timer-pwm;
378 compatible = "ti,am654-timer";
382 clock-names = "fck";
383 assigned-clocks = <&k3_clks 32 0>;
384 assigned-clock-parents = <&k3_clks 32 1>;
385 power-domains = <&k3_pds 32 TI_SCI_PD_EXCLUSIVE>;
386 ti,timer-pwm;
390 compatible = "ti,am654-timer";
394 clock-names = "fck";
395 assigned-clocks = <&k3_clks 33 0>;
396 assigned-clock-parents = <&k3_clks 33 1>;
397 power-domains = <&k3_pds 33 TI_SCI_PD_EXCLUSIVE>;
398 ti,timer-pwm;
402 compatible = "ti,am654-timer";
406 clock-names = "fck";
407 assigned-clocks = <&k3_clks 34 0>;
408 assigned-clock-parents = <&k3_clks 34 1>;
409 power-domains = <&k3_pds 34 TI_SCI_PD_EXCLUSIVE>;
410 ti,timer-pwm;
414 compatible = "ti,am654-timer";
418 clock-names = "fck";
419 assigned-clocks = <&k3_clks 25 0>;
420 assigned-clock-parents = <&k3_clks 25 1>;
421 power-domains = <&k3_pds 25 TI_SCI_PD_EXCLUSIVE>;
422 ti,timer-pwm;
426 compatible = "ti,am654-timer";
430 clock-names = "fck";
431 assigned-clocks = <&k3_clks 26 0>;
432 assigned-clock-parents = <&k3_clks 26 1>;
433 power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
434 ti,timer-pwm;
438 compatible = "ti,am654-sdhci-5.1";
440 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
442 clock-names = "clk_ahb", "clk_xin";
444 mmc-ddr-1_8v;
445 mmc-hs200-1_8v;
446 ti,clkbuf-sel = <0x7>;
447 ti,trm-icp = <0x8>;
448 ti,otap-del-sel-legacy = <0x0>;
449 ti,otap-del-sel-mmc-hs = <0x0>;
450 ti,otap-del-sel-ddr52 = <0x5>;
451 ti,otap-del-sel-hs200 = <0x5>;
452 ti,itap-del-sel-ddr52 = <0x0>;
453 dma-coherent;
458 compatible = "ti,am654-sdhci-5.1";
460 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
462 clock-names = "clk_ahb", "clk_xin";
464 ti,clkbuf-sel = <0x7>;
465 ti,trm-icp = <0x8>;
466 ti,otap-del-sel-legacy = <0x0>;
467 ti,otap-del-sel-sd-hs = <0x0>;
468 ti,otap-del-sel-sdr12 = <0xf>;
469 ti,otap-del-sel-sdr25 = <0xf>;
470 ti,otap-del-sel-sdr50 = <0x8>;
471 ti,otap-del-sel-sdr104 = <0x7>;
472 ti,otap-del-sel-ddr50 = <0x4>;
473 ti,itap-del-sel-legacy = <0xa>;
474 ti,itap-del-sel-sd-hs = <0x1>;
475 ti,itap-del-sel-sdr12 = <0xa>;
476 ti,itap-del-sel-sdr25 = <0x1>;
477 dma-coherent;
481 scm_conf: scm-conf@100000 {
482 compatible = "syscon", "simple-mfd";
484 #address-cells = <1>;
485 #size-cells = <1>;
489 compatible = "ti,am654-serdes-ctrl", "syscon", "simple-mfd";
492 serdes0_mux: mux-controller {
493 compatible = "mmio-mux";
494 #mux-control-cells = <1>;
495 mux-reg-masks = <0x0 0x3>; /* lane select */
500 compatible = "ti,am654-serdes-ctrl", "syscon", "simple-mfd";
503 serdes1_mux: mux-controller {
504 compatible = "mmio-mux";
505 #mux-control-cells = <1>;
506 mux-reg-masks = <0x0 0x3>; /* lane select */
510 dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
511 compatible = "ti,am654-dss-oldi-io-ctrl", "syscon";
515 ehrpwm_tbclk: clock-controller@4140 {
516 compatible = "ti,am654-ehrpwm-tbclk";
518 #clock-cells = <1>;
523 compatible = "ti,am654-dwc3";
525 #address-cells = <1>;
526 #size-cells = <1>;
529 dma-coherent;
530 power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
532 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
533 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
542 interrupt-names = "peripheral",
545 maximum-speed = "high-speed";
548 phy-names = "usb2-phy";
554 compatible = "ti,am654-usb2", "ti,omap-usb2";
556 syscon-phy-power = <&scm_conf 0x4000>;
558 clock-names = "wkupclk", "refclk";
559 #phy-cells = <0>;
563 compatible = "ti,am654-dwc3";
565 #address-cells = <1>;
566 #size-cells = <1>;
569 dma-coherent;
570 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
572 assigned-clocks = <&k3_clks 152 2>;
573 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
581 interrupt-names = "peripheral",
584 maximum-speed = "high-speed";
587 phy-names = "usb2-phy";
592 compatible = "ti,am654-usb2", "ti,omap-usb2";
594 syscon-phy-power = <&scm_conf 0x4020>;
596 clock-names = "wkupclk", "refclk";
597 #phy-cells = <0>;
600 intr_main_gpio: interrupt-controller@a00000 {
601 compatible = "ti,sci-intr";
603 ti,intr-trigger-type = <1>;
604 interrupt-controller;
605 interrupt-parent = <&gic500>;
606 #interrupt-cells = <1>;
608 ti,sci-dev-id = <100>;
609 ti,interrupt-ranges = <0 392 32>;
613 compatible = "simple-bus";
614 #address-cells = <2>;
615 #size-cells = <2>;
617 dma-coherent;
618 dma-ranges;
620 ti,sci-dev-id = <118>;
622 intr_main_navss: interrupt-controller@310e0000 {
623 compatible = "ti,sci-intr";
625 ti,intr-trigger-type = <4>;
626 interrupt-controller;
627 interrupt-parent = <&gic500>;
628 #interrupt-cells = <1>;
630 ti,sci-dev-id = <182>;
631 ti,interrupt-ranges = <0 64 64>,
635 inta_main_udmass: interrupt-controller@33d00000 {
636 compatible = "ti,sci-inta";
638 interrupt-controller;
639 interrupt-parent = <&intr_main_navss>;
640 msi-controller;
641 #interrupt-cells = <0>;
643 ti,sci-dev-id = <179>;
644 ti,interrupt-ranges = <0 0 256>;
648 compatible = "ti,am654-secure-proxy";
649 #mbox-cells = <1>;
650 reg-names = "target_data", "rt", "scfg";
654 interrupt-names = "rx_011";
659 compatible = "ti,am654-hwspinlock";
661 #hwlock-cells = <1>;
665 compatible = "ti,am654-mailbox";
667 #mbox-cells = <1>;
668 ti,mbox-num-users = <4>;
669 ti,mbox-num-fifos = <16>;
670 interrupt-parent = <&intr_main_navss>;
675 compatible = "ti,am654-mailbox";
677 #mbox-cells = <1>;
678 ti,mbox-num-users = <4>;
679 ti,mbox-num-fifos = <16>;
680 interrupt-parent = <&intr_main_navss>;
685 compatible = "ti,am654-mailbox";
687 #mbox-cells = <1>;
688 ti,mbox-num-users = <4>;
689 ti,mbox-num-fifos = <16>;
690 interrupt-parent = <&intr_main_navss>;
695 compatible = "ti,am654-mailbox";
697 #mbox-cells = <1>;
698 ti,mbox-num-users = <4>;
699 ti,mbox-num-fifos = <16>;
700 interrupt-parent = <&intr_main_navss>;
705 compatible = "ti,am654-mailbox";
707 #mbox-cells = <1>;
708 ti,mbox-num-users = <4>;
709 ti,mbox-num-fifos = <16>;
710 interrupt-parent = <&intr_main_navss>;
715 compatible = "ti,am654-mailbox";
717 #mbox-cells = <1>;
718 ti,mbox-num-users = <4>;
719 ti,mbox-num-fifos = <16>;
720 interrupt-parent = <&intr_main_navss>;
725 compatible = "ti,am654-mailbox";
727 #mbox-cells = <1>;
728 ti,mbox-num-users = <4>;
729 ti,mbox-num-fifos = <16>;
730 interrupt-parent = <&intr_main_navss>;
735 compatible = "ti,am654-mailbox";
737 #mbox-cells = <1>;
738 ti,mbox-num-users = <4>;
739 ti,mbox-num-fifos = <16>;
740 interrupt-parent = <&intr_main_navss>;
745 compatible = "ti,am654-mailbox";
747 #mbox-cells = <1>;
748 ti,mbox-num-users = <4>;
749 ti,mbox-num-fifos = <16>;
750 interrupt-parent = <&intr_main_navss>;
755 compatible = "ti,am654-mailbox";
757 #mbox-cells = <1>;
758 ti,mbox-num-users = <4>;
759 ti,mbox-num-fifos = <16>;
760 interrupt-parent = <&intr_main_navss>;
765 compatible = "ti,am654-mailbox";
767 #mbox-cells = <1>;
768 ti,mbox-num-users = <4>;
769 ti,mbox-num-fifos = <16>;
770 interrupt-parent = <&intr_main_navss>;
775 compatible = "ti,am654-mailbox";
777 #mbox-cells = <1>;
778 ti,mbox-num-users = <4>;
779 ti,mbox-num-fifos = <16>;
780 interrupt-parent = <&intr_main_navss>;
785 compatible = "ti,am654-navss-ringacc";
791 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
792 ti,num-rings = <818>;
793 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
795 ti,sci-dev-id = <187>;
796 msi-parent = <&inta_main_udmass>;
799 main_udmap: dma-controller@31150000 {
800 compatible = "ti,am654-navss-main-udmap";
807 reg-names = "gcfg", "rchanrt", "tchanrt",
809 msi-parent = <&inta_main_udmass>;
810 #dma-cells = <1>;
813 ti,sci-dev-id = <188>;
816 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
818 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
820 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
824 compatible = "ti,am65-cpts";
826 reg-names = "cpts";
828 clock-names = "cpts";
829 interrupts-extended = <&intr_main_navss 391>;
830 interrupt-names = "cpts";
831 ti,cpts-periodic-outputs = <6>;
832 ti,cpts-ext-ts-inputs = <8>;
834 main_cpts_mux: refclk-mux {
835 #clock-cells = <0>;
840 assigned-clocks = <&main_cpts_mux>;
841 assigned-clock-parents = <&k3_clks 118 5>;
847 compatible = "ti,am654-gpio", "ti,keystone-gpio";
849 gpio-controller;
850 #gpio-cells = <2>;
851 interrupt-parent = <&intr_main_gpio>;
853 interrupt-controller;
854 #interrupt-cells = <2>;
856 ti,davinci-gpio-unbanked = <0>;
858 clock-names = "gpio";
862 compatible = "ti,am654-gpio", "ti,keystone-gpio";
864 gpio-controller;
865 #gpio-cells = <2>;
866 interrupt-parent = <&intr_main_gpio>;
868 interrupt-controller;
869 #interrupt-cells = <2>;
871 ti,davinci-gpio-unbanked = <0>;
873 clock-names = "gpio";
877 compatible = "ti,am654-pcie-rc";
879 reg-names = "app", "dbics", "config", "atu";
880 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
881 #address-cells = <3>;
882 #size-cells = <2>;
885 ti,syscon-pcie-id = <&scm_conf 0x210>;
886 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
887 bus-range = <0x0 0xff>;
888 num-viewport = <16>;
889 max-link-speed = <2>;
890 dma-coherent;
892 msi-map = <0x0 &gic_its 0x0 0x10000>;
898 compatible = "ti,am654-pcie-rc";
900 reg-names = "app", "dbics", "config", "atu";
901 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
902 #address-cells = <3>;
903 #size-cells = <2>;
906 ti,syscon-pcie-id = <&scm_conf 0x210>;
907 ti,syscon-pcie-mode = <&scm_conf 0x4070>;
908 bus-range = <0x0 0xff>;
909 num-viewport = <16>;
910 max-link-speed = <2>;
911 dma-coherent;
913 msi-map = <0x0 &gic_its 0x10000 0x10000>;
919 compatible = "ti,am33xx-mcasp-audio";
922 reg-names = "mpu","dat";
925 interrupt-names = "tx", "rx";
928 dma-names = "tx", "rx";
931 clock-names = "fck";
932 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
937 compatible = "ti,am33xx-mcasp-audio";
940 reg-names = "mpu","dat";
943 interrupt-names = "tx", "rx";
946 dma-names = "tx", "rx";
949 clock-names = "fck";
950 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
955 compatible = "ti,am33xx-mcasp-audio";
958 reg-names = "mpu","dat";
961 interrupt-names = "tx", "rx";
964 dma-names = "tx", "rx";
967 clock-names = "fck";
968 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
973 compatible = "ti,am654-cal";
976 reg-names = "cal_top",
979 ti,camerrx-control = <&scm_conf 0x40c0>;
980 clock-names = "fck";
982 power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
985 #address-cells = <1>;
986 #size-cells = <0>;
995 compatible = "ti,am65x-dss";
1004 reg-names = "common", "vidl1", "vid",
1007 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
1009 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
1014 clock-names = "fck", "vp1", "vp2";
1018 * DIV1. See "Figure 12-3365. DSS Integration"
1021 assigned-clocks = <&k3_clks 67 2>;
1022 assigned-clock-parents = <&k3_clks 67 5>;
1026 dma-coherent;
1029 #address-cells = <1>;
1030 #size-cells = <0>;
1035 compatible = "ti,am6548-gpu", "img,powervr-sgx544";
1038 power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
1042 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1043 #pwm-cells = <3>;
1045 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
1047 clock-names = "tbclk", "fck";
1052 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1053 #pwm-cells = <3>;
1055 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
1057 clock-names = "tbclk", "fck";
1062 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1063 #pwm-cells = <3>;
1065 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
1067 clock-names = "tbclk", "fck";
1072 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1073 #pwm-cells = <3>;
1075 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
1077 clock-names = "tbclk", "fck";
1082 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1083 #pwm-cells = <3>;
1085 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
1087 clock-names = "tbclk", "fck";
1092 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1093 #pwm-cells = <3>;
1095 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
1097 clock-names = "tbclk", "fck";
1102 compatible = "ti,am654-icssg";
1104 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
1105 #address-cells = <1>;
1106 #size-cells = <1>;
1113 reg-names = "dram0", "dram1",
1118 compatible = "ti,pruss-cfg", "syscon";
1120 #address-cells = <1>;
1121 #size-cells = <1>;
1125 #address-cells = <1>;
1126 #size-cells = <0>;
1128 icssg0_coreclk_mux: coreclk-mux@3c {
1130 #clock-cells = <0>;
1133 assigned-clocks = <&icssg0_coreclk_mux>;
1134 assigned-clock-parents = <&k3_clks 62 3>;
1137 icssg0_iepclk_mux: iepclk-mux@30 {
1139 #clock-cells = <0>;
1142 assigned-clocks = <&icssg0_iepclk_mux>;
1143 assigned-clock-parents = <&icssg0_coreclk_mux>;
1149 compatible = "ti,am654-icss-iep";
1155 compatible = "ti,am654-icss-iep";
1160 icssg0_mii_rt: mii-rt@32000 {
1161 compatible = "ti,pruss-mii", "syscon";
1165 icssg0_mii_g_rt: mii-g-rt@33000 {
1166 compatible = "ti,pruss-mii-g", "syscon";
1170 icssg0_intc: interrupt-controller@20000 {
1171 compatible = "ti,icssg-intc";
1173 interrupt-controller;
1174 #interrupt-cells = <3>;
1183 interrupt-names = "host_intr0", "host_intr1",
1190 compatible = "ti,am654-pru";
1194 reg-names = "iram", "control", "debug";
1195 firmware-name = "am65x-pru0_0-fw";
1196 interrupt-parent = <&icssg0_intc>;
1198 interrupt-names = "vring";
1202 compatible = "ti,am654-rtu";
1206 reg-names = "iram", "control", "debug";
1207 firmware-name = "am65x-rtu0_0-fw";
1208 interrupt-parent = <&icssg0_intc>;
1210 interrupt-names = "vring";
1214 compatible = "ti,am654-tx-pru";
1218 reg-names = "iram", "control", "debug";
1219 firmware-name = "am65x-txpru0_0-fw";
1223 compatible = "ti,am654-pru";
1227 reg-names = "iram", "control", "debug";
1228 firmware-name = "am65x-pru0_1-fw";
1229 interrupt-parent = <&icssg0_intc>;
1231 interrupt-names = "vring";
1235 compatible = "ti,am654-rtu";
1239 reg-names = "iram", "control", "debug";
1240 firmware-name = "am65x-rtu0_1-fw";
1241 interrupt-parent = <&icssg0_intc>;
1243 interrupt-names = "vring";
1247 compatible = "ti,am654-tx-pru";
1251 reg-names = "iram", "control", "debug";
1252 firmware-name = "am65x-txpru0_1-fw";
1259 clock-names = "fck";
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1268 compatible = "ti,am654-icssg";
1270 power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
1271 #address-cells = <1>;
1272 #size-cells = <1>;
1279 reg-names = "dram0", "dram1",
1284 compatible = "ti,pruss-cfg", "syscon";
1286 #address-cells = <1>;
1287 #size-cells = <1>;
1291 #address-cells = <1>;
1292 #size-cells = <0>;
1294 icssg1_coreclk_mux: coreclk-mux@3c {
1296 #clock-cells = <0>;
1299 assigned-clocks = <&icssg1_coreclk_mux>;
1300 assigned-clock-parents = <&k3_clks 63 3>;
1303 icssg1_iepclk_mux: iepclk-mux@30 {
1305 #clock-cells = <0>;
1308 assigned-clocks = <&icssg1_iepclk_mux>;
1309 assigned-clock-parents = <&icssg1_coreclk_mux>;
1315 compatible = "ti,am654-icss-iep";
1321 compatible = "ti,am654-icss-iep";
1326 icssg1_mii_rt: mii-rt@32000 {
1327 compatible = "ti,pruss-mii", "syscon";
1331 icssg1_mii_g_rt: mii-g-rt@33000 {
1332 compatible = "ti,pruss-mii-g", "syscon";
1336 icssg1_intc: interrupt-controller@20000 {
1337 compatible = "ti,icssg-intc";
1339 interrupt-controller;
1340 #interrupt-cells = <3>;
1349 interrupt-names = "host_intr0", "host_intr1",
1356 compatible = "ti,am654-pru";
1360 reg-names = "iram", "control", "debug";
1361 firmware-name = "am65x-pru1_0-fw";
1362 interrupt-parent = <&icssg1_intc>;
1364 interrupt-names = "vring";
1368 compatible = "ti,am654-rtu";
1372 reg-names = "iram", "control", "debug";
1373 firmware-name = "am65x-rtu1_0-fw";
1374 interrupt-parent = <&icssg1_intc>;
1376 interrupt-names = "vring";
1380 compatible = "ti,am654-tx-pru";
1384 reg-names = "iram", "control", "debug";
1385 firmware-name = "am65x-txpru1_0-fw";
1389 compatible = "ti,am654-pru";
1393 reg-names = "iram", "control", "debug";
1394 firmware-name = "am65x-pru1_1-fw";
1395 interrupt-parent = <&icssg1_intc>;
1397 interrupt-names = "vring";
1401 compatible = "ti,am654-rtu";
1405 reg-names = "iram", "control", "debug";
1406 firmware-name = "am65x-rtu1_1-fw";
1407 interrupt-parent = <&icssg1_intc>;
1409 interrupt-names = "vring";
1413 compatible = "ti,am654-tx-pru";
1417 reg-names = "iram", "control", "debug";
1418 firmware-name = "am65x-txpru1_1-fw";
1425 clock-names = "fck";
1426 #address-cells = <1>;
1427 #size-cells = <0>;
1434 compatible = "ti,am654-icssg";
1436 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1437 #address-cells = <1>;
1438 #size-cells = <1>;
1445 reg-names = "dram0", "dram1",
1450 compatible = "ti,pruss-cfg", "syscon";
1452 #address-cells = <1>;
1453 #size-cells = <1>;
1457 #address-cells = <1>;
1458 #size-cells = <0>;
1460 icssg2_coreclk_mux: coreclk-mux@3c {
1462 #clock-cells = <0>;
1465 assigned-clocks = <&icssg2_coreclk_mux>;
1466 assigned-clock-parents = <&k3_clks 64 3>;
1469 icssg2_iepclk_mux: iepclk-mux@30 {
1471 #clock-cells = <0>;
1474 assigned-clocks = <&icssg2_iepclk_mux>;
1475 assigned-clock-parents = <&icssg2_coreclk_mux>;
1481 compatible = "ti,am654-icss-iep";
1487 compatible = "ti,am654-icss-iep";
1492 icssg2_mii_rt: mii-rt@32000 {
1493 compatible = "ti,pruss-mii", "syscon";
1497 icssg2_mii_g_rt: mii-g-rt@33000 {
1498 compatible = "ti,pruss-mii-g", "syscon";
1502 icssg2_intc: interrupt-controller@20000 {
1503 compatible = "ti,icssg-intc";
1505 interrupt-controller;
1506 #interrupt-cells = <3>;
1515 interrupt-names = "host_intr0", "host_intr1",
1522 compatible = "ti,am654-pru";
1526 reg-names = "iram", "control", "debug";
1527 firmware-name = "am65x-pru2_0-fw";
1528 interrupt-parent = <&icssg2_intc>;
1530 interrupt-names = "vring";
1534 compatible = "ti,am654-rtu";
1538 reg-names = "iram", "control", "debug";
1539 firmware-name = "am65x-rtu2_0-fw";
1540 interrupt-parent = <&icssg2_intc>;
1542 interrupt-names = "vring";
1546 compatible = "ti,am654-tx-pru";
1550 reg-names = "iram", "control", "debug";
1551 firmware-name = "am65x-txpru2_0-fw";
1555 compatible = "ti,am654-pru";
1559 reg-names = "iram", "control", "debug";
1560 firmware-name = "am65x-pru2_1-fw";
1561 interrupt-parent = <&icssg2_intc>;
1563 interrupt-names = "vring";
1567 compatible = "ti,am654-rtu";
1571 reg-names = "iram", "control", "debug";
1572 firmware-name = "am65x-rtu2_1-fw";
1573 interrupt-parent = <&icssg2_intc>;
1575 interrupt-names = "vring";
1579 compatible = "ti,am654-tx-pru";
1583 reg-names = "iram", "control", "debug";
1584 firmware-name = "am65x-txpru2_1-fw";
1591 clock-names = "fck";
1592 #address-cells = <1>;
1593 #size-cells = <0>;