Lines Matching +full:otg +full:- +full:gp +full:- +full:pins
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pwm/pwm.h>
15 #include "k3-serdes.h"
17 #include "k3-am642-tqma64xxl.dtsi"
20 compatible = "tq,am642-tqma6442l-mbax4xxl", "tq,am642-tqma6442l",
22 model = "TQ-Systems TQMa64xxL SoM on MBax4xxL carrier board";
23 chassis-type = "embedded";
44 stdout-path = &main_uart0;
47 gpio-keys {
48 compatible = "gpio-keys";
49 pinctrl-names = "default";
50 pinctrl-0 = <&mcu_gpio_keys_pins>;
52 user-button {
59 gpio-leds {
60 compatible = "gpio-leds";
61 pinctrl-names = "default";
62 pinctrl-0 = <&mcu_gpio_leds_pins>;
64 led-0 {
69 led-1 {
76 icssg1_eth: icssg1-eth {
77 compatible = "ti,am642-icssg-prueth";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pru_icssg1_rgmii1_pins>, <&pru_icssg1_rgmii2_pins>;
80 interrupt-parent = <&icssg1_intc>;
82 interrupt-names = "tx_ts0", "tx_ts1";
93 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
94 "tx1-0", "tx1-1", "tx1-2", "tx1-3",
97 firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
98 "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
99 "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
100 "ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
101 "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
102 "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";
104 ti,pruss-gp-mux-sel = <2>, /* MII mode */
110 ti,mii-g-rt = <&icssg1_mii_g_rt>;
111 ti,mii-rt = <&icssg1_mii_rt>;
114 ethernet-ports {
115 #address-cells = <1>;
116 #size-cells = <0>;
120 phy-handle = <&icssg1_phy0c>;
121 phy-mode = "rgmii-id";
123 local-mac-address = [00 00 00 00 00 00];
128 phy-handle = <&icssg1_phy03>;
129 phy-mode = "rgmii-id";
131 local-mac-address = [00 00 00 00 00 00];
136 fan0: pwm-fan {
137 compatible = "pwm-fan";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pwm_fan_pins>;
140 fan-supply = <®_pwm_fan>;
141 #cooling-cells = <2>;
142 /* typical 25 kHz -> 40.000 nsec */
144 cooling-levels = <0 32 64 128 196 240>;
145 pulses-per-revolution = <2>;
146 interrupt-parent = <&main_gpio1>;
151 wifi_pwrseq: pwrseq-wifi {
152 compatible = "mmc-pwrseq-simple";
153 pinctrl-names = "default";
154 pinctrl-0 = <&main_mmc1_wifi_pwrseq_pins>;
155 reset-gpios = <&main_gpio0 23 GPIO_ACTIVE_LOW>;
158 reg_pwm_fan: regulator-pwm-fan {
159 compatible = "regulator-fixed";
160 pinctrl-names = "default";
161 pinctrl-0 = <&pwm_fan_reg_pins>;
162 regulator-name = "FAN_PWR";
163 regulator-min-microvolt = <12000000>;
164 regulator-max-microvolt = <12000000>;
166 enable-active-high;
169 reg_sd: regulator-sd {
170 compatible = "regulator-fixed";
171 pinctrl-names = "default";
172 pinctrl-0 = <&main_mmc1_reg_pins>;
173 regulator-name = "V_3V3_SD";
174 regulator-min-microvolt = <3300000>;
175 regulator-max-microvolt = <3300000>;
177 enable-active-high;
182 pinctrl-names = "default";
183 pinctrl-0 = <&cpsw_pins>;
188 phy-mode = "rgmii-rxid";
189 phy-handle = <&cpsw3g_phy0>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&cpsw_mdio_pins>;
198 cpsw3g_phy0: ethernet-phy@0 {
199 compatible = "ethernet-phy-ieee802.3-c22";
201 reset-gpios = <&main_gpio0 44 GPIO_ACTIVE_LOW>;
202 reset-assert-us = <1000>;
203 reset-deassert-us = <1000>;
204 ti,rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
205 ti,tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
206 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
207 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&epwm5_pins>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pru_icssg1_mdio_pins>;
222 /* phy-mode is fixed up to rgmii-rxid by prueth driver to account for
223 * the SoC integration, so the only rx-internal-delay and no
224 * tx-internal-delay is set for the PHYs.
227 icssg1_phy03: ethernet-phy@3 {
228 compatible = "ethernet-phy-ieee802.3-c22";
230 reset-gpios = <&main_gpio1 47 GPIO_ACTIVE_LOW>;
231 reset-assert-us = <1000>;
232 reset-deassert-us = <1000>;
233 ti,rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
234 ti,tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
235 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
236 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
239 icssg1_phy0c: ethernet-phy@c {
240 compatible = "ethernet-phy-ieee802.3-c22";
242 reset-gpios = <&main_gpio1 51 GPIO_ACTIVE_LOW>;
243 reset-assert-us = <1000>;
244 reset-deassert-us = <1000>;
245 ti,rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
246 ti,tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
247 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
248 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
254 pinctrl-names = "default";
255 pinctrl-0 = <&main_gpio0_digital_pins>,
257 gpio-line-names =
258 "", "", "", "", /* 0-3 */
259 "", "", "", "", /* 4-7 */
260 "", "", "", "", /* 8-11 */
261 "", "", "", "", /* 12-15 */
262 "", "", "", "", /* 16-19 */
263 "", "", "", "", /* 20-23 */
264 "", "", "EN_DIG_OUT_1", "STATUS_OUT_1", /* 24-27 */
265 "EN_DIG_OUT_2", "STATUS_OUT_2", "EN_SIG_OUT_3", "", /* 28-31 */
266 "", "", "STATUS_OUT_3", "EN_DIG_OUT_4", /* 32-35 */
267 "", "", "STATUS_OUT_4", "DIG_IN_1", /* 36-39 */
268 "DIG_IN_2", "DIG_IN_3", "DIG_IN_4"; /* 40- */
272 pinctrl-names = "default";
273 pinctrl-0 = <&main_gpio1_hog_pins>,
275 gpio-line-names =
276 "", "", "", "", /* 0-3 */
277 "", "", "", "", /* 4-7 */
278 "", "", "", "", /* 8-11 */
279 "", "", "", "", /* 12-15 */
280 "", "", "", "", /* 16-19 */
281 "", "", "", "", /* 20-23 */
282 "", "", "", "", /* 24-27 */
283 "", "", "", "", /* 28-31 */
284 "", "", "", "", /* 32-35 */
285 "", "", "", "", /* 36-39 */
286 "", "", "", "", /* 40-43 */
287 "", "", "", "", /* 44-47 */
288 "", "", "", "", /* 48-51 */
289 "", "", "", "ADC_SYNC", /* 52-55 */
290 "", "", "ADC_RST#", "ADC_DATA_RDY", /* 56-59 */
291 "", "", "", "", /* 60-63 */
292 "", "", "", "ADC_INT#", /* 64-67 */
293 "BG95_PWRKEY", "BG95_RESET"; /* 68- */
295 line50-hog {
297 gpio-hog;
299 line-name = "USB0_VBUS_OC#";
303 line54-hog {
304 gpio-hog;
306 line-name = "PRG0_MDIO_SWITCH";
307 output-low;
310 line70-hog {
311 gpio-hog;
313 line-name = "PHY_INT#";
319 pinctrl-names = "default";
320 pinctrl-0 = <&main_mcan0_pins>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&main_mcan1_pins>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&main_spi0_pins>;
333 ti,pindir-d0-out-d1-in;
341 pinctrl-names = "default";
342 pinctrl-0 = <&main_uart0_pins>;
347 * IOT Module - GNSS UART
352 pinctrl-names = "default";
353 pinctrl-0 = <&main_uart1_pins>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&main_uart2_pins>;
361 linux,rs485-enabled-at-boot-time;
362 rs485-rts-active-low;
368 pinctrl-names = "default";
369 pinctrl-0 = <&main_uart3_pins>;
376 /* IOT module - Main UART */
378 pinctrl-names = "default";
379 pinctrl-0 = <&main_uart4_pins>;
383 /* IOT module - DBG UART */
385 pinctrl-names = "default";
386 pinctrl-0 = <&main_uart5_pins>;
392 main0_active0: trip-active0 {
398 main0_active1: trip-active1 {
404 main0_active2: trip-active2 {
411 cooling-maps {
414 cooling-device = <&fan0 1 1>;
419 cooling-device = <&fan0 2 2>;
424 cooling-device = <&fan0 3 3>;
431 main1_active0: trip-active0 {
437 main1_active1: trip-active1 {
443 main1_active2: trip-active2 {
450 cooling-maps {
453 cooling-device = <&fan0 1 1>;
458 cooling-device = <&fan0 2 2>;
463 cooling-device = <&fan0 3 3>;
469 pinctrl-names = "default";
470 pinctrl-0 = <&mcu_gpio0_pins>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&mcu_i2c0_pins>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&mcu_spi0_pins>;
482 ti,pindir-d0-out-d1-in;
488 pinctrl-names = "default";
489 pinctrl-0 = <&mcu_uart0_pins>;
495 pinctrl-names = "default";
496 pinctrl-0 = <&mcu_uart1_pins>;
501 idle-states = <AM64_SERDES0_LANE0_USB>;
507 #phy-cells = <0>;
509 cdns,num-lanes = <1>;
510 cdns,phy-type = <PHY_TYPE_USB3>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&main_mmc1_pins>;
517 bus-width = <4>;
518 cd-gpios = <&main_gpio1 77 GPIO_ACTIVE_LOW>;
519 disable-wp;
520 no-mmc;
521 ti,fails-without-test-cd;
528 ti,adc-channels = <0 1 2 3 4 5 6 7>;
538 pinctrl-names = "default";
539 pinctrl-0 = <&main_usb0_pins>;
540 dr_mode = "otg";
541 maximum-speed = "super-speed";
543 phy-names = "cdns3,usb3-phy";
547 ti,vbus-divider;
551 cpsw_pins: cpsw-pins {
552 pinctrl-single,pins = <
580 cpsw_mdio_pins: cpsw-mdio-pins {
581 pinctrl-single,pins = <
582 /* (R21) GPMC0_CSn3.GPIO0_44 - RESET_RGMII1# */
592 epwm5_pins: epwm5-pins {
593 pinctrl-single,pins = <
600 main_gpio0_digital_pins: main-gpio0-digital-pins {
601 pinctrl-single,pins = <
602 /* (W20) GPMC0_AD11.GPIO0_26 - EN_DIG_OUT_1 */
604 /* (W21) GPMC0_AD12.GPIO0_27 - STATUS_OUT_1 */
606 /* (V18) GPMC0_AD13.GPIO0_28 - EN_DIG_OUT_2 */
608 /* (Y21) GPMC0_AD14.GPIO0_29 - STATUS_OUT_2 */
610 /* (Y20) GPMC0_AD15.GPIO0_30 - EN_DIG_OUT_3 */
612 /* (T21) GPMC0_WEn.GPIO0_34 - STATUS_OUT_3 */
614 /* (P17) GPMC0_BE0n_CLE.GPIO0_35 - EN_DIG_OUT_4 */
616 /* (Y18) GPMC0_WAIT1.GPIO0_38 - STATUS_OUT_4 */
618 /* (N16) GPMC0_WPn.GPIO0_39 - DIG_IN_1 */
620 /* (N17) GPMC0_DIR.GPIO0_40 - DIG_IN_2 */
622 /* (R19) GPMC0_CSn0.GPIO0_41 - DIG_IN_3 */
624 /* (R20) GPMC0_CSn1.GPIO0_42 - DIG_IN_4 */
629 main_gpio0_hog_pins: main-gpio0-hog-pins {
630 pinctrl-single,pins = <
631 /* (P19) GPMC0_CSn2.GPIO0_43 - MMC1_CTRL */
636 main_gpio1_hog_pins: main-gpio1-hog-pins {
637 pinctrl-single,pins = <
638 /* (B15) SPI1_D0.GPIO1_50 - USB0_VBUS_OC# */
640 /* (B16) UART0_CTSn.GPIO1_54 - PRG0_MDIO_SWITCH */
642 /* (C19) EXTINTn.GPIO1_70 - PHY_INT# */
647 main_gpio1_pru_pins: main-gpio1-pru-pins {
648 pinctrl-single,pins = <
720 main_mcan0_pins: main-mcan0-pins {
721 pinctrl-single,pins = <
729 main_mcan1_pins: main-mcan1-pins {
730 pinctrl-single,pins = <
738 main_mmc1_pins: main-mmc1-pins {
739 pinctrl-single,pins = <
759 main_mmc1_reg_pins: main-mmc1-reg-pins {
760 pinctrl-single,pins = <
761 /* (C13) SPI0_CS1.GPIO1_43 - MMC1_SD_EN */
766 main_mmc1_wifi_pwrseq_pins: main-mmc1-wifi-pwrseq-pins {
767 pinctrl-single,pins = <
768 /* (V19) GPMC0_AD8.GPIO0_23 - WIFI-BT_EN */
773 main_spi0_pins: main-spi0-pins {
774 pinctrl-single,pins = <
786 main_spi0_adc_pins: main-spi0-adc-pins {
787 pinctrl-single,pins = <
788 /* (A16) UART0_RTSn.GPIO1_55 - ADC_SYNC */
790 /* (D16) UART1_CTSn.GPIO1_58 - ADC_RST# */
792 /* (E16) UART1_RTSn.GPIO1_59 - ADC_DATA_RDY */
794 /* (B19) I2C1_SDA.GPIO1_67 - ADC_INT# */
799 main_uart0_pins: main-uart0-pins {
800 pinctrl-single,pins = <
808 main_uart1_pins: main-uart1-pins {
809 pinctrl-single,pins = <
817 main_uart2_pins: main-uart2-pins {
818 pinctrl-single,pins = <
828 main_uart3_pins: main-uart3-pins {
829 pinctrl-single,pins = <
841 main_uart4_pins: main-uart4-pins {
842 pinctrl-single,pins = <
853 /* (D18) ECAP0_IN_APWM_OUT.GPIO1_68 - BG95_PWRKEY */
855 /* (A19) EXT_REFCLK1.GPIO1_69 - BG95_RESET */
860 main_uart5_pins: main-uart5-pins {
861 pinctrl-single,pins = <
869 main_usb0_pins: main-usb0-pins {
870 pinctrl-single,pins = <
876 pru_icssg1_mdio_pins: pru-icssg1-mdio-pins {
877 pinctrl-single,pins = <
878 /* (A15) SPI1_D1.GPIO1_51 - RESET_PRG1_RGMII1# */
880 /* (B14) SPI1_CS0.GPIO1_47 - RESET_PRG1_RGMII2# */
890 pru_icssg1_rgmii1_pins: pru-icssg1-rgmii1-pins {
891 pinctrl-single,pins = <
919 pru_icssg1_rgmii2_pins: pru-icssg1-rgmii2-pins {
920 pinctrl-single,pins = <
948 pwm_fan_pins: pwm-fan-pins {
949 pinctrl-single,pins = <
952 /* (C14) SPI1_CLK.GPIO1_49 - FAN_RPM */
957 pwm_fan_reg_pins: pwm-fan-reg-pins {
958 pinctrl-single,pins = <
959 /* (D14) SPI1_CS1.GPIO1_48 - FAN_PWR */
966 mcu_gpio_keys_pins: mcu-gpio-keys-pins {
967 pinctrl-single,pins = <
973 mcu_gpio_leds_pins: mcu-gpio-leds-pins {
974 pinctrl-single,pins = <
982 mcu_gpio0_pins: mcu-gpio0-pins {
983 pinctrl-single,pins = <
999 mcu_i2c0_pins: mcu-i2c0-pins {
1000 pinctrl-single,pins = <
1008 mcu_spi0_pins: mcu-spi0-pins {
1009 pinctrl-single,pins = <
1023 mcu_uart0_pins: mcu-uart0-pins {
1024 pinctrl-single,pins = <
1032 mcu_uart1_pins: mcu-uart1-pins {
1033 pinctrl-single,pins = <