Lines Matching +full:adv +full:- +full:on +full:- +full:ns

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3  * DT overlay for HSE NAND expansion card on AM642 EVM
5  * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "k3-pinctrl.h"
15 	gpmc0_default_pins: gpmc0-default-pins {
16 		bootph-all;
17 		pinctrl-single,pins = <
53 	gpmc0-hog {
54 		bootph-all;
55 		gpio-hog;
58 		line-name = "GPMC0_MUX_DIR";
63 	bootph-all;
69 	pinctrl-names = "default";
70 	pinctrl-0 = <&gpmc0_default_pins>;
71 	#address-cells = <2>;
72 	#size-cells = <1>;
75 		compatible = "ti,am64-nand";
77 		interrupt-parent = <&gpmc0>;
80 		rb-gpios = <&gpmc0 0 GPIO_ACTIVE_HIGH>;	/* gpmc_wait0 */
81 		ti,nand-xfer-type = "prefetch-polled";
82 		ti,nand-ecc-opt = "bch8";	/* BCH8: Bootrom limitation */
83 		ti,elm-id = <&elm0>;
84 		nand-bus-width = <8>;
85 		gpmc,device-width = <1>;
86 		gpmc,sync-clk-ps = <0>;
87 		gpmc,cs-on-ns = <0>;
88 		gpmc,cs-rd-off-ns = <40>;
89 		gpmc,cs-wr-off-ns = <40>;
90 		gpmc,adv-on-ns = <0>;
91 		gpmc,adv-rd-off-ns = <25>;
92 		gpmc,adv-wr-off-ns = <25>;
93 		gpmc,we-on-ns = <0>;
94 		gpmc,we-off-ns = <20>;
95 		gpmc,oe-on-ns = <3>;
96 		gpmc,oe-off-ns = <30>;
97 		gpmc,access-ns = <30>;
98 		gpmc,rd-cycle-ns = <40>;
99 		gpmc,wr-cycle-ns = <40>;
100 		gpmc,bus-turnaround-ns = <0>;
101 		gpmc,cycle2cycle-delay-ns = <0>;
102 		gpmc,clk-activation-ns = <0>;
103 		gpmc,wr-access-ns = <40>;
104 		gpmc,wr-data-mux-bus-ns = <0>;
107 			compatible = "fixed-partitions";
108 			#address-cells = <1>;
109 			#size-cells = <1>;
112 				bootph-all;
117 				bootph-all;
122 				bootph-all;
127 				bootph-all;
128 				label = "NAND.u-boot";
132 				bootph-all;
133 				label = "NAND.u-boot-env";
137 				bootph-all;
138 				label = "NAND.u-boot-env.backup";
142 				bootph-all;
143 				label = "NAND.file-system";