Lines Matching +full:phy +full:- +full:am654 +full:- +full:serdes
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 tfa-sram@1c0000 {
31 dmsc-sram@1e0000 {
35 sproxy-sram@1fc000 {
41 bootph-all;
42 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
44 #address-cells = <1>;
45 #size-cells = <1>;
49 bootph-all;
50 compatible = "ti,am654-chipid";
54 serdes_ln_ctrl: mux-controller@4080 {
55 compatible = "reg-mux";
57 #mux-control-cells = <1>;
58 mux-reg-masks = <0x0 0x3>; /* SERDES0 lane0 select */
61 phy_gmii_sel: phy@4044 {
62 compatible = "ti,am654-phy-gmii-sel";
64 #phy-cells = <1>;
67 epwm_tbclk: clock-controller@4130 {
68 compatible = "ti,am64-epwm-tbclk";
70 #clock-cells = <1>;
74 gic500: interrupt-controller@1800000 {
75 compatible = "arm,gic-v3";
76 #address-cells = <2>;
77 #size-cells = <2>;
79 #interrupt-cells = <3>;
80 interrupt-controller;
92 gic_its: msi-controller@1820000 {
93 compatible = "arm,gic-v3-its";
95 socionext,synquacer-pre-its = <0x1000000 0x400000>;
96 msi-controller;
97 #msi-cells = <1>;
102 bootph-all;
103 compatible = "simple-bus";
104 #address-cells = <2>;
105 #size-cells = <2>;
106 dma-ranges;
109 ti,sci-dev-id = <25>;
112 bootph-all;
113 compatible = "ti,am654-secure-proxy";
114 #mbox-cells = <1>;
115 reg-names = "target_data", "rt", "scfg";
119 interrupt-names = "rx_012";
123 inta_main_dmss: interrupt-controller@48000000 {
124 compatible = "ti,sci-inta";
126 #interrupt-cells = <0>;
127 interrupt-controller;
128 interrupt-parent = <&gic500>;
129 msi-controller;
131 ti,sci-dev-id = <28>;
132 ti,interrupt-ranges = <4 68 36>;
133 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
136 main_bcdma: dma-controller@485c0100 {
137 compatible = "ti,am64-dmss-bcdma";
147 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
149 msi-parent = <&inta_main_dmss>;
150 #dma-cells = <3>;
153 ti,sci-dev-id = <26>;
154 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
155 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
156 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
159 main_pktdma: dma-controller@485c0000 {
160 compatible = "ti,am64-dmss-pktdma";
169 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
171 msi-parent = <&inta_main_dmss>;
172 #dma-cells = <2>;
175 ti,sci-dev-id = <30>;
176 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
182 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
188 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
196 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
205 dmsc: system-controller@44043000 {
206 bootph-all;
207 compatible = "ti,k2g-sci";
208 ti,host-id = <12>;
209 mbox-names = "rx", "tx";
212 reg-names = "debug_messages";
215 k3_pds: power-controller {
216 bootph-all;
217 compatible = "ti,sci-pm-domain";
218 #power-domain-cells = <2>;
221 k3_clks: clock-controller {
222 bootph-all;
223 compatible = "ti,k2g-sci-clk";
224 #clock-cells = <2>;
227 k3_reset: reset-controller {
228 bootph-all;
229 compatible = "ti,sci-reset";
230 #reset-cells = <2>;
235 bootph-all;
236 compatible = "pinctrl-single";
238 #pinctrl-cells = <1>;
239 pinctrl-single,register-width = <32>;
240 pinctrl-single,function-mask = <0xffffffff>;
244 bootph-all;
245 compatible = "ti,am654-timer";
249 clock-names = "fck";
250 assigned-clocks = <&k3_clks 36 1>;
251 assigned-clock-parents = <&k3_clks 36 2>;
252 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
253 ti,timer-pwm;
257 compatible = "ti,am654-timer";
261 clock-names = "fck";
262 assigned-clocks = <&k3_clks 37 1>;
263 assigned-clock-parents = <&k3_clks 37 2>;
264 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
265 ti,timer-pwm;
269 compatible = "ti,am654-timer";
273 clock-names = "fck";
274 assigned-clocks = <&k3_clks 38 1>;
275 assigned-clock-parents = <&k3_clks 38 2>;
276 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
277 ti,timer-pwm;
281 compatible = "ti,am654-timer";
285 clock-names = "fck";
286 assigned-clocks = <&k3_clks 39 1>;
287 assigned-clock-parents = <&k3_clks 39 2>;
288 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
289 ti,timer-pwm;
293 compatible = "ti,am654-timer";
297 clock-names = "fck";
298 assigned-clocks = <&k3_clks 40 1>;
299 assigned-clock-parents = <&k3_clks 40 2>;
300 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
301 ti,timer-pwm;
305 compatible = "ti,am654-timer";
309 clock-names = "fck";
310 assigned-clocks = <&k3_clks 41 1>;
311 assigned-clock-parents = <&k3_clks 41 2>;
312 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
313 ti,timer-pwm;
317 compatible = "ti,am654-timer";
321 clock-names = "fck";
322 assigned-clocks = <&k3_clks 42 1>;
323 assigned-clock-parents = <&k3_clks 42 2>;
324 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
325 ti,timer-pwm;
329 compatible = "ti,am654-timer";
333 clock-names = "fck";
334 assigned-clocks = <&k3_clks 43 1>;
335 assigned-clock-parents = <&k3_clks 43 2>;
336 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
337 ti,timer-pwm;
341 compatible = "ti,am654-timer";
345 clock-names = "fck";
346 assigned-clocks = <&k3_clks 44 1>;
347 assigned-clock-parents = <&k3_clks 44 2>;
348 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
349 ti,timer-pwm;
353 compatible = "ti,am654-timer";
357 clock-names = "fck";
358 assigned-clocks = <&k3_clks 45 1>;
359 assigned-clock-parents = <&k3_clks 45 2>;
360 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
361 ti,timer-pwm;
365 compatible = "ti,am654-timer";
369 clock-names = "fck";
370 assigned-clocks = <&k3_clks 46 1>;
371 assigned-clock-parents = <&k3_clks 46 2>;
372 power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>;
373 ti,timer-pwm;
377 compatible = "ti,am654-timer";
381 clock-names = "fck";
382 assigned-clocks = <&k3_clks 47 1>;
383 assigned-clock-parents = <&k3_clks 47 2>;
384 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
385 ti,timer-pwm;
389 bootph-pre-ram;
390 compatible = "ti,j721e-esm";
393 ti,esm-pins = <160>, <161>, <162>, <163>, <164>, <165>;
397 compatible = "ti,am64-uart", "ti,am654-uart";
400 clock-frequency = <48000000>;
401 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
403 clock-names = "fclk";
408 compatible = "ti,am64-uart", "ti,am654-uart";
411 clock-frequency = <48000000>;
412 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
414 clock-names = "fclk";
419 compatible = "ti,am64-uart", "ti,am654-uart";
422 clock-frequency = <48000000>;
423 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
425 clock-names = "fclk";
430 compatible = "ti,am64-uart", "ti,am654-uart";
433 clock-frequency = <48000000>;
434 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
436 clock-names = "fclk";
441 compatible = "ti,am64-uart", "ti,am654-uart";
444 clock-frequency = <48000000>;
445 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
447 clock-names = "fclk";
452 compatible = "ti,am64-uart", "ti,am654-uart";
455 clock-frequency = <48000000>;
456 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
458 clock-names = "fclk";
463 compatible = "ti,am64-uart", "ti,am654-uart";
466 clock-frequency = <48000000>;
467 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
469 clock-names = "fclk";
474 compatible = "ti,am64-i2c", "ti,omap4-i2c";
477 #address-cells = <1>;
478 #size-cells = <0>;
479 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
481 clock-names = "fck";
486 compatible = "ti,am64-i2c", "ti,omap4-i2c";
489 #address-cells = <1>;
490 #size-cells = <0>;
491 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
493 clock-names = "fck";
498 compatible = "ti,am64-i2c", "ti,omap4-i2c";
501 #address-cells = <1>;
502 #size-cells = <0>;
503 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
505 clock-names = "fck";
510 compatible = "ti,am64-i2c", "ti,omap4-i2c";
513 #address-cells = <1>;
514 #size-cells = <0>;
515 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
517 clock-names = "fck";
522 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
525 #address-cells = <1>;
526 #size-cells = <0>;
527 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
530 dma-names = "tx0", "rx0";
535 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
538 #address-cells = <1>;
539 #size-cells = <0>;
540 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
546 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
549 #address-cells = <1>;
550 #size-cells = <0>;
551 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
557 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
560 #address-cells = <1>;
561 #size-cells = <0>;
562 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
568 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
571 #address-cells = <1>;
572 #size-cells = <0>;
573 power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
578 main_gpio_intr: interrupt-controller@a00000 {
579 compatible = "ti,sci-intr";
581 ti,intr-trigger-type = <1>;
582 interrupt-controller;
583 interrupt-parent = <&gic500>;
584 #interrupt-cells = <1>;
586 ti,sci-dev-id = <3>;
587 ti,interrupt-ranges = <0 32 16>;
591 compatible = "ti,am64-gpio", "ti,keystone-gpio";
593 gpio-controller;
594 #gpio-cells = <2>;
595 interrupt-parent = <&main_gpio_intr>;
598 interrupt-controller;
599 #interrupt-cells = <2>;
601 ti,davinci-gpio-unbanked = <0>;
602 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
604 clock-names = "gpio";
608 compatible = "ti,am64-gpio", "ti,keystone-gpio";
610 gpio-controller;
611 #gpio-cells = <2>;
612 interrupt-parent = <&main_gpio_intr>;
615 interrupt-controller;
616 #interrupt-cells = <2>;
618 ti,davinci-gpio-unbanked = <0>;
619 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
621 clock-names = "gpio";
625 compatible = "ti,am64-sdhci-8bit";
628 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
630 clock-names = "clk_ahb", "clk_xin";
631 bus-width = <8>;
632 mmc-ddr-1_8v;
633 mmc-hs200-1_8v;
634 ti,clkbuf-sel = <0x7>;
635 ti,trm-icp = <0x2>;
636 ti,otap-del-sel-legacy = <0x0>;
637 ti,otap-del-sel-mmc-hs = <0x0>;
638 ti,otap-del-sel-ddr52 = <0x6>;
639 ti,otap-del-sel-hs200 = <0x7>;
640 ti,itap-del-sel-legacy = <0x10>;
641 ti,itap-del-sel-mmc-hs = <0xa>;
642 ti,itap-del-sel-ddr52 = <0x3>;
647 compatible = "ti,am64-sdhci-4bit";
650 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
652 clock-names = "clk_ahb", "clk_xin";
653 bus-width = <4>;
654 ti,clkbuf-sel = <0x7>;
655 ti,otap-del-sel-legacy = <0x0>;
656 ti,otap-del-sel-sd-hs = <0x0>;
657 ti,otap-del-sel-sdr12 = <0xf>;
658 ti,otap-del-sel-sdr25 = <0xf>;
659 ti,otap-del-sel-sdr50 = <0xc>;
660 ti,otap-del-sel-sdr104 = <0x6>;
661 ti,otap-del-sel-ddr50 = <0x9>;
662 ti,itap-del-sel-legacy = <0x0>;
663 ti,itap-del-sel-sd-hs = <0x0>;
664 ti,itap-del-sel-sdr12 = <0x0>;
665 ti,itap-del-sel-sdr25 = <0x0>;
670 compatible = "ti,am642-cpsw-nuss";
671 #address-cells = <2>;
672 #size-cells = <2>;
674 reg-names = "cpsw_nuss";
677 assigned-clocks = <&k3_clks 13 1>;
678 assigned-clock-parents = <&k3_clks 13 9>;
679 clock-names = "fck";
680 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
692 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
695 ethernet-ports {
696 #address-cells = <1>;
697 #size-cells = <0>;
701 ti,mac-only;
704 mac-address = [00 00 00 00 00 00];
705 ti,syscon-efuse = <&main_conf 0x200>;
711 ti,mac-only;
714 mac-address = [00 00 00 00 00 00];
720 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
722 #address-cells = <1>;
723 #size-cells = <0>;
725 clock-names = "fck";
731 compatible = "ti,j721e-cpts";
734 clock-names = "cpts";
735 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
736 interrupt-names = "cpts";
737 ti,cpts-ext-ts-inputs = <4>;
738 ti,cpts-periodic-outputs = <2>;
743 compatible = "ti,j721e-cpts";
745 reg-names = "cpts";
746 power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
748 clock-names = "cpts";
749 assigned-clocks = <&k3_clks 84 0>;
750 assigned-clock-parents = <&k3_clks 84 8>;
752 interrupt-names = "cpts";
753 ti,cpts-periodic-outputs = <6>;
754 ti,cpts-ext-ts-inputs = <8>;
758 compatible = "pinctrl-single";
760 #pinctrl-cells = <1>;
761 pinctrl-single,register-width = <32>;
762 pinctrl-single,function-mask = <0x000107ff>;
765 usbss0: cdns-usb@f900000 {
766 compatible = "ti,am64-usb", "ti,j721e-usb";
768 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
770 clock-names = "ref", "lpm";
771 assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */
772 assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */
773 #address-cells = <2>;
774 #size-cells = <2>;
781 reg-names = "otg",
787 interrupt-names = "host",
790 maximum-speed = "super-speed";
796 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
799 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
801 assigned-clocks = <&k3_clks 0 0>;
802 assigned-clock-parents = <&k3_clks 0 3>;
803 assigned-clock-rates = <60000000>;
804 clock-names = "fck";
808 #io-channel-cells = <1>;
809 compatible = "ti,am654-adc", "ti,am3359-adc";
814 compatible = "simple-bus";
816 #address-cells = <2>;
817 #size-cells = <2>;
821 compatible = "ti,am654-ospi", "cdns,qspi-nor";
825 cdns,fifo-depth = <256>;
826 cdns,fifo-width = <4>;
827 cdns,trigger-address = <0x0>;
828 #address-cells = <0x1>;
829 #size-cells = <0x0>;
831 assigned-clocks = <&k3_clks 75 6>;
832 assigned-clock-parents = <&k3_clks 75 7>;
833 assigned-clock-rates = <166666666>;
834 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
840 compatible = "ti,am64-hwspinlock";
842 #hwlock-cells = <1>;
846 compatible = "ti,am64-mailbox";
850 #mbox-cells = <1>;
851 ti,mbox-num-users = <4>;
852 ti,mbox-num-fifos = <16>;
857 compatible = "ti,am64-mailbox";
861 #mbox-cells = <1>;
862 ti,mbox-num-users = <4>;
863 ti,mbox-num-fifos = <16>;
868 compatible = "ti,am64-mailbox";
872 #mbox-cells = <1>;
873 ti,mbox-num-users = <4>;
874 ti,mbox-num-fifos = <16>;
879 compatible = "ti,am64-mailbox";
883 #mbox-cells = <1>;
884 ti,mbox-num-users = <4>;
885 ti,mbox-num-fifos = <16>;
890 compatible = "ti,am64-mailbox";
893 #mbox-cells = <1>;
894 ti,mbox-num-users = <4>;
895 ti,mbox-num-fifos = <16>;
900 compatible = "ti,am64-mailbox";
903 #mbox-cells = <1>;
904 ti,mbox-num-users = <4>;
905 ti,mbox-num-fifos = <16>;
910 compatible = "ti,am64-r5fss";
911 ti,cluster-mode = <0>;
912 #address-cells = <1>;
913 #size-cells = <1>;
918 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
921 compatible = "ti,am64-r5f";
924 reg-names = "atcm", "btcm";
926 ti,sci-dev-id = <121>;
927 ti,sci-proc-ids = <0x01 0xff>;
929 firmware-name = "am64-main-r5f0_0-fw";
930 ti,atcm-enable = <1>;
931 ti,btcm-enable = <1>;
936 compatible = "ti,am64-r5f";
939 reg-names = "atcm", "btcm";
941 ti,sci-dev-id = <122>;
942 ti,sci-proc-ids = <0x02 0xff>;
944 firmware-name = "am64-main-r5f0_1-fw";
945 ti,atcm-enable = <1>;
946 ti,btcm-enable = <1>;
952 compatible = "ti,am64-r5fss";
953 ti,cluster-mode = <0>;
954 #address-cells = <1>;
955 #size-cells = <1>;
960 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
963 compatible = "ti,am64-r5f";
966 reg-names = "atcm", "btcm";
968 ti,sci-dev-id = <123>;
969 ti,sci-proc-ids = <0x06 0xff>;
971 firmware-name = "am64-main-r5f1_0-fw";
972 ti,atcm-enable = <1>;
973 ti,btcm-enable = <1>;
978 compatible = "ti,am64-r5f";
981 reg-names = "atcm", "btcm";
983 ti,sci-dev-id = <124>;
984 ti,sci-proc-ids = <0x07 0xff>;
986 firmware-name = "am64-main-r5f1_1-fw";
987 ti,atcm-enable = <1>;
988 ti,btcm-enable = <1>;
994 compatible = "ti,am64-wiz-10g";
995 #address-cells = <1>;
996 #size-cells = <1>;
997 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
999 clock-names = "fck", "core_ref_clk", "ext_ref_clk";
1000 num-lanes = <1>;
1001 #reset-cells = <1>;
1002 #clock-cells = <1>;
1005 assigned-clocks = <&k3_clks 162 1>;
1006 assigned-clock-parents = <&k3_clks 162 5>;
1008 serdes0: serdes@f000000 {
1009 compatible = "ti,j721e-serdes-10g";
1011 reg-names = "torrent_phy";
1013 reset-names = "torrent_reset";
1016 clock-names = "refclk", "phy_en_refclk";
1017 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
1020 assigned-clock-parents = <&k3_clks 162 1>,
1023 #address-cells = <1>;
1024 #size-cells = <0>;
1025 #clock-cells = <1>;
1030 compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
1035 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1036 interrupt-names = "link_state";
1039 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
1040 max-link-speed = <2>;
1041 num-lanes = <1>;
1042 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
1044 clock-names = "fck", "pcie_refclk";
1045 #address-cells = <3>;
1046 #size-cells = <2>;
1047 bus-range = <0x0 0xff>;
1048 cdns,no-bar-match-nbits = <64>;
1049 vendor-id = <0x104c>;
1050 device-id = <0xb010>;
1051 msi-map = <0x0 &gic_its 0x0 0x10000>;
1054 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
1059 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1060 #pwm-cells = <3>;
1062 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
1064 clock-names = "tbclk", "fck";
1069 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1070 #pwm-cells = <3>;
1072 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
1074 clock-names = "tbclk", "fck";
1079 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1080 #pwm-cells = <3>;
1082 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
1084 clock-names = "tbclk", "fck";
1089 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1090 #pwm-cells = <3>;
1092 power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
1094 clock-names = "tbclk", "fck";
1099 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1100 #pwm-cells = <3>;
1102 power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
1104 clock-names = "tbclk", "fck";
1109 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1110 #pwm-cells = <3>;
1112 power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
1114 clock-names = "tbclk", "fck";
1119 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1120 #pwm-cells = <3>;
1122 power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
1124 clock-names = "tbclk", "fck";
1129 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1130 #pwm-cells = <3>;
1132 power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
1134 clock-names = "tbclk", "fck";
1139 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1140 #pwm-cells = <3>;
1142 power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
1144 clock-names = "tbclk", "fck";
1149 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1150 #pwm-cells = <3>;
1152 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
1154 clock-names = "fck";
1159 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1160 #pwm-cells = <3>;
1162 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
1164 clock-names = "fck";
1169 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1170 #pwm-cells = <3>;
1172 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
1174 clock-names = "fck";
1179 compatible = "ti,j7-rti-wdt";
1182 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
1183 assigned-clocks = <&k3_clks 125 0>;
1184 assigned-clock-parents = <&k3_clks 125 2>;
1188 compatible = "ti,j7-rti-wdt";
1191 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
1192 assigned-clocks = <&k3_clks 126 0>;
1193 assigned-clock-parents = <&k3_clks 126 2>;
1197 compatible = "ti,am642-icssg";
1199 power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
1200 #address-cells = <1>;
1201 #size-cells = <1>;
1208 reg-names = "dram0", "dram1", "shrdram2";
1212 compatible = "ti,pruss-cfg", "syscon";
1214 #address-cells = <1>;
1215 #size-cells = <1>;
1219 #address-cells = <1>;
1220 #size-cells = <0>;
1222 icssg0_coreclk_mux: coreclk-mux@3c {
1224 #clock-cells = <0>;
1227 assigned-clocks = <&icssg0_coreclk_mux>;
1228 assigned-clock-parents = <&k3_clks 81 20>;
1231 icssg0_iepclk_mux: iepclk-mux@30 {
1233 #clock-cells = <0>;
1236 assigned-clocks = <&icssg0_iepclk_mux>;
1237 assigned-clock-parents = <&icssg0_coreclk_mux>;
1243 compatible = "ti,am654-icss-iep";
1249 compatible = "ti,am654-icss-iep";
1254 icssg0_mii_rt: mii-rt@32000 {
1255 compatible = "ti,pruss-mii", "syscon";
1259 icssg0_mii_g_rt: mii-g-rt@33000 {
1260 compatible = "ti,pruss-mii-g", "syscon";
1264 icssg0_intc: interrupt-controller@20000 {
1265 compatible = "ti,icssg-intc";
1267 interrupt-controller;
1268 #interrupt-cells = <3>;
1277 interrupt-names = "host_intr0", "host_intr1",
1284 compatible = "ti,am642-pru";
1288 reg-names = "iram", "control", "debug";
1289 firmware-name = "am64x-pru0_0-fw";
1290 interrupt-parent = <&icssg0_intc>;
1292 interrupt-names = "vring";
1296 compatible = "ti,am642-rtu";
1300 reg-names = "iram", "control", "debug";
1301 firmware-name = "am64x-rtu0_0-fw";
1302 interrupt-parent = <&icssg0_intc>;
1304 interrupt-names = "vring";
1308 compatible = "ti,am642-tx-pru";
1312 reg-names = "iram", "control", "debug";
1313 firmware-name = "am64x-txpru0_0-fw";
1317 compatible = "ti,am642-pru";
1321 reg-names = "iram", "control", "debug";
1322 firmware-name = "am64x-pru0_1-fw";
1323 interrupt-parent = <&icssg0_intc>;
1325 interrupt-names = "vring";
1329 compatible = "ti,am642-rtu";
1333 reg-names = "iram", "control", "debug";
1334 firmware-name = "am64x-rtu0_1-fw";
1335 interrupt-parent = <&icssg0_intc>;
1337 interrupt-names = "vring";
1341 compatible = "ti,am642-tx-pru";
1345 reg-names = "iram", "control", "debug";
1346 firmware-name = "am64x-txpru0_1-fw";
1353 clock-names = "fck";
1354 #address-cells = <1>;
1355 #size-cells = <0>;
1362 compatible = "ti,am642-icssg";
1364 power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
1365 #address-cells = <1>;
1366 #size-cells = <1>;
1373 reg-names = "dram0", "dram1", "shrdram2";
1377 compatible = "ti,pruss-cfg", "syscon";
1379 #address-cells = <1>;
1380 #size-cells = <1>;
1384 #address-cells = <1>;
1385 #size-cells = <0>;
1387 icssg1_coreclk_mux: coreclk-mux@3c {
1389 #clock-cells = <0>;
1392 assigned-clocks = <&icssg1_coreclk_mux>;
1393 assigned-clock-parents = <&k3_clks 82 20>;
1396 icssg1_iepclk_mux: iepclk-mux@30 {
1398 #clock-cells = <0>;
1401 assigned-clocks = <&icssg1_iepclk_mux>;
1402 assigned-clock-parents = <&icssg1_coreclk_mux>;
1408 compatible = "ti,am654-icss-iep";
1414 compatible = "ti,am654-icss-iep";
1419 icssg1_mii_rt: mii-rt@32000 {
1420 compatible = "ti,pruss-mii", "syscon";
1424 icssg1_mii_g_rt: mii-g-rt@33000 {
1425 compatible = "ti,pruss-mii-g", "syscon";
1429 icssg1_intc: interrupt-controller@20000 {
1430 compatible = "ti,icssg-intc";
1432 interrupt-controller;
1433 #interrupt-cells = <3>;
1442 interrupt-names = "host_intr0", "host_intr1",
1449 compatible = "ti,am642-pru";
1453 reg-names = "iram", "control", "debug";
1454 firmware-name = "am64x-pru1_0-fw";
1455 interrupt-parent = <&icssg1_intc>;
1457 interrupt-names = "vring";
1461 compatible = "ti,am642-rtu";
1465 reg-names = "iram", "control", "debug";
1466 firmware-name = "am64x-rtu1_0-fw";
1467 interrupt-parent = <&icssg1_intc>;
1469 interrupt-names = "vring";
1473 compatible = "ti,am642-tx-pru";
1477 reg-names = "iram", "control", "debug";
1478 firmware-name = "am64x-txpru1_0-fw";
1482 compatible = "ti,am642-pru";
1486 reg-names = "iram", "control", "debug";
1487 firmware-name = "am64x-pru1_1-fw";
1488 interrupt-parent = <&icssg1_intc>;
1490 interrupt-names = "vring";
1494 compatible = "ti,am642-rtu";
1498 reg-names = "iram", "control", "debug";
1499 firmware-name = "am64x-rtu1_1-fw";
1500 interrupt-parent = <&icssg1_intc>;
1502 interrupt-names = "vring";
1506 compatible = "ti,am642-tx-pru";
1510 reg-names = "iram", "control", "debug";
1511 firmware-name = "am64x-txpru1_1-fw";
1517 #address-cells = <1>;
1518 #size-cells = <0>;
1520 clock-names = "fck";
1530 reg-names = "m_can", "message_ram";
1531 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
1533 clock-names = "hclk", "cclk";
1536 interrupt-names = "int0", "int1";
1537 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1545 reg-names = "m_can", "message_ram";
1546 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
1548 clock-names = "hclk", "cclk";
1551 interrupt-names = "int0", "int1";
1552 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1557 compatible = "ti,am64-sa2ul";
1559 power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
1560 #address-cells = <2>;
1561 #size-cells = <2>;
1565 dma-names = "tx", "rx1", "rx2";
1568 compatible = "inside-secure,safexcel-eip76";
1571 status = "disabled"; /* Used by OP-TEE */
1575 gpmc0: memory-controller@3b000000 {
1576 compatible = "ti,am64-gpmc";
1577 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1579 clock-names = "fck";
1582 reg-names = "cfg", "data";
1584 gpmc,num-cs = <3>;
1585 gpmc,num-waitpins = <2>;
1586 #address-cells = <2>;
1587 #size-cells = <1>;
1588 interrupt-controller;
1589 #interrupt-cells = <2>;
1590 gpio-controller;
1591 #gpio-cells = <2>;
1596 compatible = "ti,am64-elm";
1599 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1601 clock-names = "fck";
1605 main_vtm0: temperature-sensor@b00000 {
1606 compatible = "ti,j7200-vtm";
1609 power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
1610 #thermal-sensor-cells = <1>;