Lines Matching +full:num +full:- +full:intr +full:- +full:inputs
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 tfa-sram@1c0000 {
31 dmsc-sram@1e0000 {
35 sproxy-sram@1fc000 {
41 bootph-all;
42 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
44 #address-cells = <1>;
45 #size-cells = <1>;
49 bootph-all;
50 compatible = "ti,am654-chipid";
54 pcie0_ctrl: pcie-ctrl@4070 {
55 compatible = "ti,j784s4-pcie-ctrl", "syscon";
59 serdes_ln_ctrl: mux-controller@4080 {
60 compatible = "reg-mux";
62 #mux-control-cells = <1>;
63 mux-reg-masks = <0x0 0x3>; /* SERDES0 lane0 select */
67 compatible = "ti,am654-phy-gmii-sel";
69 #phy-cells = <1>;
72 epwm_tbclk: clock-controller@4130 {
73 compatible = "ti,am64-epwm-tbclk";
75 #clock-cells = <1>;
79 gic500: interrupt-controller@1800000 {
80 compatible = "arm,gic-v3";
81 #address-cells = <2>;
82 #size-cells = <2>;
84 #interrupt-cells = <3>;
85 interrupt-controller;
97 gic_its: msi-controller@1820000 {
98 compatible = "arm,gic-v3-its";
100 socionext,synquacer-pre-its = <0x1000000 0x400000>;
101 msi-controller;
102 #msi-cells = <1>;
107 bootph-all;
108 compatible = "simple-bus";
109 #address-cells = <2>;
110 #size-cells = <2>;
111 dma-ranges;
114 ti,sci-dev-id = <25>;
117 bootph-all;
118 compatible = "ti,am654-secure-proxy";
119 #mbox-cells = <1>;
120 reg-names = "target_data", "rt", "scfg";
124 interrupt-names = "rx_012";
128 inta_main_dmss: interrupt-controller@48000000 {
129 compatible = "ti,sci-inta";
131 #interrupt-cells = <0>;
132 interrupt-controller;
133 interrupt-parent = <&gic500>;
134 msi-controller;
136 ti,sci-dev-id = <28>;
137 ti,interrupt-ranges = <4 68 36>;
138 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
141 main_bcdma: dma-controller@485c0100 {
142 compatible = "ti,am64-dmss-bcdma";
152 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
154 msi-parent = <&inta_main_dmss>;
155 #dma-cells = <3>;
158 ti,sci-dev-id = <26>;
159 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
160 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
161 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
164 main_pktdma: dma-controller@485c0000 {
165 compatible = "ti,am64-dmss-pktdma";
174 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
176 msi-parent = <&inta_main_dmss>;
177 #dma-cells = <2>;
180 ti,sci-dev-id = <30>;
181 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
187 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
193 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
201 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
210 dmsc: system-controller@44043000 {
211 bootph-all;
212 compatible = "ti,k2g-sci";
213 ti,host-id = <12>;
214 mbox-names = "rx", "tx";
217 reg-names = "debug_messages";
220 k3_pds: power-controller {
221 bootph-all;
222 compatible = "ti,sci-pm-domain";
223 #power-domain-cells = <2>;
226 k3_clks: clock-controller {
227 bootph-all;
228 compatible = "ti,k2g-sci-clk";
229 #clock-cells = <2>;
232 k3_reset: reset-controller {
233 bootph-all;
234 compatible = "ti,sci-reset";
235 #reset-cells = <2>;
240 bootph-all;
241 compatible = "pinctrl-single";
243 #pinctrl-cells = <1>;
244 pinctrl-single,register-width = <32>;
245 pinctrl-single,function-mask = <0xffffffff>;
249 bootph-all;
250 compatible = "ti,am654-timer";
254 clock-names = "fck";
255 assigned-clocks = <&k3_clks 36 1>;
256 assigned-clock-parents = <&k3_clks 36 2>;
257 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
258 ti,timer-pwm;
262 compatible = "ti,am654-timer";
266 clock-names = "fck";
267 assigned-clocks = <&k3_clks 37 1>;
268 assigned-clock-parents = <&k3_clks 37 2>;
269 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
270 ti,timer-pwm;
274 compatible = "ti,am654-timer";
278 clock-names = "fck";
279 assigned-clocks = <&k3_clks 38 1>;
280 assigned-clock-parents = <&k3_clks 38 2>;
281 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
282 ti,timer-pwm;
286 compatible = "ti,am654-timer";
290 clock-names = "fck";
291 assigned-clocks = <&k3_clks 39 1>;
292 assigned-clock-parents = <&k3_clks 39 2>;
293 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
294 ti,timer-pwm;
298 compatible = "ti,am654-timer";
302 clock-names = "fck";
303 assigned-clocks = <&k3_clks 40 1>;
304 assigned-clock-parents = <&k3_clks 40 2>;
305 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
306 ti,timer-pwm;
310 compatible = "ti,am654-timer";
314 clock-names = "fck";
315 assigned-clocks = <&k3_clks 41 1>;
316 assigned-clock-parents = <&k3_clks 41 2>;
317 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
318 ti,timer-pwm;
322 compatible = "ti,am654-timer";
326 clock-names = "fck";
327 assigned-clocks = <&k3_clks 42 1>;
328 assigned-clock-parents = <&k3_clks 42 2>;
329 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
330 ti,timer-pwm;
334 compatible = "ti,am654-timer";
338 clock-names = "fck";
339 assigned-clocks = <&k3_clks 43 1>;
340 assigned-clock-parents = <&k3_clks 43 2>;
341 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
342 ti,timer-pwm;
346 compatible = "ti,am654-timer";
350 clock-names = "fck";
351 assigned-clocks = <&k3_clks 44 1>;
352 assigned-clock-parents = <&k3_clks 44 2>;
353 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
354 ti,timer-pwm;
358 compatible = "ti,am654-timer";
362 clock-names = "fck";
363 assigned-clocks = <&k3_clks 45 1>;
364 assigned-clock-parents = <&k3_clks 45 2>;
365 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
366 ti,timer-pwm;
370 compatible = "ti,am654-timer";
374 clock-names = "fck";
375 assigned-clocks = <&k3_clks 46 1>;
376 assigned-clock-parents = <&k3_clks 46 2>;
377 power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>;
378 ti,timer-pwm;
382 compatible = "ti,am654-timer";
386 clock-names = "fck";
387 assigned-clocks = <&k3_clks 47 1>;
388 assigned-clock-parents = <&k3_clks 47 2>;
389 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
390 ti,timer-pwm;
394 bootph-pre-ram;
395 compatible = "ti,j721e-esm";
398 ti,esm-pins = <160>, <161>, <162>, <163>, <164>, <165>;
402 compatible = "ti,am64-uart", "ti,am654-uart";
405 clock-frequency = <48000000>;
406 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
408 clock-names = "fclk";
413 compatible = "ti,am64-uart", "ti,am654-uart";
416 clock-frequency = <48000000>;
417 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
419 clock-names = "fclk";
424 compatible = "ti,am64-uart", "ti,am654-uart";
427 clock-frequency = <48000000>;
428 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
430 clock-names = "fclk";
435 compatible = "ti,am64-uart", "ti,am654-uart";
438 clock-frequency = <48000000>;
439 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
441 clock-names = "fclk";
446 compatible = "ti,am64-uart", "ti,am654-uart";
449 clock-frequency = <48000000>;
450 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
452 clock-names = "fclk";
457 compatible = "ti,am64-uart", "ti,am654-uart";
460 clock-frequency = <48000000>;
461 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
463 clock-names = "fclk";
468 compatible = "ti,am64-uart", "ti,am654-uart";
471 clock-frequency = <48000000>;
472 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
474 clock-names = "fclk";
479 compatible = "ti,am64-i2c", "ti,omap4-i2c";
482 #address-cells = <1>;
483 #size-cells = <0>;
484 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
486 clock-names = "fck";
491 compatible = "ti,am64-i2c", "ti,omap4-i2c";
494 #address-cells = <1>;
495 #size-cells = <0>;
496 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
498 clock-names = "fck";
503 compatible = "ti,am64-i2c", "ti,omap4-i2c";
506 #address-cells = <1>;
507 #size-cells = <0>;
508 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
510 clock-names = "fck";
515 compatible = "ti,am64-i2c", "ti,omap4-i2c";
518 #address-cells = <1>;
519 #size-cells = <0>;
520 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
522 clock-names = "fck";
527 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
530 #address-cells = <1>;
531 #size-cells = <0>;
532 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
535 dma-names = "tx0", "rx0";
540 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
543 #address-cells = <1>;
544 #size-cells = <0>;
545 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
551 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
554 #address-cells = <1>;
555 #size-cells = <0>;
556 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
562 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
565 #address-cells = <1>;
566 #size-cells = <0>;
567 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
573 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
576 #address-cells = <1>;
577 #size-cells = <0>;
578 power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
583 main_gpio_intr: interrupt-controller@a00000 {
584 compatible = "ti,sci-intr";
586 ti,intr-trigger-type = <1>;
587 interrupt-controller;
588 interrupt-parent = <&gic500>;
589 #interrupt-cells = <1>;
591 ti,sci-dev-id = <3>;
592 ti,interrupt-ranges = <0 32 16>;
596 compatible = "ti,am64-gpio", "ti,keystone-gpio";
598 gpio-controller;
599 #gpio-cells = <2>;
600 interrupt-parent = <&main_gpio_intr>;
603 interrupt-controller;
604 #interrupt-cells = <2>;
606 ti,davinci-gpio-unbanked = <0>;
607 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
609 clock-names = "gpio";
613 compatible = "ti,am64-gpio", "ti,keystone-gpio";
615 gpio-controller;
616 #gpio-cells = <2>;
617 interrupt-parent = <&main_gpio_intr>;
620 interrupt-controller;
621 #interrupt-cells = <2>;
623 ti,davinci-gpio-unbanked = <0>;
624 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
626 clock-names = "gpio";
630 compatible = "ti,am64-sdhci-8bit";
633 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
635 clock-names = "clk_ahb", "clk_xin";
636 bus-width = <8>;
637 mmc-ddr-1_8v;
638 mmc-hs200-1_8v;
639 ti,clkbuf-sel = <0x7>;
640 ti,trm-icp = <0x2>;
641 ti,otap-del-sel-legacy = <0x0>;
642 ti,otap-del-sel-mmc-hs = <0x0>;
643 ti,otap-del-sel-ddr52 = <0x6>;
644 ti,otap-del-sel-hs200 = <0x7>;
645 ti,itap-del-sel-legacy = <0x10>;
646 ti,itap-del-sel-mmc-hs = <0xa>;
647 ti,itap-del-sel-ddr52 = <0x3>;
652 compatible = "ti,am64-sdhci-4bit";
655 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
657 clock-names = "clk_ahb", "clk_xin";
658 bus-width = <4>;
659 ti,clkbuf-sel = <0x7>;
660 ti,otap-del-sel-legacy = <0x0>;
661 ti,otap-del-sel-sd-hs = <0x0>;
662 ti,otap-del-sel-sdr12 = <0xf>;
663 ti,otap-del-sel-sdr25 = <0xf>;
664 ti,otap-del-sel-sdr50 = <0xc>;
665 ti,otap-del-sel-sdr104 = <0x6>;
666 ti,otap-del-sel-ddr50 = <0x9>;
667 ti,itap-del-sel-legacy = <0x0>;
668 ti,itap-del-sel-sd-hs = <0x0>;
669 ti,itap-del-sel-sdr12 = <0x0>;
670 ti,itap-del-sel-sdr25 = <0x0>;
675 compatible = "ti,am642-cpsw-nuss";
676 #address-cells = <2>;
677 #size-cells = <2>;
679 reg-names = "cpsw_nuss";
682 assigned-clocks = <&k3_clks 13 1>;
683 assigned-clock-parents = <&k3_clks 13 9>;
684 clock-names = "fck";
685 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
697 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
700 ethernet-ports {
701 #address-cells = <1>;
702 #size-cells = <0>;
706 ti,mac-only;
709 mac-address = [00 00 00 00 00 00];
710 ti,syscon-efuse = <&main_conf 0x200>;
716 ti,mac-only;
719 mac-address = [00 00 00 00 00 00];
725 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
727 #address-cells = <1>;
728 #size-cells = <0>;
730 clock-names = "fck";
736 compatible = "ti,j721e-cpts";
739 clock-names = "cpts";
740 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
741 interrupt-names = "cpts";
742 ti,cpts-ext-ts-inputs = <4>;
743 ti,cpts-periodic-outputs = <2>;
748 compatible = "ti,j721e-cpts";
750 reg-names = "cpts";
751 power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
753 clock-names = "cpts";
754 assigned-clocks = <&k3_clks 84 0>;
755 assigned-clock-parents = <&k3_clks 84 8>;
757 interrupt-names = "cpts";
758 ti,cpts-periodic-outputs = <6>;
759 ti,cpts-ext-ts-inputs = <8>;
763 compatible = "pinctrl-single";
765 #pinctrl-cells = <1>;
766 pinctrl-single,register-width = <32>;
767 pinctrl-single,function-mask = <0x000107ff>;
770 usbss0: cdns-usb@f900000 {
771 compatible = "ti,am64-usb", "ti,j721e-usb";
773 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
775 clock-names = "ref", "lpm";
776 assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */
777 assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */
778 #address-cells = <2>;
779 #size-cells = <2>;
786 reg-names = "otg",
792 interrupt-names = "host",
795 maximum-speed = "super-speed";
801 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
804 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
806 assigned-clocks = <&k3_clks 0 0>;
807 assigned-clock-parents = <&k3_clks 0 3>;
808 assigned-clock-rates = <60000000>;
809 clock-names = "fck";
813 #io-channel-cells = <1>;
814 compatible = "ti,am654-adc", "ti,am3359-adc";
819 compatible = "simple-bus";
821 #address-cells = <2>;
822 #size-cells = <2>;
826 compatible = "ti,am654-ospi", "cdns,qspi-nor";
830 cdns,fifo-depth = <256>;
831 cdns,fifo-width = <4>;
832 cdns,trigger-address = <0x0>;
833 #address-cells = <0x1>;
834 #size-cells = <0x0>;
836 assigned-clocks = <&k3_clks 75 6>;
837 assigned-clock-parents = <&k3_clks 75 7>;
838 assigned-clock-rates = <166666666>;
839 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
845 compatible = "ti,am64-hwspinlock";
847 #hwlock-cells = <1>;
851 compatible = "ti,am64-mailbox";
855 #mbox-cells = <1>;
856 ti,mbox-num-users = <4>;
857 ti,mbox-num-fifos = <16>;
862 compatible = "ti,am64-mailbox";
866 #mbox-cells = <1>;
867 ti,mbox-num-users = <4>;
868 ti,mbox-num-fifos = <16>;
873 compatible = "ti,am64-mailbox";
877 #mbox-cells = <1>;
878 ti,mbox-num-users = <4>;
879 ti,mbox-num-fifos = <16>;
884 compatible = "ti,am64-mailbox";
888 #mbox-cells = <1>;
889 ti,mbox-num-users = <4>;
890 ti,mbox-num-fifos = <16>;
895 compatible = "ti,am64-mailbox";
898 #mbox-cells = <1>;
899 ti,mbox-num-users = <4>;
900 ti,mbox-num-fifos = <16>;
905 compatible = "ti,am64-mailbox";
908 #mbox-cells = <1>;
909 ti,mbox-num-users = <4>;
910 ti,mbox-num-fifos = <16>;
915 compatible = "ti,am64-r5fss";
916 ti,cluster-mode = <0>;
917 #address-cells = <1>;
918 #size-cells = <1>;
923 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
926 compatible = "ti,am64-r5f";
929 reg-names = "atcm", "btcm";
931 ti,sci-dev-id = <121>;
932 ti,sci-proc-ids = <0x01 0xff>;
934 firmware-name = "am64-main-r5f0_0-fw";
935 ti,atcm-enable = <1>;
936 ti,btcm-enable = <1>;
941 compatible = "ti,am64-r5f";
944 reg-names = "atcm", "btcm";
946 ti,sci-dev-id = <122>;
947 ti,sci-proc-ids = <0x02 0xff>;
949 firmware-name = "am64-main-r5f0_1-fw";
950 ti,atcm-enable = <1>;
951 ti,btcm-enable = <1>;
957 compatible = "ti,am64-r5fss";
958 ti,cluster-mode = <0>;
959 #address-cells = <1>;
960 #size-cells = <1>;
965 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
968 compatible = "ti,am64-r5f";
971 reg-names = "atcm", "btcm";
973 ti,sci-dev-id = <123>;
974 ti,sci-proc-ids = <0x06 0xff>;
976 firmware-name = "am64-main-r5f1_0-fw";
977 ti,atcm-enable = <1>;
978 ti,btcm-enable = <1>;
983 compatible = "ti,am64-r5f";
986 reg-names = "atcm", "btcm";
988 ti,sci-dev-id = <124>;
989 ti,sci-proc-ids = <0x07 0xff>;
991 firmware-name = "am64-main-r5f1_1-fw";
992 ti,atcm-enable = <1>;
993 ti,btcm-enable = <1>;
999 compatible = "ti,am64-wiz-10g";
1000 #address-cells = <1>;
1001 #size-cells = <1>;
1002 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
1004 clock-names = "fck", "core_ref_clk", "ext_ref_clk";
1005 num-lanes = <1>;
1006 #reset-cells = <1>;
1007 #clock-cells = <1>;
1010 assigned-clocks = <&k3_clks 162 1>;
1011 assigned-clock-parents = <&k3_clks 162 5>;
1014 compatible = "ti,j721e-serdes-10g";
1016 reg-names = "torrent_phy";
1018 reset-names = "torrent_reset";
1021 clock-names = "refclk", "phy_en_refclk";
1022 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
1025 assigned-clock-parents = <&k3_clks 162 1>,
1028 #address-cells = <1>;
1029 #size-cells = <0>;
1030 #clock-cells = <1>;
1035 compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
1040 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1041 interrupt-names = "link_state";
1044 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
1045 max-link-speed = <2>;
1046 num-lanes = <1>;
1047 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
1049 clock-names = "fck", "pcie_refclk";
1050 #address-cells = <3>;
1051 #size-cells = <2>;
1052 bus-range = <0x0 0xff>;
1053 cdns,no-bar-match-nbits = <64>;
1054 vendor-id = <0x104c>;
1055 device-id = <0xb010>;
1056 msi-map = <0x0 &gic_its 0x0 0x10000>;
1058 … 0x00 0x00101000 0x06 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4…
1059 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
1064 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1065 #pwm-cells = <3>;
1067 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
1069 clock-names = "tbclk", "fck";
1074 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1075 #pwm-cells = <3>;
1077 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
1079 clock-names = "tbclk", "fck";
1084 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1085 #pwm-cells = <3>;
1087 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
1089 clock-names = "tbclk", "fck";
1094 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1095 #pwm-cells = <3>;
1097 power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
1099 clock-names = "tbclk", "fck";
1104 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1105 #pwm-cells = <3>;
1107 power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
1109 clock-names = "tbclk", "fck";
1114 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1115 #pwm-cells = <3>;
1117 power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
1119 clock-names = "tbclk", "fck";
1124 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1125 #pwm-cells = <3>;
1127 power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
1129 clock-names = "tbclk", "fck";
1134 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1135 #pwm-cells = <3>;
1137 power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
1139 clock-names = "tbclk", "fck";
1144 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1145 #pwm-cells = <3>;
1147 power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
1149 clock-names = "tbclk", "fck";
1154 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1155 #pwm-cells = <3>;
1157 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
1159 clock-names = "fck";
1164 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1165 #pwm-cells = <3>;
1167 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
1169 clock-names = "fck";
1174 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1175 #pwm-cells = <3>;
1177 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
1179 clock-names = "fck";
1184 compatible = "ti,am62-eqep";
1186 power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
1193 compatible = "ti,am62-eqep";
1195 power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
1202 compatible = "ti,am62-eqep";
1204 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
1211 compatible = "ti,j7-rti-wdt";
1214 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
1215 assigned-clocks = <&k3_clks 125 0>;
1216 assigned-clock-parents = <&k3_clks 125 2>;
1220 compatible = "ti,j7-rti-wdt";
1223 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
1224 assigned-clocks = <&k3_clks 126 0>;
1225 assigned-clock-parents = <&k3_clks 126 2>;
1229 compatible = "ti,am642-icssg";
1231 power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
1232 #address-cells = <1>;
1233 #size-cells = <1>;
1242 assigned-clocks = <&k3_clks 81 0>;
1243 assigned-clock-parents = <&k3_clks 81 2>;
1249 reg-names = "dram0", "dram1", "shrdram2";
1253 compatible = "ti,pruss-cfg", "syscon";
1255 #address-cells = <1>;
1256 #size-cells = <1>;
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1263 icssg0_coreclk_mux: coreclk-mux@3c {
1265 #clock-cells = <0>;
1268 assigned-clocks = <&icssg0_coreclk_mux>;
1269 assigned-clock-parents = <&k3_clks 81 0>;
1272 icssg0_iepclk_mux: iepclk-mux@30 {
1274 #clock-cells = <0>;
1277 assigned-clocks = <&icssg0_iepclk_mux>;
1278 assigned-clock-parents = <&icssg0_coreclk_mux>;
1284 compatible = "ti,am654-icss-iep";
1290 compatible = "ti,am654-icss-iep";
1295 icssg0_mii_rt: mii-rt@32000 {
1296 compatible = "ti,pruss-mii", "syscon";
1300 icssg0_mii_g_rt: mii-g-rt@33000 {
1301 compatible = "ti,pruss-mii-g", "syscon";
1305 icssg0_pa_stats: pa-stats@2c000 {
1306 compatible = "ti,pruss-pa-st", "syscon";
1310 icssg0_intc: interrupt-controller@20000 {
1311 compatible = "ti,icssg-intc";
1313 interrupt-controller;
1314 #interrupt-cells = <3>;
1323 interrupt-names = "host_intr0", "host_intr1",
1330 compatible = "ti,am642-pru";
1334 reg-names = "iram", "control", "debug";
1335 firmware-name = "am64x-pru0_0-fw";
1336 interrupt-parent = <&icssg0_intc>;
1338 interrupt-names = "vring";
1342 compatible = "ti,am642-rtu";
1346 reg-names = "iram", "control", "debug";
1347 firmware-name = "am64x-rtu0_0-fw";
1348 interrupt-parent = <&icssg0_intc>;
1350 interrupt-names = "vring";
1354 compatible = "ti,am642-tx-pru";
1358 reg-names = "iram", "control", "debug";
1359 firmware-name = "am64x-txpru0_0-fw";
1363 compatible = "ti,am642-pru";
1367 reg-names = "iram", "control", "debug";
1368 firmware-name = "am64x-pru0_1-fw";
1369 interrupt-parent = <&icssg0_intc>;
1371 interrupt-names = "vring";
1375 compatible = "ti,am642-rtu";
1379 reg-names = "iram", "control", "debug";
1380 firmware-name = "am64x-rtu0_1-fw";
1381 interrupt-parent = <&icssg0_intc>;
1383 interrupt-names = "vring";
1387 compatible = "ti,am642-tx-pru";
1391 reg-names = "iram", "control", "debug";
1392 firmware-name = "am64x-txpru0_1-fw";
1399 clock-names = "fck";
1400 #address-cells = <1>;
1401 #size-cells = <0>;
1408 compatible = "ti,am642-icssg";
1410 power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
1411 #address-cells = <1>;
1412 #size-cells = <1>;
1421 assigned-clocks = <&k3_clks 82 0>;
1422 assigned-clock-parents = <&k3_clks 82 2>;
1428 reg-names = "dram0", "dram1", "shrdram2";
1432 compatible = "ti,pruss-cfg", "syscon";
1434 #address-cells = <1>;
1435 #size-cells = <1>;
1439 #address-cells = <1>;
1440 #size-cells = <0>;
1442 icssg1_coreclk_mux: coreclk-mux@3c {
1444 #clock-cells = <0>;
1447 assigned-clocks = <&icssg1_coreclk_mux>;
1448 assigned-clock-parents = <&k3_clks 82 0>;
1451 icssg1_iepclk_mux: iepclk-mux@30 {
1453 #clock-cells = <0>;
1456 assigned-clocks = <&icssg1_iepclk_mux>;
1457 assigned-clock-parents = <&icssg1_coreclk_mux>;
1463 compatible = "ti,am654-icss-iep";
1469 compatible = "ti,am654-icss-iep";
1474 icssg1_mii_rt: mii-rt@32000 {
1475 compatible = "ti,pruss-mii", "syscon";
1479 icssg1_mii_g_rt: mii-g-rt@33000 {
1480 compatible = "ti,pruss-mii-g", "syscon";
1484 icssg1_pa_stats: pa-stats@2c000 {
1485 compatible = "ti,pruss-pa-st", "syscon";
1489 icssg1_intc: interrupt-controller@20000 {
1490 compatible = "ti,icssg-intc";
1492 interrupt-controller;
1493 #interrupt-cells = <3>;
1502 interrupt-names = "host_intr0", "host_intr1",
1509 compatible = "ti,am642-pru";
1513 reg-names = "iram", "control", "debug";
1514 firmware-name = "am64x-pru1_0-fw";
1515 interrupt-parent = <&icssg1_intc>;
1517 interrupt-names = "vring";
1521 compatible = "ti,am642-rtu";
1525 reg-names = "iram", "control", "debug";
1526 firmware-name = "am64x-rtu1_0-fw";
1527 interrupt-parent = <&icssg1_intc>;
1529 interrupt-names = "vring";
1533 compatible = "ti,am642-tx-pru";
1537 reg-names = "iram", "control", "debug";
1538 firmware-name = "am64x-txpru1_0-fw";
1542 compatible = "ti,am642-pru";
1546 reg-names = "iram", "control", "debug";
1547 firmware-name = "am64x-pru1_1-fw";
1548 interrupt-parent = <&icssg1_intc>;
1550 interrupt-names = "vring";
1554 compatible = "ti,am642-rtu";
1558 reg-names = "iram", "control", "debug";
1559 firmware-name = "am64x-rtu1_1-fw";
1560 interrupt-parent = <&icssg1_intc>;
1562 interrupt-names = "vring";
1566 compatible = "ti,am642-tx-pru";
1570 reg-names = "iram", "control", "debug";
1571 firmware-name = "am64x-txpru1_1-fw";
1577 #address-cells = <1>;
1578 #size-cells = <0>;
1580 clock-names = "fck";
1590 reg-names = "m_can", "message_ram";
1591 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
1593 clock-names = "hclk", "cclk";
1596 interrupt-names = "int0", "int1";
1597 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1605 reg-names = "m_can", "message_ram";
1606 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
1608 clock-names = "hclk", "cclk";
1611 interrupt-names = "int0", "int1";
1612 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1617 compatible = "ti,am64-sa2ul";
1619 power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
1620 #address-cells = <2>;
1621 #size-cells = <2>;
1625 dma-names = "tx", "rx1", "rx2";
1628 compatible = "inside-secure,safexcel-eip76";
1631 status = "disabled"; /* Used by OP-TEE */
1635 gpmc0: memory-controller@3b000000 {
1636 compatible = "ti,am64-gpmc";
1637 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1639 clock-names = "fck";
1642 reg-names = "cfg", "data";
1644 gpmc,num-cs = <3>;
1645 gpmc,num-waitpins = <2>;
1646 #address-cells = <2>;
1647 #size-cells = <1>;
1648 interrupt-controller;
1649 #interrupt-cells = <2>;
1650 gpio-controller;
1651 #gpio-cells = <2>;
1656 compatible = "ti,am64-elm";
1659 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1661 clock-names = "fck";
1665 main_vtm0: temperature-sensor@b00000 {
1666 compatible = "ti,j7200-vtm";
1669 power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
1670 #thermal-sensor-cells = <1>;