Lines Matching +full:omap4 +full:- +full:hwspinlock
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 gic500: interrupt-controller@1800000 {
16 compatible = "arm,gic-v3";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 #interrupt-cells = <3>;
21 interrupt-controller;
33 gic_its: msi-controller@1820000 {
34 compatible = "arm,gic-v3-its";
36 socionext,synquacer-pre-its = <0x1000000 0x400000>;
37 msi-controller;
38 #msi-cells = <1>;
43 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
50 compatible = "ti,am654-phy-gmii-sel";
52 #phy-cells = <1>;
55 epwm_tbclk: clock-controller@4130 {
56 compatible = "ti,am62-epwm-tbclk";
58 #clock-cells = <1>;
63 compatible = "simple-bus";
64 #address-cells = <2>;
65 #size-cells = <2>;
66 dma-ranges;
68 bootph-all;
70 ti,sci-dev-id = <25>;
73 compatible = "ti,am654-secure-proxy";
74 #mbox-cells = <1>;
75 reg-names = "target_data", "rt", "scfg";
79 interrupt-names = "rx_012";
81 bootph-all;
84 inta_main_dmss: interrupt-controller@48000000 {
85 compatible = "ti,sci-inta";
87 #interrupt-cells = <0>;
88 interrupt-controller;
89 interrupt-parent = <&gic500>;
90 msi-controller;
92 ti,sci-dev-id = <28>;
93 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
96 main_bcdma: dma-controller@485c0100 {
97 compatible = "ti,am64-dmss-bcdma";
107 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
109 msi-parent = <&inta_main_dmss>;
110 #dma-cells = <3>;
113 ti,sci-dev-id = <26>;
114 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
115 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
116 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
117 bootph-all;
120 main_pktdma: dma-controller@485c0000 {
121 compatible = "ti,am64-dmss-pktdma";
130 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
132 msi-parent = <&inta_main_dmss>;
133 #dma-cells = <2>;
134 bootph-all;
137 ti,sci-dev-id = <30>;
138 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
142 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
146 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
152 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
160 compatible = "simple-bus";
162 #address-cells = <2>;
163 #size-cells = <2>;
164 dma-ranges;
165 ti,sci-dev-id = <198>;
167 inta_main_dmss_csi: interrupt-controller@4e400000 {
168 compatible = "ti,sci-inta";
170 #interrupt-cells = <0>;
171 interrupt-controller;
172 interrupt-parent = <&gic500>;
173 msi-controller;
174 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
176 ti,sci-dev-id = <200>;
177 ti,interrupt-ranges = <0 237 8>;
178 ti,unmapped-event-sources = <&main_bcdma_csi>;
181 main_bcdma_csi: dma-controller@4e230000 {
182 compatible = "ti,am62a-dmss-bcdma-csirx";
186 reg-names = "gcfg", "rchanrt", "ringrt";
187 #dma-cells = <3>;
188 msi-parent = <&inta_main_dmss_csi>;
189 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
191 ti,sci-dev-id = <199>;
192 ti,sci-rm-range-rchan = <0x21>;
196 dmsc: system-controller@44043000 {
197 compatible = "ti,k2g-sci";
198 ti,host-id = <12>;
199 mbox-names = "rx", "tx";
202 reg-names = "debug_messages";
204 bootph-all;
206 k3_pds: power-controller {
207 compatible = "ti,sci-pm-domain";
208 #power-domain-cells = <2>;
209 bootph-all;
212 k3_clks: clock-controller {
213 compatible = "ti,k2g-sci-clk";
214 #clock-cells = <2>;
215 bootph-all;
218 k3_reset: reset-controller {
219 compatible = "ti,sci-reset";
220 #reset-cells = <2>;
221 bootph-all;
226 compatible = "ti,am62-sa3ul";
228 #address-cells = <2>;
229 #size-cells = <2>;
232 dma-names = "tx", "rx1", "rx2";
236 compatible = "ti,am654-secure-proxy";
237 #mbox-cells = <1>;
238 reg-names = "target_data", "rt", "scfg";
245 * firmware on non-MPU processors
248 bootph-all;
252 compatible = "pinctrl-single";
254 #pinctrl-cells = <1>;
255 pinctrl-single,register-width = <32>;
256 pinctrl-single,function-mask = <0xffffffff>;
257 bootph-all;
261 compatible = "ti,j721e-esm";
263 bootph-pre-ram;
265 ti,esm-pins = <224>, <225>, <227>, <241>, <242>, <248>;
269 compatible = "ti,am654-timer";
273 clock-names = "fck";
274 assigned-clocks = <&k3_clks 36 2>;
275 assigned-clock-parents = <&k3_clks 36 3>;
276 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
277 ti,timer-pwm;
278 bootph-all;
282 compatible = "ti,am654-timer";
286 clock-names = "fck";
287 assigned-clocks = <&k3_clks 37 2>;
288 assigned-clock-parents = <&k3_clks 37 3>;
289 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
290 ti,timer-pwm;
294 compatible = "ti,am654-timer";
298 clock-names = "fck";
299 assigned-clocks = <&k3_clks 38 2>;
300 assigned-clock-parents = <&k3_clks 38 3>;
301 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
302 ti,timer-pwm;
306 compatible = "ti,am654-timer";
310 clock-names = "fck";
311 assigned-clocks = <&k3_clks 39 2>;
312 assigned-clock-parents = <&k3_clks 39 3>;
313 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
314 ti,timer-pwm;
318 compatible = "ti,am654-timer";
322 clock-names = "fck";
323 assigned-clocks = <&k3_clks 40 2>;
324 assigned-clock-parents = <&k3_clks 40 3>;
325 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
326 ti,timer-pwm;
330 compatible = "ti,am654-timer";
334 clock-names = "fck";
335 assigned-clocks = <&k3_clks 41 2>;
336 assigned-clock-parents = <&k3_clks 41 3>;
337 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
338 ti,timer-pwm;
342 compatible = "ti,am654-timer";
346 clock-names = "fck";
347 assigned-clocks = <&k3_clks 42 2>;
348 assigned-clock-parents = <&k3_clks 42 3>;
349 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
350 ti,timer-pwm;
354 compatible = "ti,am654-timer";
358 clock-names = "fck";
359 assigned-clocks = <&k3_clks 43 2>;
360 assigned-clock-parents = <&k3_clks 43 3>;
361 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
362 ti,timer-pwm;
366 compatible = "ti,am64-uart", "ti,am654-uart";
369 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
371 clock-names = "fclk";
376 compatible = "ti,am64-uart", "ti,am654-uart";
379 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
381 clock-names = "fclk";
386 compatible = "ti,am64-uart", "ti,am654-uart";
389 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
391 clock-names = "fclk";
396 compatible = "ti,am64-uart", "ti,am654-uart";
399 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
401 clock-names = "fclk";
406 compatible = "ti,am64-uart", "ti,am654-uart";
409 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
411 clock-names = "fclk";
416 compatible = "ti,am64-uart", "ti,am654-uart";
419 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
421 clock-names = "fclk";
426 compatible = "ti,am64-uart", "ti,am654-uart";
429 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
431 clock-names = "fclk";
436 compatible = "ti,am64-i2c", "ti,omap4-i2c";
439 #address-cells = <1>;
440 #size-cells = <0>;
441 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
443 clock-names = "fck";
448 compatible = "ti,am64-i2c", "ti,omap4-i2c";
451 #address-cells = <1>;
452 #size-cells = <0>;
453 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
455 clock-names = "fck";
460 compatible = "ti,am64-i2c", "ti,omap4-i2c";
463 #address-cells = <1>;
464 #size-cells = <0>;
465 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
467 clock-names = "fck";
472 compatible = "ti,am64-i2c", "ti,omap4-i2c";
475 #address-cells = <1>;
476 #size-cells = <0>;
477 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
479 clock-names = "fck";
484 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
487 #address-cells = <1>;
488 #size-cells = <0>;
489 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
495 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
498 #address-cells = <1>;
499 #size-cells = <0>;
500 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
506 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
509 #address-cells = <1>;
510 #size-cells = <0>;
511 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
516 main_gpio_intr: interrupt-controller@a00000 {
517 compatible = "ti,sci-intr";
519 ti,intr-trigger-type = <1>;
520 interrupt-controller;
521 interrupt-parent = <&gic500>;
522 #interrupt-cells = <1>;
524 ti,sci-dev-id = <3>;
525 ti,interrupt-ranges = <0 32 16>;
529 compatible = "ti,am64-gpio", "ti,keystone-gpio";
531 gpio-controller;
532 #gpio-cells = <2>;
533 interrupt-parent = <&main_gpio_intr>;
536 interrupt-controller;
537 #interrupt-cells = <2>;
538 ti,davinci-gpio-unbanked = <0>;
539 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
541 clock-names = "gpio";
545 compatible = "ti,am64-gpio", "ti,keystone-gpio";
547 gpio-controller;
548 #gpio-cells = <2>;
549 interrupt-parent = <&main_gpio_intr>;
552 interrupt-controller;
553 #interrupt-cells = <2>;
554 ti,davinci-gpio-unbanked = <0>;
555 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
557 clock-names = "gpio";
561 compatible = "ti,am64-sdhci-8bit";
564 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
566 clock-names = "clk_ahb", "clk_xin";
567 assigned-clocks = <&k3_clks 57 2>;
568 assigned-clock-parents = <&k3_clks 57 4>;
569 bus-width = <8>;
570 mmc-ddr-1_8v;
571 mmc-hs200-1_8v;
572 mmc-hs400-1_8v;
573 ti,clkbuf-sel = <0x7>;
574 ti,strobe-sel = <0x77>;
575 ti,trm-icp = <0x8>;
576 ti,otap-del-sel-legacy = <0x1>;
577 ti,otap-del-sel-mmc-hs = <0x1>;
578 ti,otap-del-sel-ddr52 = <0x6>;
579 ti,otap-del-sel-hs200 = <0x8>;
580 ti,otap-del-sel-hs400 = <0x5>;
581 ti,itap-del-sel-legacy = <0x10>;
582 ti,itap-del-sel-mmc-hs = <0xa>;
583 ti,itap-del-sel-ddr52 = <0x3>;
588 compatible = "ti,am62-sdhci";
591 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
593 clock-names = "clk_ahb", "clk_xin";
594 bus-width = <4>;
595 ti,clkbuf-sel = <0x7>;
596 ti,otap-del-sel-legacy = <0x0>;
597 ti,otap-del-sel-sd-hs = <0x0>;
598 ti,otap-del-sel-sdr12 = <0xf>;
599 ti,otap-del-sel-sdr25 = <0xf>;
600 ti,otap-del-sel-sdr50 = <0xc>;
601 ti,otap-del-sel-ddr50 = <0x9>;
602 ti,otap-del-sel-sdr104 = <0x6>;
603 ti,itap-del-sel-legacy = <0x0>;
604 ti,itap-del-sel-sd-hs = <0x0>;
605 ti,itap-del-sel-sdr12 = <0x0>;
606 ti,itap-del-sel-sdr25 = <0x0>;
611 compatible = "ti,am62-sdhci";
614 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
616 clock-names = "clk_ahb", "clk_xin";
617 bus-width = <4>;
618 ti,clkbuf-sel = <0x7>;
619 ti,otap-del-sel-legacy = <0x0>;
620 ti,otap-del-sel-sd-hs = <0x0>;
621 ti,otap-del-sel-sdr12 = <0xf>;
622 ti,otap-del-sel-sdr25 = <0xf>;
623 ti,otap-del-sel-sdr50 = <0xc>;
624 ti,otap-del-sel-ddr50 = <0x9>;
625 ti,otap-del-sel-sdr104 = <0x6>;
626 ti,itap-del-sel-legacy = <0x0>;
627 ti,itap-del-sel-sd-hs = <0x0>;
628 ti,itap-del-sel-sdr12 = <0x0>;
629 ti,itap-del-sel-sdr25 = <0x0>;
634 compatible = "ti,am62-usb";
638 clock-names = "ref";
639 ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
640 #address-cells = <2>;
641 #size-cells = <2>;
642 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
651 interrupt-names = "host", "peripheral";
652 maximum-speed = "high-speed";
654 snps,usb2-gadget-lpm-disable;
655 snps,usb2-lpm-disable;
660 compatible = "simple-bus";
662 #address-cells = <2>;
663 #size-cells = <2>;
667 compatible = "ti,am654-ospi", "cdns,qspi-nor";
671 cdns,fifo-depth = <256>;
672 cdns,fifo-width = <4>;
673 cdns,trigger-address = <0x0>;
675 assigned-clocks = <&k3_clks 75 7>;
676 assigned-clock-parents = <&k3_clks 75 8>;
677 assigned-clock-rates = <166666666>;
678 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
679 #address-cells = <1>;
680 #size-cells = <0>;
686 compatible = "ti,am642-cpsw-nuss";
687 #address-cells = <2>;
688 #size-cells = <2>;
690 reg-names = "cpsw_nuss";
693 assigned-clocks = <&k3_clks 13 3>;
694 assigned-clock-parents = <&k3_clks 13 11>;
695 clock-names = "fck";
696 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
708 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
711 ethernet-ports {
712 #address-cells = <1>;
713 #size-cells = <0>;
717 ti,mac-only;
720 mac-address = [00 00 00 00 00 00];
721 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
727 ti,mac-only;
730 mac-address = [00 00 00 00 00 00];
736 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
738 #address-cells = <1>;
739 #size-cells = <0>;
741 clock-names = "fck";
747 compatible = "ti,j721e-cpts";
750 clock-names = "cpts";
751 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
752 interrupt-names = "cpts";
753 ti,cpts-ext-ts-inputs = <4>;
754 ti,cpts-periodic-outputs = <2>;
758 hwspinlock: spinlock@2a000000 { label
759 compatible = "ti,am64-hwspinlock";
761 #hwlock-cells = <1>;
765 compatible = "ti,am64-mailbox";
768 #mbox-cells = <1>;
769 ti,mbox-num-users = <4>;
770 ti,mbox-num-fifos = <16>;
774 compatible = "ti,am64-mailbox";
777 #mbox-cells = <1>;
778 ti,mbox-num-users = <4>;
779 ti,mbox-num-fifos = <16>;
783 compatible = "ti,am64-mailbox";
786 #mbox-cells = <1>;
787 ti,mbox-num-users = <4>;
788 ti,mbox-num-fifos = <16>;
792 compatible = "ti,am64-mailbox";
795 #mbox-cells = <1>;
796 ti,mbox-num-users = <4>;
797 ti,mbox-num-fifos = <16>;
801 compatible = "ti,am3352-ecap";
802 #pwm-cells = <3>;
804 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
806 clock-names = "fck";
811 compatible = "ti,am3352-ecap";
812 #pwm-cells = <3>;
814 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
816 clock-names = "fck";
821 compatible = "ti,am3352-ecap";
822 #pwm-cells = <3>;
824 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
826 clock-names = "fck";
831 compatible = "ti,am62-eqep";
833 power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
840 compatible = "ti,am62-eqep";
842 power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
849 compatible = "ti,am62-eqep";
851 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
861 reg-names = "m_can", "message_ram";
862 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
864 clock-names = "hclk", "cclk";
867 interrupt-names = "int0", "int1";
868 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
876 reg-names = "m_can", "message_ram";
877 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
879 clock-names = "hclk", "cclk";
882 interrupt-names = "int0", "int1";
883 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
888 compatible = "ti,j7-rti-wdt";
891 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
892 assigned-clocks = <&k3_clks 125 0>;
893 assigned-clock-parents = <&k3_clks 125 2>;
897 compatible = "ti,j7-rti-wdt";
900 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
901 assigned-clocks = <&k3_clks 126 0>;
902 assigned-clock-parents = <&k3_clks 126 2>;
906 compatible = "ti,j7-rti-wdt";
909 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
910 assigned-clocks = <&k3_clks 127 0>;
911 assigned-clock-parents = <&k3_clks 127 2>;
915 compatible = "ti,j7-rti-wdt";
918 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
919 assigned-clocks = <&k3_clks 128 0>;
920 assigned-clock-parents = <&k3_clks 128 2>;
924 compatible = "ti,j7-rti-wdt";
927 power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
928 assigned-clocks = <&k3_clks 130 0>;
929 assigned-clock-parents = <&k3_clks 130 2>;
933 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
934 #pwm-cells = <3>;
936 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
938 clock-names = "tbclk", "fck";
943 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
944 #pwm-cells = <3>;
946 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
948 clock-names = "tbclk", "fck";
953 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
954 #pwm-cells = <3>;
956 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
958 clock-names = "tbclk", "fck";
962 mcasp0: audio-controller@2b00000 {
963 compatible = "ti,am33xx-mcasp-audio";
966 reg-names = "mpu", "dat";
969 interrupt-names = "tx", "rx";
972 dma-names = "tx", "rx";
975 clock-names = "fck";
976 assigned-clocks = <&k3_clks 190 0>;
977 assigned-clock-parents = <&k3_clks 190 2>;
978 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
982 mcasp1: audio-controller@2b10000 {
983 compatible = "ti,am33xx-mcasp-audio";
986 reg-names = "mpu", "dat";
989 interrupt-names = "tx", "rx";
992 dma-names = "tx", "rx";
995 clock-names = "fck";
996 assigned-clocks = <&k3_clks 191 0>;
997 assigned-clock-parents = <&k3_clks 191 2>;
998 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
1002 mcasp2: audio-controller@2b20000 {
1003 compatible = "ti,am33xx-mcasp-audio";
1006 reg-names = "mpu", "dat";
1009 interrupt-names = "tx", "rx";
1012 dma-names = "tx", "rx";
1015 clock-names = "fck";
1016 assigned-clocks = <&k3_clks 192 0>;
1017 assigned-clock-parents = <&k3_clks 192 2>;
1018 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
1023 compatible = "ti,j721e-csi2rx-shim";
1026 #address-cells = <2>;
1027 #size-cells = <2>;
1029 dma-names = "rx0";
1030 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1033 cdns_csi2rx0: csi-bridge@30101000 {
1034 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1038 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1041 phy-names = "dphy";
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1076 compatible = "cdns,dphy-rx";
1078 #phy-cells = <0>;
1079 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
1083 vpu: video-codec@30210000 {
1084 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
1088 power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;