Lines Matching +full:am654 +full:- +full:mcspi
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "pinctrl-single";
12 #pinctrl-cells = <1>;
13 pinctrl-single,register-width = <32>;
14 pinctrl-single,function-mask = <0xffffffff>;
18 compatible = "ti,j721e-esm";
20 bootph-pre-ram;
22 ti,esm-pins = <0>, <1>, <2>, <85>;
31 compatible = "ti,am654-timer";
34 clock-names = "fck";
35 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
36 ti,timer-pwm;
41 compatible = "ti,am654-timer";
44 clock-names = "fck";
45 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
46 ti,timer-pwm;
51 compatible = "ti,am654-timer";
54 clock-names = "fck";
55 power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
56 ti,timer-pwm;
61 compatible = "ti,am654-timer";
64 clock-names = "fck";
65 power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
66 ti,timer-pwm;
71 compatible = "ti,am64-uart", "ti,am654-uart";
74 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
76 clock-names = "fclk";
81 compatible = "ti,am64-i2c", "ti,omap4-i2c";
84 #address-cells = <1>;
85 #size-cells = <0>;
86 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
88 clock-names = "fck";
93 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
96 #address-cells = <1>;
97 #size-cells = <0>;
98 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
104 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
107 #address-cells = <1>;
108 #size-cells = <0>;
109 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
114 mcu_gpio_intr: interrupt-controller@4210000 {
115 compatible = "ti,sci-intr";
117 ti,intr-trigger-type = <1>;
118 interrupt-controller;
119 interrupt-parent = <&gic500>;
120 #interrupt-cells = <1>;
122 ti,sci-dev-id = <5>;
123 ti,interrupt-ranges = <0 104 4>;
127 compatible = "ti,am64-gpio", "ti,keystone-gpio";
129 gpio-controller;
130 #gpio-cells = <2>;
131 interrupt-parent = <&mcu_gpio_intr>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
136 ti,davinci-gpio-unbanked = <0>;
137 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
139 clock-names = "gpio";
144 compatible = "ti,j7-rti-wdt";
147 power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
148 assigned-clocks = <&k3_clks 131 0>;
149 assigned-clock-parents = <&k3_clks 131 2>;
158 reg-names = "m_can", "message_ram";
159 power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
161 clock-names = "hclk", "cclk";
162 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
170 reg-names = "m_can", "message_ram";
171 power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
173 clock-names = "hclk", "cclk";
174 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;