Lines Matching +full:omap4 +full:- +full:mcspi
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
29 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
52 compatible = "ti,am654-phy-gmii-sel";
54 #phy-cells = <1>;
57 epwm_tbclk: clock-controller@4130 {
58 compatible = "ti,am62-epwm-tbclk";
60 #clock-cells = <1>;
63 audio_refclk0: clock-controller@82e0 {
64 compatible = "ti,am62-audio-refclk";
67 assigned-clocks = <&k3_clks 157 0>;
68 assigned-clock-parents = <&k3_clks 157 8>;
69 #clock-cells = <0>;
72 audio_refclk1: clock-controller@82e4 {
73 compatible = "ti,am62-audio-refclk";
76 assigned-clocks = <&k3_clks 157 10>;
77 assigned-clock-parents = <&k3_clks 157 18>;
78 #clock-cells = <0>;
83 compatible = "simple-bus";
84 #address-cells = <2>;
85 #size-cells = <2>;
86 dma-ranges;
89 ti,sci-dev-id = <25>;
92 compatible = "ti,am654-secure-proxy";
96 reg-names = "target_data", "rt", "scfg";
97 #mbox-cells = <1>;
98 interrupt-names = "rx_012";
102 inta_main_dmss: interrupt-controller@48000000 {
103 compatible = "ti,sci-inta";
105 #interrupt-cells = <0>;
106 interrupt-controller;
107 interrupt-parent = <&gic500>;
108 msi-controller;
110 ti,sci-dev-id = <28>;
111 ti,interrupt-ranges = <6 70 34>;
112 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
115 main_bcdma: dma-controller@485c0100 {
116 compatible = "ti,am64-dmss-bcdma";
126 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
128 msi-parent = <&inta_main_dmss>;
129 #dma-cells = <3>;
131 ti,sci-dev-id = <26>;
132 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
133 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
134 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
137 main_pktdma: dma-controller@485c0000 {
138 compatible = "ti,am64-dmss-pktdma";
147 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
149 msi-parent = <&inta_main_dmss>;
150 #dma-cells = <2>;
152 ti,sci-dev-id = <30>;
153 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
157 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
161 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
167 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
175 compatible = "simple-bus";
176 #address-cells = <2>;
177 #size-cells = <2>;
178 dma-ranges;
181 ti,sci-dev-id = <198>;
183 inta_main_dmss_csi: interrupt-controller@4e0a0000 {
184 compatible = "ti,sci-inta";
186 #interrupt-cells = <0>;
187 interrupt-controller;
188 interrupt-parent = <&gic500>;
189 msi-controller;
191 ti,sci-dev-id = <200>;
192 ti,interrupt-ranges = <0 237 8>;
193 ti,unmapped-event-sources = <&main_bcdma_csi>;
194 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
197 main_bcdma_csi: dma-controller@4e230000 {
198 compatible = "ti,am62a-dmss-bcdma-csirx";
202 reg-names = "gcfg", "rchanrt", "ringrt";
203 msi-parent = <&inta_main_dmss_csi>;
204 #dma-cells = <3>;
206 ti,sci-dev-id = <199>;
207 ti,sci-rm-range-rchan = <0x21>;
208 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
212 dmsc: system-controller@44043000 {
213 compatible = "ti,k2g-sci";
215 reg-names = "debug_messages";
216 ti,host-id = <12>;
217 mbox-names = "rx", "tx";
221 k3_pds: power-controller {
222 compatible = "ti,sci-pm-domain";
223 #power-domain-cells = <2>;
226 k3_clks: clock-controller {
227 compatible = "ti,k2g-sci-clk";
228 #clock-cells = <2>;
231 k3_reset: reset-controller {
232 compatible = "ti,sci-reset";
233 #reset-cells = <2>;
238 compatible = "ti,am62-sa3ul";
242 dma-names = "tx", "rx1", "rx2";
246 compatible = "ti,am654-secure-proxy";
247 #mbox-cells = <1>;
248 reg-names = "target_data", "rt", "scfg";
255 * firmware on non-MPU processors
261 compatible = "pinctrl-single";
263 #pinctrl-cells = <1>;
264 pinctrl-single,register-width = <32>;
265 pinctrl-single,function-mask = <0xffffffff>;
269 compatible = "ti,j721e-esm";
271 bootph-pre-ram;
273 ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
277 compatible = "ti,am654-timer";
281 clock-names = "fck";
282 assigned-clocks = <&k3_clks 36 2>;
283 assigned-clock-parents = <&k3_clks 36 3>;
284 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
285 ti,timer-pwm;
289 compatible = "ti,am654-timer";
293 clock-names = "fck";
294 assigned-clocks = <&k3_clks 37 2>;
295 assigned-clock-parents = <&k3_clks 37 3>;
296 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
297 ti,timer-pwm;
301 compatible = "ti,am654-timer";
305 clock-names = "fck";
306 assigned-clocks = <&k3_clks 38 2>;
307 assigned-clock-parents = <&k3_clks 38 3>;
308 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
309 ti,timer-pwm;
313 compatible = "ti,am654-timer";
317 clock-names = "fck";
318 assigned-clocks = <&k3_clks 39 2>;
319 assigned-clock-parents = <&k3_clks 39 3>;
320 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
321 ti,timer-pwm;
325 compatible = "ti,am654-timer";
329 clock-names = "fck";
330 assigned-clocks = <&k3_clks 40 2>;
331 assigned-clock-parents = <&k3_clks 40 3>;
332 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
333 ti,timer-pwm;
337 compatible = "ti,am654-timer";
341 clock-names = "fck";
342 assigned-clocks = <&k3_clks 41 2>;
343 assigned-clock-parents = <&k3_clks 41 3>;
344 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
345 ti,timer-pwm;
349 compatible = "ti,am654-timer";
353 clock-names = "fck";
354 assigned-clocks = <&k3_clks 42 2>;
355 assigned-clock-parents = <&k3_clks 42 3>;
356 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
357 ti,timer-pwm;
361 compatible = "ti,am654-timer";
365 clock-names = "fck";
366 assigned-clocks = <&k3_clks 43 2>;
367 assigned-clock-parents = <&k3_clks 43 3>;
368 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
369 ti,timer-pwm;
373 compatible = "ti,am64-uart", "ti,am654-uart";
376 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
378 clock-names = "fclk";
383 compatible = "ti,am64-uart", "ti,am654-uart";
386 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
388 clock-names = "fclk";
393 compatible = "ti,am64-uart", "ti,am654-uart";
396 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
398 clock-names = "fclk";
403 compatible = "ti,am64-uart", "ti,am654-uart";
406 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
408 clock-names = "fclk";
413 compatible = "ti,am64-uart", "ti,am654-uart";
416 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
418 clock-names = "fclk";
423 compatible = "ti,am64-uart", "ti,am654-uart";
426 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
428 clock-names = "fclk";
433 compatible = "ti,am64-uart", "ti,am654-uart";
436 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
438 clock-names = "fclk";
443 compatible = "ti,am64-i2c", "ti,omap4-i2c";
446 #address-cells = <1>;
447 #size-cells = <0>;
448 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
450 clock-names = "fck";
455 compatible = "ti,am64-i2c", "ti,omap4-i2c";
458 #address-cells = <1>;
459 #size-cells = <0>;
460 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
462 clock-names = "fck";
467 compatible = "ti,am64-i2c", "ti,omap4-i2c";
470 #address-cells = <1>;
471 #size-cells = <0>;
472 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
474 clock-names = "fck";
479 compatible = "ti,am64-i2c", "ti,omap4-i2c";
482 #address-cells = <1>;
483 #size-cells = <0>;
484 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
486 clock-names = "fck";
491 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
494 #address-cells = <1>;
495 #size-cells = <0>;
496 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
502 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
505 #address-cells = <1>;
506 #size-cells = <0>;
507 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
513 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
516 #address-cells = <1>;
517 #size-cells = <0>;
518 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
523 main_gpio_intr: interrupt-controller@a00000 {
524 compatible = "ti,sci-intr";
526 ti,intr-trigger-type = <1>;
527 interrupt-controller;
528 interrupt-parent = <&gic500>;
529 #interrupt-cells = <1>;
531 ti,sci-dev-id = <3>;
532 ti,interrupt-ranges = <0 32 16>;
537 compatible = "ti,am64-gpio", "ti,keystone-gpio";
539 gpio-controller;
540 #gpio-cells = <2>;
541 interrupt-parent = <&main_gpio_intr>;
544 interrupt-controller;
545 #interrupt-cells = <2>;
547 ti,davinci-gpio-unbanked = <0>;
548 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
550 clock-names = "gpio";
555 compatible = "ti,am64-gpio", "ti,keystone-gpio";
557 gpio-controller;
558 #gpio-cells = <2>;
559 interrupt-parent = <&main_gpio_intr>;
562 interrupt-controller;
563 #interrupt-cells = <2>;
565 ti,davinci-gpio-unbanked = <0>;
566 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
568 clock-names = "gpio";
573 compatible = "ti,am62-sdhci";
576 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
578 clock-names = "clk_ahb", "clk_xin";
579 assigned-clocks = <&k3_clks 57 6>;
580 assigned-clock-parents = <&k3_clks 57 8>;
581 bus-width = <8>;
582 mmc-hs200-1_8v;
583 ti,clkbuf-sel = <0x7>;
584 ti,otap-del-sel-legacy = <0x0>;
585 ti,otap-del-sel-mmc-hs = <0x0>;
586 ti,otap-del-sel-hs200 = <0x6>;
591 compatible = "ti,am62-sdhci";
594 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
596 clock-names = "clk_ahb", "clk_xin";
597 bus-width = <4>;
598 ti,clkbuf-sel = <0x7>;
599 ti,otap-del-sel-legacy = <0x0>;
600 ti,otap-del-sel-sd-hs = <0x0>;
601 ti,otap-del-sel-sdr12 = <0xf>;
602 ti,otap-del-sel-sdr25 = <0xf>;
603 ti,otap-del-sel-sdr50 = <0xc>;
604 ti,otap-del-sel-sdr104 = <0x6>;
605 ti,otap-del-sel-ddr50 = <0x9>;
606 ti,itap-del-sel-legacy = <0x0>;
607 ti,itap-del-sel-sd-hs = <0x0>;
608 ti,itap-del-sel-sdr12 = <0x0>;
609 ti,itap-del-sel-sdr25 = <0x0>;
614 compatible = "ti,am62-sdhci";
617 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
619 clock-names = "clk_ahb", "clk_xin";
620 bus-width = <4>;
621 ti,clkbuf-sel = <0x7>;
622 ti,otap-del-sel-legacy = <0x0>;
623 ti,otap-del-sel-sd-hs = <0x0>;
624 ti,otap-del-sel-sdr12 = <0xf>;
625 ti,otap-del-sel-sdr25 = <0xf>;
626 ti,otap-del-sel-sdr50 = <0xc>;
627 ti,otap-del-sel-sdr104 = <0x6>;
628 ti,otap-del-sel-ddr50 = <0x9>;
629 ti,itap-del-sel-legacy = <0x0>;
630 ti,itap-del-sel-sd-hs = <0x0>;
631 ti,itap-del-sel-sdr12 = <0x0>;
632 ti,itap-del-sel-sdr25 = <0x0>;
636 usbss0: dwc3-usb@f900000 {
637 compatible = "ti,am62-usb";
641 clock-names = "ref";
642 ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
643 #address-cells = <2>;
644 #size-cells = <2>;
645 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
654 interrupt-names = "host", "peripheral";
655 maximum-speed = "high-speed";
657 snps,usb2-gadget-lpm-disable;
658 snps,usb2-lpm-disable;
662 usbss1: dwc3-usb@f910000 {
663 compatible = "ti,am62-usb";
667 clock-names = "ref";
668 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
669 #address-cells = <2>;
670 #size-cells = <2>;
671 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
680 interrupt-names = "host", "peripheral";
681 maximum-speed = "high-speed";
683 snps,usb2-gadget-lpm-disable;
684 snps,usb2-lpm-disable;
689 compatible = "simple-bus";
691 #address-cells = <2>;
692 #size-cells = <2>;
697 compatible = "ti,am654-ospi", "cdns,qspi-nor";
701 cdns,fifo-depth = <256>;
702 cdns,fifo-width = <4>;
703 cdns,trigger-address = <0x0>;
705 assigned-clocks = <&k3_clks 75 7>;
706 assigned-clock-parents = <&k3_clks 75 8>;
707 assigned-clock-rates = <166666666>;
708 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
709 #address-cells = <1>;
710 #size-cells = <0>;
715 compatible = "ti,am642-cpsw-nuss";
716 #address-cells = <2>;
717 #size-cells = <2>;
719 reg-names = "cpsw_nuss";
722 assigned-clocks = <&k3_clks 13 3>;
723 assigned-clock-parents = <&k3_clks 13 11>;
724 clock-names = "fck";
725 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
737 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
740 ethernet-ports {
741 #address-cells = <1>;
742 #size-cells = <0>;
746 ti,mac-only;
749 mac-address = [00 00 00 00 00 00];
750 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
755 ti,mac-only;
758 mac-address = [00 00 00 00 00 00];
763 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
765 #address-cells = <1>;
766 #size-cells = <0>;
768 clock-names = "fck";
773 compatible = "ti,j721e-cpts";
776 clock-names = "cpts";
777 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
778 interrupt-names = "cpts";
779 ti,cpts-ext-ts-inputs = <4>;
780 ti,cpts-periodic-outputs = <2>;
785 compatible = "ti,am64-hwspinlock";
787 #hwlock-cells = <1>;
791 compatible = "ti,am64-mailbox";
794 #mbox-cells = <1>;
795 ti,mbox-num-users = <4>;
796 ti,mbox-num-fifos = <16>;
800 compatible = "ti,am64-mailbox";
803 #mbox-cells = <1>;
804 ti,mbox-num-users = <4>;
805 ti,mbox-num-fifos = <16>;
809 compatible = "ti,am64-mailbox";
812 #mbox-cells = <1>;
813 ti,mbox-num-users = <4>;
814 ti,mbox-num-fifos = <16>;
818 compatible = "ti,am64-mailbox";
821 #mbox-cells = <1>;
822 ti,mbox-num-users = <4>;
823 ti,mbox-num-fifos = <16>;
830 reg-names = "m_can", "message_ram";
831 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
833 clock-names = "hclk", "cclk";
836 interrupt-names = "int0", "int1";
837 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
842 compatible = "ti,j7-rti-wdt";
845 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
846 assigned-clocks = <&k3_clks 125 0>;
847 assigned-clock-parents = <&k3_clks 125 2>;
851 compatible = "ti,j7-rti-wdt";
854 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
855 assigned-clocks = <&k3_clks 126 0>;
856 assigned-clock-parents = <&k3_clks 126 2>;
860 compatible = "ti,j7-rti-wdt";
863 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
864 assigned-clocks = <&k3_clks 127 0>;
865 assigned-clock-parents = <&k3_clks 127 2>;
869 compatible = "ti,j7-rti-wdt";
872 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
873 assigned-clocks = <&k3_clks 128 0>;
874 assigned-clock-parents = <&k3_clks 128 2>;
878 compatible = "ti,j7-rti-wdt";
881 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
882 assigned-clocks = <&k3_clks 205 0>;
883 assigned-clock-parents = <&k3_clks 205 2>;
887 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
888 #pwm-cells = <3>;
890 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
892 clock-names = "tbclk", "fck";
897 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
898 #pwm-cells = <3>;
900 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
902 clock-names = "tbclk", "fck";
907 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
908 #pwm-cells = <3>;
910 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
912 clock-names = "tbclk", "fck";
917 compatible = "ti,am3352-ecap";
918 #pwm-cells = <3>;
920 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
922 clock-names = "fck";
927 compatible = "ti,am3352-ecap";
928 #pwm-cells = <3>;
930 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
932 clock-names = "fck";
937 compatible = "ti,am3352-ecap";
938 #pwm-cells = <3>;
940 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
942 clock-names = "fck";
946 mcasp0: audio-controller@2b00000 {
947 compatible = "ti,am33xx-mcasp-audio";
950 reg-names = "mpu", "dat";
953 interrupt-names = "tx", "rx";
956 dma-names = "tx", "rx";
959 clock-names = "fck";
960 assigned-clocks = <&k3_clks 190 0>;
961 assigned-clock-parents = <&k3_clks 190 2>;
962 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
966 mcasp1: audio-controller@2b10000 {
967 compatible = "ti,am33xx-mcasp-audio";
970 reg-names = "mpu", "dat";
973 interrupt-names = "tx", "rx";
976 dma-names = "tx", "rx";
979 clock-names = "fck";
980 assigned-clocks = <&k3_clks 191 0>;
981 assigned-clock-parents = <&k3_clks 191 2>;
982 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
986 mcasp2: audio-controller@2b20000 {
987 compatible = "ti,am33xx-mcasp-audio";
990 reg-names = "mpu", "dat";
993 interrupt-names = "tx", "rx";
996 dma-names = "tx", "rx";
999 clock-names = "fck";
1000 assigned-clocks = <&k3_clks 192 0>;
1001 assigned-clock-parents = <&k3_clks 192 2>;
1002 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
1007 compatible = "ti,j721e-csi2rx-shim";
1009 dma-names = "rx0";
1011 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1012 #address-cells = <2>;
1013 #size-cells = <2>;
1017 cdns_csi2rx0: csi-bridge@30101000 {
1018 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1022 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1025 phy-names = "dphy";
1028 #address-cells = <1>;
1029 #size-cells = <0>;
1060 compatible = "cdns,dphy-rx";
1062 #phy-cells = <0>;
1063 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
1068 compatible = "ti,am62a7-dss";
1077 reg-names = "common", "vidl1", "vid",
1079 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
1083 clock-names = "fck", "vp1", "vp2";
1088 #address-cells = <1>;
1089 #size-cells = <0>;
1093 vpu: video-codec@30210000 {
1094 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
1097 power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
1100 e5010: jpeg-encoder@fd20000 {
1101 compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc";
1104 reg-names = "core", "mmu";
1106 power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;