Lines Matching +full:num +full:- +full:domains
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
28 interrupt-controller;
35 gic_its: msi-controller@1820000 {
36 compatible = "arm,gic-v3-its";
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
39 msi-controller;
40 #msi-cells = <1>;
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
51 compatible = "ti,am654-phy-gmii-sel";
53 #phy-cells = <1>;
56 epwm_tbclk: clock-controller@4130 {
57 compatible = "ti,am62-epwm-tbclk";
59 #clock-cells = <1>;
62 audio_refclk0: clock-controller@82e0 {
63 compatible = "ti,am62-audio-refclk";
66 assigned-clocks = <&k3_clks 157 0>;
67 assigned-clock-parents = <&k3_clks 157 8>;
68 #clock-cells = <0>;
71 audio_refclk1: clock-controller@82e4 {
72 compatible = "ti,am62-audio-refclk";
75 assigned-clocks = <&k3_clks 157 10>;
76 assigned-clock-parents = <&k3_clks 157 18>;
77 #clock-cells = <0>;
82 compatible = "simple-bus";
83 #address-cells = <2>;
84 #size-cells = <2>;
85 dma-ranges;
88 ti,sci-dev-id = <25>;
91 compatible = "ti,am654-secure-proxy";
95 reg-names = "target_data", "rt", "scfg";
96 #mbox-cells = <1>;
97 interrupt-names = "rx_012";
101 inta_main_dmss: interrupt-controller@48000000 {
102 compatible = "ti,sci-inta";
104 #interrupt-cells = <0>;
105 interrupt-controller;
106 interrupt-parent = <&gic500>;
107 msi-controller;
109 ti,sci-dev-id = <28>;
110 ti,interrupt-ranges = <6 70 34>;
111 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
114 main_bcdma: dma-controller@485c0100 {
115 compatible = "ti,am64-dmss-bcdma";
125 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
127 msi-parent = <&inta_main_dmss>;
128 #dma-cells = <3>;
130 ti,sci-dev-id = <26>;
131 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
132 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
133 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
136 main_pktdma: dma-controller@485c0000 {
137 compatible = "ti,am64-dmss-pktdma";
146 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
148 msi-parent = <&inta_main_dmss>;
149 #dma-cells = <2>;
151 ti,sci-dev-id = <30>;
152 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
156 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
160 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
166 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
174 compatible = "simple-bus";
175 #address-cells = <2>;
176 #size-cells = <2>;
177 dma-ranges;
180 ti,sci-dev-id = <198>;
182 inta_main_dmss_csi: interrupt-controller@4e0a0000 {
183 compatible = "ti,sci-inta";
185 #interrupt-cells = <0>;
186 interrupt-controller;
187 interrupt-parent = <&gic500>;
188 msi-controller;
190 ti,sci-dev-id = <200>;
191 ti,interrupt-ranges = <0 237 8>;
192 ti,unmapped-event-sources = <&main_bcdma_csi>;
193 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
196 main_bcdma_csi: dma-controller@4e230000 {
197 compatible = "ti,am62a-dmss-bcdma-csirx";
201 reg-names = "gcfg", "rchanrt", "ringrt";
202 msi-parent = <&inta_main_dmss_csi>;
203 #dma-cells = <3>;
205 ti,sci-dev-id = <199>;
206 ti,sci-rm-range-rchan = <0x21>;
207 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
211 dmsc: system-controller@44043000 {
212 compatible = "ti,k2g-sci";
214 reg-names = "debug_messages";
215 ti,host-id = <12>;
216 mbox-names = "rx", "tx";
220 k3_pds: power-controller {
221 compatible = "ti,sci-pm-domain";
222 #power-domain-cells = <2>;
225 k3_clks: clock-controller {
226 compatible = "ti,k2g-sci-clk";
227 #clock-cells = <2>;
230 k3_reset: reset-controller {
231 compatible = "ti,sci-reset";
232 #reset-cells = <2>;
237 compatible = "ti,am62-sa3ul";
241 dma-names = "tx", "rx1", "rx2";
245 compatible = "ti,am654-secure-proxy";
246 #mbox-cells = <1>;
247 reg-names = "target_data", "rt", "scfg";
254 * firmware on non-MPU processors
260 compatible = "pinctrl-single";
262 #pinctrl-cells = <1>;
263 pinctrl-single,register-width = <32>;
264 pinctrl-single,function-mask = <0xffffffff>;
268 compatible = "ti,j721e-esm";
270 bootph-pre-ram;
272 ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
276 compatible = "ti,am654-timer";
280 clock-names = "fck";
281 assigned-clocks = <&k3_clks 36 2>;
282 assigned-clock-parents = <&k3_clks 36 3>;
283 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
284 ti,timer-pwm;
288 compatible = "ti,am654-timer";
292 clock-names = "fck";
293 assigned-clocks = <&k3_clks 37 2>;
294 assigned-clock-parents = <&k3_clks 37 3>;
295 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
296 ti,timer-pwm;
300 compatible = "ti,am654-timer";
304 clock-names = "fck";
305 assigned-clocks = <&k3_clks 38 2>;
306 assigned-clock-parents = <&k3_clks 38 3>;
307 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
308 ti,timer-pwm;
312 compatible = "ti,am654-timer";
316 clock-names = "fck";
317 assigned-clocks = <&k3_clks 39 2>;
318 assigned-clock-parents = <&k3_clks 39 3>;
319 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
320 ti,timer-pwm;
324 compatible = "ti,am654-timer";
328 clock-names = "fck";
329 assigned-clocks = <&k3_clks 40 2>;
330 assigned-clock-parents = <&k3_clks 40 3>;
331 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
332 ti,timer-pwm;
336 compatible = "ti,am654-timer";
340 clock-names = "fck";
341 assigned-clocks = <&k3_clks 41 2>;
342 assigned-clock-parents = <&k3_clks 41 3>;
343 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
344 ti,timer-pwm;
348 compatible = "ti,am654-timer";
352 clock-names = "fck";
353 assigned-clocks = <&k3_clks 42 2>;
354 assigned-clock-parents = <&k3_clks 42 3>;
355 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
356 ti,timer-pwm;
360 compatible = "ti,am654-timer";
364 clock-names = "fck";
365 assigned-clocks = <&k3_clks 43 2>;
366 assigned-clock-parents = <&k3_clks 43 3>;
367 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
368 ti,timer-pwm;
372 compatible = "ti,am64-uart", "ti,am654-uart";
375 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
377 clock-names = "fclk";
382 compatible = "ti,am64-uart", "ti,am654-uart";
385 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
387 clock-names = "fclk";
392 compatible = "ti,am64-uart", "ti,am654-uart";
395 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
397 clock-names = "fclk";
402 compatible = "ti,am64-uart", "ti,am654-uart";
405 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
407 clock-names = "fclk";
412 compatible = "ti,am64-uart", "ti,am654-uart";
415 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
417 clock-names = "fclk";
422 compatible = "ti,am64-uart", "ti,am654-uart";
425 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
427 clock-names = "fclk";
432 compatible = "ti,am64-uart", "ti,am654-uart";
435 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
437 clock-names = "fclk";
442 compatible = "ti,am64-i2c", "ti,omap4-i2c";
445 #address-cells = <1>;
446 #size-cells = <0>;
447 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
449 clock-names = "fck";
454 compatible = "ti,am64-i2c", "ti,omap4-i2c";
457 #address-cells = <1>;
458 #size-cells = <0>;
459 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
461 clock-names = "fck";
466 compatible = "ti,am64-i2c", "ti,omap4-i2c";
469 #address-cells = <1>;
470 #size-cells = <0>;
471 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
473 clock-names = "fck";
478 compatible = "ti,am64-i2c", "ti,omap4-i2c";
481 #address-cells = <1>;
482 #size-cells = <0>;
483 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
485 clock-names = "fck";
490 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
493 #address-cells = <1>;
494 #size-cells = <0>;
495 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
501 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
504 #address-cells = <1>;
505 #size-cells = <0>;
506 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
512 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
515 #address-cells = <1>;
516 #size-cells = <0>;
517 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
522 main_gpio_intr: interrupt-controller@a00000 {
523 compatible = "ti,sci-intr";
525 ti,intr-trigger-type = <1>;
526 interrupt-controller;
527 interrupt-parent = <&gic500>;
528 #interrupt-cells = <1>;
530 ti,sci-dev-id = <3>;
531 ti,interrupt-ranges = <0 32 16>;
536 compatible = "ti,am64-gpio", "ti,keystone-gpio";
538 gpio-controller;
539 #gpio-cells = <2>;
540 interrupt-parent = <&main_gpio_intr>;
543 interrupt-controller;
544 #interrupt-cells = <2>;
546 ti,davinci-gpio-unbanked = <0>;
547 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
549 clock-names = "gpio";
554 compatible = "ti,am64-gpio", "ti,keystone-gpio";
556 gpio-controller;
557 #gpio-cells = <2>;
558 interrupt-parent = <&main_gpio_intr>;
561 interrupt-controller;
562 #interrupt-cells = <2>;
564 ti,davinci-gpio-unbanked = <0>;
565 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
567 clock-names = "gpio";
572 compatible = "ti,am62-sdhci";
575 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
577 clock-names = "clk_ahb", "clk_xin";
578 assigned-clocks = <&k3_clks 57 6>;
579 assigned-clock-parents = <&k3_clks 57 8>;
580 bus-width = <8>;
581 mmc-hs200-1_8v;
582 ti,clkbuf-sel = <0x7>;
583 ti,otap-del-sel-legacy = <0x0>;
584 ti,otap-del-sel-mmc-hs = <0x0>;
585 ti,otap-del-sel-hs200 = <0x6>;
590 compatible = "ti,am62-sdhci";
593 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
595 clock-names = "clk_ahb", "clk_xin";
596 bus-width = <4>;
597 ti,clkbuf-sel = <0x7>;
598 ti,otap-del-sel-legacy = <0x0>;
599 ti,otap-del-sel-sd-hs = <0x0>;
600 ti,otap-del-sel-sdr12 = <0xf>;
601 ti,otap-del-sel-sdr25 = <0xf>;
602 ti,otap-del-sel-sdr50 = <0xc>;
603 ti,otap-del-sel-sdr104 = <0x6>;
604 ti,otap-del-sel-ddr50 = <0x9>;
605 ti,itap-del-sel-legacy = <0x0>;
606 ti,itap-del-sel-sd-hs = <0x0>;
607 ti,itap-del-sel-sdr12 = <0x0>;
608 ti,itap-del-sel-sdr25 = <0x0>;
613 compatible = "ti,am62-sdhci";
616 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
618 clock-names = "clk_ahb", "clk_xin";
619 bus-width = <4>;
620 ti,clkbuf-sel = <0x7>;
621 ti,otap-del-sel-legacy = <0x0>;
622 ti,otap-del-sel-sd-hs = <0x0>;
623 ti,otap-del-sel-sdr12 = <0xf>;
624 ti,otap-del-sel-sdr25 = <0xf>;
625 ti,otap-del-sel-sdr50 = <0xc>;
626 ti,otap-del-sel-sdr104 = <0x6>;
627 ti,otap-del-sel-ddr50 = <0x9>;
628 ti,itap-del-sel-legacy = <0x0>;
629 ti,itap-del-sel-sd-hs = <0x0>;
630 ti,itap-del-sel-sdr12 = <0x0>;
631 ti,itap-del-sel-sdr25 = <0x0>;
635 usbss0: dwc3-usb@f900000 {
636 compatible = "ti,am62-usb";
640 clock-names = "ref";
641 ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
642 #address-cells = <2>;
643 #size-cells = <2>;
644 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
653 interrupt-names = "host", "peripheral";
654 maximum-speed = "high-speed";
656 snps,usb2-gadget-lpm-disable;
657 snps,usb2-lpm-disable;
661 usbss1: dwc3-usb@f910000 {
662 compatible = "ti,am62-usb";
666 clock-names = "ref";
667 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
668 #address-cells = <2>;
669 #size-cells = <2>;
670 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
679 interrupt-names = "host", "peripheral";
680 maximum-speed = "high-speed";
682 snps,usb2-gadget-lpm-disable;
683 snps,usb2-lpm-disable;
688 compatible = "simple-bus";
690 #address-cells = <2>;
691 #size-cells = <2>;
696 compatible = "ti,am654-ospi", "cdns,qspi-nor";
700 cdns,fifo-depth = <256>;
701 cdns,fifo-width = <4>;
702 cdns,trigger-address = <0x0>;
704 assigned-clocks = <&k3_clks 75 7>;
705 assigned-clock-parents = <&k3_clks 75 8>;
706 assigned-clock-rates = <166666666>;
707 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
708 #address-cells = <1>;
709 #size-cells = <0>;
714 compatible = "ti,am642-cpsw-nuss";
715 #address-cells = <2>;
716 #size-cells = <2>;
718 reg-names = "cpsw_nuss";
721 assigned-clocks = <&k3_clks 13 3>;
722 assigned-clock-parents = <&k3_clks 13 11>;
723 clock-names = "fck";
724 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
736 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
739 ethernet-ports {
740 #address-cells = <1>;
741 #size-cells = <0>;
745 ti,mac-only;
748 mac-address = [00 00 00 00 00 00];
749 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
754 ti,mac-only;
757 mac-address = [00 00 00 00 00 00];
762 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
764 #address-cells = <1>;
765 #size-cells = <0>;
767 clock-names = "fck";
772 compatible = "ti,j721e-cpts";
775 clock-names = "cpts";
776 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
777 interrupt-names = "cpts";
778 ti,cpts-ext-ts-inputs = <4>;
779 ti,cpts-periodic-outputs = <2>;
784 compatible = "ti,am64-hwspinlock";
786 #hwlock-cells = <1>;
790 compatible = "ti,am64-mailbox";
793 #mbox-cells = <1>;
794 ti,mbox-num-users = <4>;
795 ti,mbox-num-fifos = <16>;
799 compatible = "ti,am64-mailbox";
802 #mbox-cells = <1>;
803 ti,mbox-num-users = <4>;
804 ti,mbox-num-fifos = <16>;
808 compatible = "ti,am64-mailbox";
811 #mbox-cells = <1>;
812 ti,mbox-num-users = <4>;
813 ti,mbox-num-fifos = <16>;
817 compatible = "ti,am64-mailbox";
820 #mbox-cells = <1>;
821 ti,mbox-num-users = <4>;
822 ti,mbox-num-fifos = <16>;
829 reg-names = "m_can", "message_ram";
830 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
832 clock-names = "hclk", "cclk";
835 interrupt-names = "int0", "int1";
836 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
841 compatible = "ti,j7-rti-wdt";
844 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
845 assigned-clocks = <&k3_clks 125 0>;
846 assigned-clock-parents = <&k3_clks 125 2>;
850 compatible = "ti,j7-rti-wdt";
853 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
854 assigned-clocks = <&k3_clks 126 0>;
855 assigned-clock-parents = <&k3_clks 126 2>;
859 compatible = "ti,j7-rti-wdt";
862 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
863 assigned-clocks = <&k3_clks 127 0>;
864 assigned-clock-parents = <&k3_clks 127 2>;
868 compatible = "ti,j7-rti-wdt";
871 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
872 assigned-clocks = <&k3_clks 128 0>;
873 assigned-clock-parents = <&k3_clks 128 2>;
877 compatible = "ti,j7-rti-wdt";
880 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
881 assigned-clocks = <&k3_clks 205 0>;
882 assigned-clock-parents = <&k3_clks 205 2>;
886 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
887 #pwm-cells = <3>;
889 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
891 clock-names = "tbclk", "fck";
896 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
897 #pwm-cells = <3>;
899 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
901 clock-names = "tbclk", "fck";
906 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
907 #pwm-cells = <3>;
909 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
911 clock-names = "tbclk", "fck";
916 compatible = "ti,am3352-ecap";
917 #pwm-cells = <3>;
919 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
921 clock-names = "fck";
926 compatible = "ti,am3352-ecap";
927 #pwm-cells = <3>;
929 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
931 clock-names = "fck";
936 compatible = "ti,am3352-ecap";
937 #pwm-cells = <3>;
939 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
941 clock-names = "fck";
946 compatible = "ti,am62-eqep";
948 power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
955 compatible = "ti,am62-eqep";
957 power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
964 compatible = "ti,am62-eqep";
966 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
972 mcasp0: audio-controller@2b00000 {
973 compatible = "ti,am33xx-mcasp-audio";
976 reg-names = "mpu", "dat";
979 interrupt-names = "tx", "rx";
982 dma-names = "tx", "rx";
985 clock-names = "fck";
986 assigned-clocks = <&k3_clks 190 0>;
987 assigned-clock-parents = <&k3_clks 190 2>;
988 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
992 mcasp1: audio-controller@2b10000 {
993 compatible = "ti,am33xx-mcasp-audio";
996 reg-names = "mpu", "dat";
999 interrupt-names = "tx", "rx";
1002 dma-names = "tx", "rx";
1005 clock-names = "fck";
1006 assigned-clocks = <&k3_clks 191 0>;
1007 assigned-clock-parents = <&k3_clks 191 2>;
1008 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
1012 mcasp2: audio-controller@2b20000 {
1013 compatible = "ti,am33xx-mcasp-audio";
1016 reg-names = "mpu", "dat";
1019 interrupt-names = "tx", "rx";
1022 dma-names = "tx", "rx";
1025 clock-names = "fck";
1026 assigned-clocks = <&k3_clks 192 0>;
1027 assigned-clock-parents = <&k3_clks 192 2>;
1028 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
1033 compatible = "ti,j721e-csi2rx-shim";
1035 dma-names = "rx0";
1037 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1038 #address-cells = <2>;
1039 #size-cells = <2>;
1043 cdns_csi2rx0: csi-bridge@30101000 {
1044 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1048 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1051 phy-names = "dphy";
1054 #address-cells = <1>;
1055 #size-cells = <0>;
1086 compatible = "cdns,dphy-rx";
1088 #phy-cells = <0>;
1089 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
1094 compatible = "ti,am62a7-dss";
1103 reg-names = "common", "vidl1", "vid",
1105 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
1109 clock-names = "fck", "vp1", "vp2";
1114 #address-cells = <1>;
1115 #size-cells = <0>;
1119 vpu: video-codec@30210000 {
1120 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
1123 power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
1126 e5010: jpeg-encoder@fd20000 {
1127 compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc";
1130 reg-names = "core", "mmu";
1132 power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;