Lines Matching +full:wdt +full:- +full:sd
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
23 interrupt-controller;
35 gic_its: msi-controller@1820000 {
36 compatible = "arm,gic-v3-its";
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
39 msi-controller;
40 #msi-cells = <1>;
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
51 compatible = "ti,am654-phy-gmii-sel";
53 #phy-cells = <1>;
56 epwm_tbclk: clock-controller@4130 {
57 compatible = "ti,am62-epwm-tbclk";
59 #clock-cells = <1>;
62 audio_refclk0: clock-controller@82e0 {
63 compatible = "ti,am62-audio-refclk";
66 assigned-clocks = <&k3_clks 157 0>;
67 assigned-clock-parents = <&k3_clks 157 8>;
68 #clock-cells = <0>;
71 audio_refclk1: clock-controller@82e4 {
72 compatible = "ti,am62-audio-refclk";
75 assigned-clocks = <&k3_clks 157 10>;
76 assigned-clock-parents = <&k3_clks 157 18>;
77 #clock-cells = <0>;
82 bootph-all;
83 compatible = "simple-bus";
84 #address-cells = <2>;
85 #size-cells = <2>;
86 dma-ranges;
89 ti,sci-dev-id = <25>;
92 bootph-all;
93 compatible = "ti,am654-secure-proxy";
94 #mbox-cells = <1>;
95 reg-names = "target_data", "rt", "scfg";
99 interrupt-names = "rx_012";
103 inta_main_dmss: interrupt-controller@48000000 {
104 compatible = "ti,sci-inta";
106 #interrupt-cells = <0>;
107 interrupt-controller;
108 interrupt-parent = <&gic500>;
109 msi-controller;
111 ti,sci-dev-id = <28>;
112 ti,interrupt-ranges = <4 68 36>;
113 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
116 main_bcdma: dma-controller@485c0100 {
117 compatible = "ti,am64-dmss-bcdma";
127 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
129 msi-parent = <&inta_main_dmss>;
130 #dma-cells = <3>;
133 ti,sci-dev-id = <26>;
134 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
135 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
136 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
139 main_pktdma: dma-controller@485c0000 {
140 compatible = "ti,am64-dmss-pktdma";
149 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
151 msi-parent = <&inta_main_dmss>;
152 #dma-cells = <2>;
155 ti,sci-dev-id = <30>;
156 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
160 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
164 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
170 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
177 dmsc: system-controller@44043000 {
178 bootph-all;
179 compatible = "ti,k2g-sci";
180 ti,host-id = <12>;
181 mbox-names = "rx", "tx";
184 reg-names = "debug_messages";
187 k3_pds: power-controller {
188 bootph-all;
189 compatible = "ti,sci-pm-domain";
190 #power-domain-cells = <2>;
193 k3_clks: clock-controller {
194 bootph-all;
195 compatible = "ti,k2g-sci-clk";
196 #clock-cells = <2>;
199 k3_reset: reset-controller {
200 bootph-all;
201 compatible = "ti,sci-reset";
202 #reset-cells = <2>;
207 compatible = "ti,am62-sa3ul";
211 dma-names = "tx", "rx1", "rx2";
215 bootph-pre-ram;
216 compatible = "ti,am654-secure-proxy";
217 #mbox-cells = <1>;
218 reg-names = "target_data", "rt", "scfg";
225 * firmware on non-MPU processors
231 bootph-all;
232 compatible = "pinctrl-single";
234 #pinctrl-cells = <1>;
235 pinctrl-single,register-width = <32>;
236 pinctrl-single,function-mask = <0xffffffff>;
240 bootph-pre-ram;
241 compatible = "ti,j721e-esm";
244 ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
248 bootph-all;
249 compatible = "ti,am654-timer";
253 clock-names = "fck";
254 assigned-clocks = <&k3_clks 36 2>;
255 assigned-clock-parents = <&k3_clks 36 3>;
256 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
257 ti,timer-pwm;
261 compatible = "ti,am654-timer";
265 clock-names = "fck";
266 assigned-clocks = <&k3_clks 37 2>;
267 assigned-clock-parents = <&k3_clks 37 3>;
268 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
269 ti,timer-pwm;
273 compatible = "ti,am654-timer";
277 clock-names = "fck";
278 assigned-clocks = <&k3_clks 38 2>;
279 assigned-clock-parents = <&k3_clks 38 3>;
280 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
281 ti,timer-pwm;
285 compatible = "ti,am654-timer";
289 clock-names = "fck";
290 assigned-clocks = <&k3_clks 39 2>;
291 assigned-clock-parents = <&k3_clks 39 3>;
292 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
293 ti,timer-pwm;
297 compatible = "ti,am654-timer";
301 clock-names = "fck";
302 assigned-clocks = <&k3_clks 40 2>;
303 assigned-clock-parents = <&k3_clks 40 3>;
304 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
305 ti,timer-pwm;
309 compatible = "ti,am654-timer";
313 clock-names = "fck";
314 assigned-clocks = <&k3_clks 41 2>;
315 assigned-clock-parents = <&k3_clks 41 3>;
316 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
317 ti,timer-pwm;
321 compatible = "ti,am654-timer";
325 clock-names = "fck";
326 assigned-clocks = <&k3_clks 42 2>;
327 assigned-clock-parents = <&k3_clks 42 3>;
328 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
329 ti,timer-pwm;
333 compatible = "ti,am654-timer";
337 clock-names = "fck";
338 assigned-clocks = <&k3_clks 43 2>;
339 assigned-clock-parents = <&k3_clks 43 3>;
340 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
341 ti,timer-pwm;
345 compatible = "ti,am64-uart", "ti,am654-uart";
348 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
350 clock-names = "fclk";
355 compatible = "ti,am64-uart", "ti,am654-uart";
358 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
360 clock-names = "fclk";
365 compatible = "ti,am64-uart", "ti,am654-uart";
368 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
370 clock-names = "fclk";
375 compatible = "ti,am64-uart", "ti,am654-uart";
378 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
380 clock-names = "fclk";
385 compatible = "ti,am64-uart", "ti,am654-uart";
388 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
390 clock-names = "fclk";
395 compatible = "ti,am64-uart", "ti,am654-uart";
398 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
400 clock-names = "fclk";
405 compatible = "ti,am64-uart", "ti,am654-uart";
408 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
410 clock-names = "fclk";
415 compatible = "ti,am64-i2c", "ti,omap4-i2c";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
422 clock-names = "fck";
427 compatible = "ti,am64-i2c", "ti,omap4-i2c";
430 #address-cells = <1>;
431 #size-cells = <0>;
432 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
434 clock-names = "fck";
439 compatible = "ti,am64-i2c", "ti,omap4-i2c";
442 #address-cells = <1>;
443 #size-cells = <0>;
444 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
446 clock-names = "fck";
451 compatible = "ti,am64-i2c", "ti,omap4-i2c";
454 #address-cells = <1>;
455 #size-cells = <0>;
456 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
458 clock-names = "fck";
463 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
466 #address-cells = <1>;
467 #size-cells = <0>;
468 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
474 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
477 #address-cells = <1>;
478 #size-cells = <0>;
479 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
485 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
488 #address-cells = <1>;
489 #size-cells = <0>;
490 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
495 main_gpio_intr: interrupt-controller@a00000 {
496 compatible = "ti,sci-intr";
498 ti,intr-trigger-type = <1>;
499 interrupt-controller;
500 interrupt-parent = <&gic500>;
501 #interrupt-cells = <1>;
503 ti,sci-dev-id = <3>;
504 ti,interrupt-ranges = <0 32 16>;
508 compatible = "ti,am64-gpio", "ti,keystone-gpio";
510 gpio-ranges = <&main_pmx0 0 0 32>,
513 gpio-controller;
514 #gpio-cells = <2>;
515 interrupt-parent = <&main_gpio_intr>;
518 interrupt-controller;
519 #interrupt-cells = <2>;
521 ti,davinci-gpio-unbanked = <0>;
522 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
524 clock-names = "gpio";
528 compatible = "ti,am64-gpio", "ti,keystone-gpio";
530 gpio-controller;
531 gpio-ranges = <&main_pmx0 0 94 41>,
535 #gpio-cells = <2>;
536 interrupt-parent = <&main_gpio_intr>;
539 interrupt-controller;
540 #interrupt-cells = <2>;
542 ti,davinci-gpio-unbanked = <0>;
543 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
545 clock-names = "gpio";
549 compatible = "ti,am62-sdhci";
552 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
554 clock-names = "clk_ahb", "clk_xin";
555 assigned-clocks = <&k3_clks 57 6>;
556 assigned-clock-parents = <&k3_clks 57 8>;
557 bus-width = <8>;
558 mmc-ddr-1_8v;
559 mmc-hs200-1_8v;
560 ti,clkbuf-sel = <0x7>;
561 ti,otap-del-sel-legacy = <0x0>;
562 ti,otap-del-sel-mmc-hs = <0x0>;
563 ti,otap-del-sel-hs200 = <0x6>;
564 ti,itap-del-sel-legacy = <0x0>;
565 ti,itap-del-sel-mmc-hs = <0x0>;
570 compatible = "ti,am62-sdhci";
573 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
575 clock-names = "clk_ahb", "clk_xin";
576 bus-width = <4>;
577 ti,clkbuf-sel = <0x7>;
578 ti,otap-del-sel-legacy = <0x0>;
579 ti,otap-del-sel-sd-hs = <0x0>;
580 ti,otap-del-sel-sdr12 = <0xf>;
581 ti,otap-del-sel-sdr25 = <0xf>;
582 ti,otap-del-sel-sdr50 = <0xc>;
583 ti,otap-del-sel-sdr104 = <0x6>;
584 ti,otap-del-sel-ddr50 = <0x9>;
585 ti,itap-del-sel-legacy = <0x0>;
586 ti,itap-del-sel-sd-hs = <0x0>;
587 ti,itap-del-sel-sdr12 = <0x0>;
588 ti,itap-del-sel-sdr25 = <0x0>;
593 compatible = "ti,am62-sdhci";
596 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
598 clock-names = "clk_ahb", "clk_xin";
599 bus-width = <4>;
600 ti,clkbuf-sel = <0x7>;
601 ti,otap-del-sel-legacy = <0x0>;
602 ti,otap-del-sel-sd-hs = <0x0>;
603 ti,otap-del-sel-sdr12 = <0xf>;
604 ti,otap-del-sel-sdr25 = <0xf>;
605 ti,otap-del-sel-sdr50 = <0xc>;
606 ti,otap-del-sel-sdr104 = <0x6>;
607 ti,otap-del-sel-ddr50 = <0x9>;
608 ti,itap-del-sel-legacy = <0x0>;
609 ti,itap-del-sel-sd-hs = <0x0>;
610 ti,itap-del-sel-sdr12 = <0x0>;
611 ti,itap-del-sel-sdr25 = <0x0>;
615 usbss0: dwc3-usb@f900000 {
616 compatible = "ti,am62-usb";
620 clock-names = "ref";
621 ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
622 #address-cells = <2>;
623 #size-cells = <2>;
624 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
633 interrupt-names = "host", "peripheral";
634 maximum-speed = "high-speed";
636 snps,usb2-gadget-lpm-disable;
637 snps,usb2-lpm-disable;
641 usbss1: dwc3-usb@f910000 {
642 compatible = "ti,am62-usb";
646 clock-names = "ref";
647 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
648 #address-cells = <2>;
649 #size-cells = <2>;
650 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
659 interrupt-names = "host", "peripheral";
660 maximum-speed = "high-speed";
662 snps,usb2-gadget-lpm-disable;
663 snps,usb2-lpm-disable;
668 compatible = "simple-bus";
670 #address-cells = <2>;
671 #size-cells = <2>;
675 compatible = "ti,am654-ospi", "cdns,qspi-nor";
679 cdns,fifo-depth = <256>;
680 cdns,fifo-width = <4>;
681 cdns,trigger-address = <0x0>;
683 assigned-clocks = <&k3_clks 75 7>;
684 assigned-clock-parents = <&k3_clks 75 8>;
685 assigned-clock-rates = <166666666>;
686 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
687 #address-cells = <1>;
688 #size-cells = <0>;
694 compatible = "ti,am62-gpu", "img,img-axe";
697 clock-names = "core";
699 power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
703 compatible = "ti,am642-cpsw-nuss";
704 #address-cells = <2>;
705 #size-cells = <2>;
707 reg-names = "cpsw_nuss";
710 assigned-clocks = <&k3_clks 13 3>;
711 assigned-clock-parents = <&k3_clks 13 11>;
712 clock-names = "fck";
713 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
724 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
727 ethernet-ports {
728 #address-cells = <1>;
729 #size-cells = <0>;
733 ti,mac-only;
736 mac-address = [00 00 00 00 00 00];
737 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
742 ti,mac-only;
745 mac-address = [00 00 00 00 00 00];
750 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
752 #address-cells = <1>;
753 #size-cells = <0>;
755 clock-names = "fck";
761 compatible = "ti,j721e-cpts";
764 clock-names = "cpts";
765 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
766 interrupt-names = "cpts";
767 ti,cpts-ext-ts-inputs = <4>;
768 ti,cpts-periodic-outputs = <2>;
773 compatible = "ti,am625-dss";
782 reg-names = "common", "vidl1", "vid",
784 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
788 clock-names = "fck", "vp1", "vp2";
793 #address-cells = <1>;
794 #size-cells = <0>;
799 compatible = "ti,am64-hwspinlock";
801 #hwlock-cells = <1>;
805 compatible = "ti,am64-mailbox";
809 #mbox-cells = <1>;
810 ti,mbox-num-users = <4>;
811 ti,mbox-num-fifos = <16>;
815 compatible = "ti,am3352-ecap";
816 #pwm-cells = <3>;
818 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
820 clock-names = "fck";
825 compatible = "ti,am3352-ecap";
826 #pwm-cells = <3>;
828 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
830 clock-names = "fck";
835 compatible = "ti,am3352-ecap";
836 #pwm-cells = <3>;
838 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
840 clock-names = "fck";
845 compatible = "ti,am62-eqep";
847 power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
854 compatible = "ti,am62-eqep";
856 power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
863 compatible = "ti,am62-eqep";
865 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
875 reg-names = "m_can", "message_ram";
876 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
878 clock-names = "hclk", "cclk";
881 interrupt-names = "int0", "int1";
882 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
887 compatible = "ti,j7-rti-wdt";
890 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
891 assigned-clocks = <&k3_clks 125 0>;
892 assigned-clock-parents = <&k3_clks 125 2>;
896 compatible = "ti,j7-rti-wdt";
899 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
900 assigned-clocks = <&k3_clks 126 0>;
901 assigned-clock-parents = <&k3_clks 126 2>;
905 compatible = "ti,j7-rti-wdt";
908 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
909 assigned-clocks = <&k3_clks 127 0>;
910 assigned-clock-parents = <&k3_clks 127 2>;
914 compatible = "ti,j7-rti-wdt";
917 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
918 assigned-clocks = <&k3_clks 128 0>;
919 assigned-clock-parents = <&k3_clks 128 2>;
923 compatible = "ti,j7-rti-wdt";
926 power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
927 assigned-clocks = <&k3_clks 130 0>;
928 assigned-clock-parents = <&k3_clks 130 2>;
932 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
933 #pwm-cells = <3>;
935 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
937 clock-names = "tbclk", "fck";
942 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
943 #pwm-cells = <3>;
945 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
947 clock-names = "tbclk", "fck";
952 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
953 #pwm-cells = <3>;
955 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
957 clock-names = "tbclk", "fck";
961 mcasp0: audio-controller@2b00000 {
962 compatible = "ti,am33xx-mcasp-audio";
965 reg-names = "mpu", "dat";
968 interrupt-names = "tx", "rx";
971 dma-names = "tx", "rx";
974 clock-names = "fck";
975 assigned-clocks = <&k3_clks 190 0>;
976 assigned-clock-parents = <&k3_clks 190 2>;
977 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
981 mcasp1: audio-controller@2b10000 {
982 compatible = "ti,am33xx-mcasp-audio";
985 reg-names = "mpu", "dat";
988 interrupt-names = "tx", "rx";
991 dma-names = "tx", "rx";
994 clock-names = "fck";
995 assigned-clocks = <&k3_clks 191 0>;
996 assigned-clock-parents = <&k3_clks 191 2>;
997 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
1001 mcasp2: audio-controller@2b20000 {
1002 compatible = "ti,am33xx-mcasp-audio";
1005 reg-names = "mpu", "dat";
1008 interrupt-names = "tx", "rx";
1011 dma-names = "tx", "rx";
1014 clock-names = "fck";
1015 assigned-clocks = <&k3_clks 192 0>;
1016 assigned-clock-parents = <&k3_clks 192 2>;
1017 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
1022 compatible = "ti,j721e-csi2rx-shim";
1024 dma-names = "rx0";
1026 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1027 #address-cells = <2>;
1028 #size-cells = <2>;
1032 cdns_csi2rx0: csi-bridge@30101000 {
1033 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1037 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1040 phy-names = "dphy";
1043 #address-cells = <1>;
1044 #size-cells = <0>;
1075 compatible = "cdns,dphy-rx";
1077 #phy-cells = <0>;
1078 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
1082 gpmc0: memory-controller@3b000000 {
1083 compatible = "ti,am64-gpmc";
1084 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1086 clock-names = "fck";
1089 reg-names = "cfg", "data";
1091 gpmc,num-cs = <3>;
1092 gpmc,num-waitpins = <2>;
1093 #address-cells = <2>;
1094 #size-cells = <1>;
1095 interrupt-controller;
1096 #interrupt-cells = <2>;
1097 gpio-controller;
1098 #gpio-cells = <2>;
1103 compatible = "ti,am64-elm";
1106 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1108 clock-names = "fck";