Lines Matching +full:am62 +full:- +full:gpu
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
23 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
52 compatible = "ti,am654-phy-gmii-sel";
54 #phy-cells = <1>;
57 epwm_tbclk: clock-controller@4130 {
58 compatible = "ti,am62-epwm-tbclk";
60 #clock-cells = <1>;
63 audio_refclk0: clock-controller@82e0 {
64 compatible = "ti,am62-audio-refclk";
67 assigned-clocks = <&k3_clks 157 0>;
68 assigned-clock-parents = <&k3_clks 157 8>;
69 #clock-cells = <0>;
72 audio_refclk1: clock-controller@82e4 {
73 compatible = "ti,am62-audio-refclk";
76 assigned-clocks = <&k3_clks 157 10>;
77 assigned-clock-parents = <&k3_clks 157 18>;
78 #clock-cells = <0>;
83 bootph-all;
84 compatible = "simple-bus";
85 #address-cells = <2>;
86 #size-cells = <2>;
87 dma-ranges;
90 ti,sci-dev-id = <25>;
93 bootph-all;
94 compatible = "ti,am654-secure-proxy";
95 #mbox-cells = <1>;
96 reg-names = "target_data", "rt", "scfg";
100 interrupt-names = "rx_012";
104 inta_main_dmss: interrupt-controller@48000000 {
105 compatible = "ti,sci-inta";
107 #interrupt-cells = <0>;
108 interrupt-controller;
109 interrupt-parent = <&gic500>;
110 msi-controller;
112 ti,sci-dev-id = <28>;
113 ti,interrupt-ranges = <4 68 36>;
114 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
117 main_bcdma: dma-controller@485c0100 {
118 compatible = "ti,am64-dmss-bcdma";
128 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
130 msi-parent = <&inta_main_dmss>;
131 #dma-cells = <3>;
134 ti,sci-dev-id = <26>;
135 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
136 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
137 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
140 main_pktdma: dma-controller@485c0000 {
141 compatible = "ti,am64-dmss-pktdma";
150 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
152 msi-parent = <&inta_main_dmss>;
153 #dma-cells = <2>;
156 ti,sci-dev-id = <30>;
157 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
161 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
165 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
171 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
178 dmsc: system-controller@44043000 {
179 bootph-all;
180 compatible = "ti,k2g-sci";
181 ti,host-id = <12>;
182 mbox-names = "rx", "tx";
185 reg-names = "debug_messages";
188 k3_pds: power-controller {
189 bootph-all;
190 compatible = "ti,sci-pm-domain";
191 #power-domain-cells = <2>;
194 k3_clks: clock-controller {
195 bootph-all;
196 compatible = "ti,k2g-sci-clk";
197 #clock-cells = <2>;
200 k3_reset: reset-controller {
201 bootph-all;
202 compatible = "ti,sci-reset";
203 #reset-cells = <2>;
208 compatible = "ti,am62-sa3ul";
212 dma-names = "tx", "rx1", "rx2";
216 bootph-pre-ram;
217 compatible = "ti,am654-secure-proxy";
218 #mbox-cells = <1>;
219 reg-names = "target_data", "rt", "scfg";
226 * firmware on non-MPU processors
232 bootph-all;
233 compatible = "pinctrl-single";
235 #pinctrl-cells = <1>;
236 pinctrl-single,register-width = <32>;
237 pinctrl-single,function-mask = <0xffffffff>;
241 bootph-pre-ram;
242 compatible = "ti,j721e-esm";
245 ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
249 bootph-all;
250 compatible = "ti,am654-timer";
254 clock-names = "fck";
255 assigned-clocks = <&k3_clks 36 2>;
256 assigned-clock-parents = <&k3_clks 36 3>;
257 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
258 ti,timer-pwm;
262 compatible = "ti,am654-timer";
266 clock-names = "fck";
267 assigned-clocks = <&k3_clks 37 2>;
268 assigned-clock-parents = <&k3_clks 37 3>;
269 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
270 ti,timer-pwm;
274 compatible = "ti,am654-timer";
278 clock-names = "fck";
279 assigned-clocks = <&k3_clks 38 2>;
280 assigned-clock-parents = <&k3_clks 38 3>;
281 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
282 ti,timer-pwm;
286 compatible = "ti,am654-timer";
290 clock-names = "fck";
291 assigned-clocks = <&k3_clks 39 2>;
292 assigned-clock-parents = <&k3_clks 39 3>;
293 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
294 ti,timer-pwm;
298 compatible = "ti,am654-timer";
302 clock-names = "fck";
303 assigned-clocks = <&k3_clks 40 2>;
304 assigned-clock-parents = <&k3_clks 40 3>;
305 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
306 ti,timer-pwm;
310 compatible = "ti,am654-timer";
314 clock-names = "fck";
315 assigned-clocks = <&k3_clks 41 2>;
316 assigned-clock-parents = <&k3_clks 41 3>;
317 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
318 ti,timer-pwm;
322 compatible = "ti,am654-timer";
326 clock-names = "fck";
327 assigned-clocks = <&k3_clks 42 2>;
328 assigned-clock-parents = <&k3_clks 42 3>;
329 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
330 ti,timer-pwm;
334 compatible = "ti,am654-timer";
338 clock-names = "fck";
339 assigned-clocks = <&k3_clks 43 2>;
340 assigned-clock-parents = <&k3_clks 43 3>;
341 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
342 ti,timer-pwm;
346 compatible = "ti,am64-uart", "ti,am654-uart";
349 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
351 clock-names = "fclk";
356 compatible = "ti,am64-uart", "ti,am654-uart";
359 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
361 clock-names = "fclk";
366 compatible = "ti,am64-uart", "ti,am654-uart";
369 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
371 clock-names = "fclk";
376 compatible = "ti,am64-uart", "ti,am654-uart";
379 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
381 clock-names = "fclk";
386 compatible = "ti,am64-uart", "ti,am654-uart";
389 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
391 clock-names = "fclk";
396 compatible = "ti,am64-uart", "ti,am654-uart";
399 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
401 clock-names = "fclk";
406 compatible = "ti,am64-uart", "ti,am654-uart";
409 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
411 clock-names = "fclk";
416 compatible = "ti,am64-i2c", "ti,omap4-i2c";
419 #address-cells = <1>;
420 #size-cells = <0>;
421 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
423 clock-names = "fck";
428 compatible = "ti,am64-i2c", "ti,omap4-i2c";
431 #address-cells = <1>;
432 #size-cells = <0>;
433 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
435 clock-names = "fck";
440 compatible = "ti,am64-i2c", "ti,omap4-i2c";
443 #address-cells = <1>;
444 #size-cells = <0>;
445 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
447 clock-names = "fck";
452 compatible = "ti,am64-i2c", "ti,omap4-i2c";
455 #address-cells = <1>;
456 #size-cells = <0>;
457 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
459 clock-names = "fck";
464 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
467 #address-cells = <1>;
468 #size-cells = <0>;
469 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
475 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
478 #address-cells = <1>;
479 #size-cells = <0>;
480 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
486 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
489 #address-cells = <1>;
490 #size-cells = <0>;
491 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
496 main_gpio_intr: interrupt-controller@a00000 {
497 compatible = "ti,sci-intr";
499 ti,intr-trigger-type = <1>;
500 interrupt-controller;
501 interrupt-parent = <&gic500>;
502 #interrupt-cells = <1>;
504 ti,sci-dev-id = <3>;
505 ti,interrupt-ranges = <0 32 16>;
509 compatible = "ti,am64-gpio", "ti,keystone-gpio";
511 gpio-ranges = <&main_pmx0 0 0 32>,
514 gpio-controller;
515 #gpio-cells = <2>;
516 interrupt-parent = <&main_gpio_intr>;
519 interrupt-controller;
520 #interrupt-cells = <2>;
522 ti,davinci-gpio-unbanked = <0>;
523 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
525 clock-names = "gpio";
529 compatible = "ti,am64-gpio", "ti,keystone-gpio";
531 gpio-controller;
532 gpio-ranges = <&main_pmx0 0 94 41>,
536 #gpio-cells = <2>;
537 interrupt-parent = <&main_gpio_intr>;
540 interrupt-controller;
541 #interrupt-cells = <2>;
543 ti,davinci-gpio-unbanked = <0>;
544 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
546 clock-names = "gpio";
550 compatible = "ti,am62-sdhci";
553 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
555 clock-names = "clk_ahb", "clk_xin";
556 assigned-clocks = <&k3_clks 57 6>;
557 assigned-clock-parents = <&k3_clks 57 8>;
558 bus-width = <8>;
559 mmc-ddr-1_8v;
560 mmc-hs200-1_8v;
561 ti,clkbuf-sel = <0x7>;
562 ti,otap-del-sel-legacy = <0x0>;
563 ti,otap-del-sel-mmc-hs = <0x0>;
564 ti,otap-del-sel-hs200 = <0x6>;
565 ti,itap-del-sel-legacy = <0x0>;
566 ti,itap-del-sel-mmc-hs = <0x0>;
571 compatible = "ti,am62-sdhci";
574 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
576 clock-names = "clk_ahb", "clk_xin";
577 bus-width = <4>;
578 ti,clkbuf-sel = <0x7>;
579 ti,otap-del-sel-legacy = <0x0>;
580 ti,otap-del-sel-sd-hs = <0x0>;
581 ti,otap-del-sel-sdr12 = <0xf>;
582 ti,otap-del-sel-sdr25 = <0xf>;
583 ti,otap-del-sel-sdr50 = <0xc>;
584 ti,otap-del-sel-sdr104 = <0x6>;
585 ti,otap-del-sel-ddr50 = <0x9>;
586 ti,itap-del-sel-legacy = <0x0>;
587 ti,itap-del-sel-sd-hs = <0x0>;
588 ti,itap-del-sel-sdr12 = <0x0>;
589 ti,itap-del-sel-sdr25 = <0x0>;
594 compatible = "ti,am62-sdhci";
597 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
599 clock-names = "clk_ahb", "clk_xin";
600 bus-width = <4>;
601 ti,clkbuf-sel = <0x7>;
602 ti,otap-del-sel-legacy = <0x0>;
603 ti,otap-del-sel-sd-hs = <0x0>;
604 ti,otap-del-sel-sdr12 = <0xf>;
605 ti,otap-del-sel-sdr25 = <0xf>;
606 ti,otap-del-sel-sdr50 = <0xc>;
607 ti,otap-del-sel-sdr104 = <0x6>;
608 ti,otap-del-sel-ddr50 = <0x9>;
609 ti,itap-del-sel-legacy = <0x0>;
610 ti,itap-del-sel-sd-hs = <0x0>;
611 ti,itap-del-sel-sdr12 = <0x0>;
612 ti,itap-del-sel-sdr25 = <0x0>;
616 usbss0: dwc3-usb@f900000 {
617 compatible = "ti,am62-usb";
621 clock-names = "ref";
622 ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
623 #address-cells = <2>;
624 #size-cells = <2>;
625 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
634 interrupt-names = "host", "peripheral";
635 maximum-speed = "high-speed";
637 snps,usb2-gadget-lpm-disable;
638 snps,usb2-lpm-disable;
642 usbss1: dwc3-usb@f910000 {
643 compatible = "ti,am62-usb";
647 clock-names = "ref";
648 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
649 #address-cells = <2>;
650 #size-cells = <2>;
651 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
660 interrupt-names = "host", "peripheral";
661 maximum-speed = "high-speed";
663 snps,usb2-gadget-lpm-disable;
664 snps,usb2-lpm-disable;
669 compatible = "simple-bus";
671 #address-cells = <2>;
672 #size-cells = <2>;
676 compatible = "ti,am654-ospi", "cdns,qspi-nor";
680 cdns,fifo-depth = <256>;
681 cdns,fifo-width = <4>;
682 cdns,trigger-address = <0x0>;
684 assigned-clocks = <&k3_clks 75 7>;
685 assigned-clock-parents = <&k3_clks 75 8>;
686 assigned-clock-rates = <166666666>;
687 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
688 #address-cells = <1>;
689 #size-cells = <0>;
694 gpu: gpu@fd00000 { label
695 compatible = "ti,am62-gpu", "img,img-axe";
698 clock-names = "core";
700 power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
704 compatible = "ti,am642-cpsw-nuss";
705 #address-cells = <2>;
706 #size-cells = <2>;
708 reg-names = "cpsw_nuss";
711 assigned-clocks = <&k3_clks 13 3>;
712 assigned-clock-parents = <&k3_clks 13 11>;
713 clock-names = "fck";
714 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
725 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
728 ethernet-ports {
729 #address-cells = <1>;
730 #size-cells = <0>;
734 ti,mac-only;
737 mac-address = [00 00 00 00 00 00];
738 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
743 ti,mac-only;
746 mac-address = [00 00 00 00 00 00];
751 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
753 #address-cells = <1>;
754 #size-cells = <0>;
756 clock-names = "fck";
762 compatible = "ti,j721e-cpts";
765 clock-names = "cpts";
766 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
767 interrupt-names = "cpts";
768 ti,cpts-ext-ts-inputs = <4>;
769 ti,cpts-periodic-outputs = <2>;
774 compatible = "ti,am625-dss";
783 reg-names = "common", "vidl1", "vid",
785 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
789 clock-names = "fck", "vp1", "vp2";
794 #address-cells = <1>;
795 #size-cells = <0>;
800 compatible = "ti,am64-hwspinlock";
802 #hwlock-cells = <1>;
806 compatible = "ti,am64-mailbox";
810 #mbox-cells = <1>;
811 ti,mbox-num-users = <4>;
812 ti,mbox-num-fifos = <16>;
816 compatible = "ti,am3352-ecap";
817 #pwm-cells = <3>;
819 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
821 clock-names = "fck";
826 compatible = "ti,am3352-ecap";
827 #pwm-cells = <3>;
829 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
831 clock-names = "fck";
836 compatible = "ti,am3352-ecap";
837 #pwm-cells = <3>;
839 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
841 clock-names = "fck";
846 compatible = "ti,am62-eqep";
848 power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
855 compatible = "ti,am62-eqep";
857 power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
864 compatible = "ti,am62-eqep";
866 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
876 reg-names = "m_can", "message_ram";
877 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
879 clock-names = "hclk", "cclk";
882 interrupt-names = "int0", "int1";
883 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
888 compatible = "ti,j7-rti-wdt";
891 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
892 assigned-clocks = <&k3_clks 125 0>;
893 assigned-clock-parents = <&k3_clks 125 2>;
897 compatible = "ti,j7-rti-wdt";
900 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
901 assigned-clocks = <&k3_clks 126 0>;
902 assigned-clock-parents = <&k3_clks 126 2>;
906 compatible = "ti,j7-rti-wdt";
909 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
910 assigned-clocks = <&k3_clks 127 0>;
911 assigned-clock-parents = <&k3_clks 127 2>;
915 compatible = "ti,j7-rti-wdt";
918 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
919 assigned-clocks = <&k3_clks 128 0>;
920 assigned-clock-parents = <&k3_clks 128 2>;
924 compatible = "ti,j7-rti-wdt";
927 power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
928 assigned-clocks = <&k3_clks 130 0>;
929 assigned-clock-parents = <&k3_clks 130 2>;
933 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
934 #pwm-cells = <3>;
936 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
938 clock-names = "tbclk", "fck";
943 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
944 #pwm-cells = <3>;
946 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
948 clock-names = "tbclk", "fck";
953 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
954 #pwm-cells = <3>;
956 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
958 clock-names = "tbclk", "fck";
962 mcasp0: audio-controller@2b00000 {
963 compatible = "ti,am33xx-mcasp-audio";
966 reg-names = "mpu", "dat";
969 interrupt-names = "tx", "rx";
972 dma-names = "tx", "rx";
975 clock-names = "fck";
976 assigned-clocks = <&k3_clks 190 0>;
977 assigned-clock-parents = <&k3_clks 190 2>;
978 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
982 mcasp1: audio-controller@2b10000 {
983 compatible = "ti,am33xx-mcasp-audio";
986 reg-names = "mpu", "dat";
989 interrupt-names = "tx", "rx";
992 dma-names = "tx", "rx";
995 clock-names = "fck";
996 assigned-clocks = <&k3_clks 191 0>;
997 assigned-clock-parents = <&k3_clks 191 2>;
998 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
1002 mcasp2: audio-controller@2b20000 {
1003 compatible = "ti,am33xx-mcasp-audio";
1006 reg-names = "mpu", "dat";
1009 interrupt-names = "tx", "rx";
1012 dma-names = "tx", "rx";
1015 clock-names = "fck";
1016 assigned-clocks = <&k3_clks 192 0>;
1017 assigned-clock-parents = <&k3_clks 192 2>;
1018 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
1023 compatible = "ti,j721e-csi2rx-shim";
1025 dma-names = "rx0";
1027 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1028 #address-cells = <2>;
1029 #size-cells = <2>;
1033 cdns_csi2rx0: csi-bridge@30101000 {
1034 compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1038 clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1041 phy-names = "dphy";
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1076 compatible = "cdns,dphy-rx";
1078 #phy-cells = <0>;
1079 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
1083 gpmc0: memory-controller@3b000000 {
1084 compatible = "ti,am64-gpmc";
1085 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1087 clock-names = "fck";
1090 reg-names = "cfg", "data";
1092 gpmc,num-cs = <3>;
1093 gpmc,num-waitpins = <2>;
1094 #address-cells = <2>;
1095 #size-cells = <1>;
1096 interrupt-controller;
1097 #interrupt-cells = <2>;
1098 gpio-controller;
1099 #gpio-cells = <2>;
1104 compatible = "ti,am64-elm";
1107 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1109 clock-names = "fck";