Lines Matching +full:stm32mp25 +full:- +full:ospi
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
13 #include "stm32mp25-pinctrl.dtsi"
14 #include "stm32mp25xxai-pinctrl.dtsi"
17 model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
18 compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
28 stdout-path = "serial0:115200n8";
32 clk_ext_camera: clk-ext-camera {
33 #clock-cells = <0>;
34 compatible = "fixed-clock";
35 clock-frequency = <24000000>;
38 pad_clk: pad-clk {
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <100000000>;
45 imx335_2v9: regulator-2v9 {
46 compatible = "regulator-fixed";
47 regulator-name = "imx335-avdd";
48 regulator-min-microvolt = <2900000>;
49 regulator-max-microvolt = <2900000>;
50 regulator-always-on;
53 imx335_1v8: regulator-1v8 {
54 compatible = "regulator-fixed";
55 regulator-name = "imx335-ovdd";
56 regulator-min-microvolt = <1800000>;
57 regulator-max-microvolt = <1800000>;
58 regulator-always-on;
61 imx335_1v2: regulator-1v2 {
62 compatible = "regulator-fixed";
63 regulator-name = "imx335-dvdd";
64 regulator-min-microvolt = <1200000>;
65 regulator-max-microvolt = <1200000>;
66 regulator-always-on;
75 compatible = "edt,etml0700z9ndha", "panel-lvds";
76 enable-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>;
78 power-supply = <&scmi_v3v3>;
79 width-mm = <156>;
80 height-mm = <92>;
81 data-mapping = "vesa-24";
84 panel-timing {
85 clock-frequency = <54000000>;
88 hfront-porch = <150>;
89 hback-porch = <150>;
90 hsync-len = <21>;
91 vfront-porch = <24>;
92 vback-porch = <24>;
93 vsync-len = <21>;
98 remote-endpoint = <&lvds_out0>;
104 compatible = "gpio-backlight";
106 default-on;
110 reserved-memory {
111 #address-cells = <2>;
112 #size-cells = <2>;
116 compatible = "shared-dma-pool";
118 no-map;
121 mm_ospi1: mm-ospi@60000000 {
123 no-map;
129 timeout-sec = <32>;
135 clock-names = "apb", "ker", "pad";
140 vdd-supply = <&scmi_vddcore>;
141 vdda18-supply = <&scmi_v1v8>;
144 #address-cells = <1>;
145 #size-cells = <0>;
149 remote-endpoint = <&imx335_ep>;
150 data-lanes = <1 2>;
151 bus-type = <4>;
157 remote-endpoint = <&dcmipp_0>;
167 remote-endpoint = <&csi_source>;
168 bus-type = <4>;
174 pinctrl-0 = <ð1_rgmii_pins_a ð1_mdio_pins_a>;
175 pinctrl-1 = <ð1_rgmii_sleep_pins_a ð1_mdio_sleep_pins_a>;
176 pinctrl-names = "default", "sleep";
177 phy-handle = <&phy1_eth1>;
178 phy-mode = "rgmii-id";
179 st,ext-phyclk;
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "snps,dwmac-mdio";
186 phy1_eth1: ethernet-phy@4 {
187 compatible = "ethernet-phy-id001c.c916";
189 reset-gpios = <&gpioj 9 GPIO_ACTIVE_LOW>;
190 reset-assert-us = <10000>;
191 reset-deassert-us = <80000>;
197 pinctrl-names = "default", "sleep";
198 pinctrl-0 = <ð2_rgmii_pins_a>;
199 pinctrl-1 = <ð2_rgmii_sleep_pins_a>;
200 max-speed = <1000>;
201 phy-handle = <&phy0_eth2>;
202 phy-mode = "rgmii-id";
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "snps,dwmac-mdio";
209 phy0_eth2: ethernet-phy@1 {
210 compatible = "ethernet-phy-id001c.c916";
212 reset-assert-us = <10000>;
213 reset-deassert-us = <300>;
214 reset-gpios = <&gpiog 6 GPIO_ACTIVE_LOW>;
220 pinctrl-names = "default", "sleep";
221 pinctrl-0 = <&i2c2_pins_a>;
222 pinctrl-1 = <&i2c2_sleep_pins_a>;
223 i2c-scl-rising-time-ns = <100>;
224 i2c-scl-falling-time-ns = <13>;
225 clock-frequency = <400000>;
232 avdd-supply = <&imx335_2v9>;
233 ovdd-supply = <&imx335_1v8>;
234 dvdd-supply = <&imx335_1v2>;
235 reset-gpios = <&gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
239 remote-endpoint = <&csi_sink>;
240 clock-lanes = <0>;
241 data-lanes = <1 2>;
242 link-frequencies = /bits/ 64 <594000000>;
250 interrupt-parent = <&gpioi>;
252 reset-gpios = <&gpiog 14 GPIO_ACTIVE_LOW>;
258 pinctrl-names = "default", "sleep";
259 pinctrl-0 = <&i2c8_pins_a>;
260 pinctrl-1 = <&i2c8_sleep_pins_a>;
261 i2c-scl-rising-time-ns = <57>;
262 i2c-scl-falling-time-ns = <7>;
263 clock-frequency = <400000>;
268 memory-region = <&mm_ospi1>;
269 memory-region-names = "ospi1";
270 pinctrl-0 = <&ospi_port1_clk_pins_a
273 pinctrl-1 = <&ospi_port1_clk_sleep_pins_a
276 pinctrl-names = "default", "sleep";
280 #address-cells = <1>;
281 #size-cells = <0>;
282 memory-region = <&mm_ospi1>;
286 compatible = "jedec,spi-nor";
288 spi-rx-bus-width = <4>;
289 spi-tx-bus-width = <4>;
290 spi-max-frequency = <50000000>;
307 remote-endpoint = <&lvds_in>;
315 #address-cells = <1>;
316 #size-cells = <0>;
321 remote-endpoint = <<dc_ep0_out>;
328 remote-endpoint = <&lvds_panel_in>;
335 pinctrl-names = "default", "init";
336 pinctrl-0 = <&pcie_pins_a>;
337 pinctrl-1 = <&pcie_init_pins_a>;
338 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>;
343 pinctrl-names = "default", "init", "sleep";
344 pinctrl-0 = <&pcie_pins_a>;
345 pinctrl-1 = <&pcie_init_pins_a>;
346 pinctrl-2 = <&pcie_sleep_pins_a>;
350 reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>;
351 wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
361 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <3300000>;
366 regulator-name = "vddcore";
370 regulator-name = "v1v8";
374 regulator-name = "v3v3";
378 regulator-name = "vdd_emmc";
382 regulator-name = "vdd3v3_usb";
386 regulator-name = "vdd_sdcard";
391 pinctrl-names = "default", "opendrain", "sleep";
392 pinctrl-0 = <&sdmmc1_b4_pins_a>;
393 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
394 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
395 cd-gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
396 disable-wp;
397 st,neg-edge;
398 bus-width = <4>;
399 vmmc-supply = <&scmi_vdd_sdcard>;
400 vqmmc-supply = <&scmi_vddio1>;
405 pinctrl-names = "default", "sleep";
406 pinctrl-0 = <&spi3_pins_a>;
407 pinctrl-1 = <&spi3_sleep_pins_a>;
412 pinctrl-names = "default", "sleep";
413 pinctrl-0 = <&spi8_pins_a>;
414 pinctrl-1 = <&spi8_sleep_pins_a>;
424 pinctrl-0 = <&pwm3_pins_a>;
425 pinctrl-1 = <&pwm3_sleep_pins_a>;
426 pinctrl-names = "default", "sleep";
440 pinctrl-0 = <&pwm8_pins_a>;
441 pinctrl-1 = <&pwm8_sleep_pins_a>;
442 pinctrl-names = "default", "sleep";
453 pinctrl-0 = <&tim10_counter_pins_a>;
454 pinctrl-1 = <&tim10_counter_sleep_pins_a>;
455 pinctrl-names = "default", "sleep";
466 pinctrl-0 = <&pwm12_pins_a>;
467 pinctrl-1 = <&pwm12_sleep_pins_a>;
468 pinctrl-names = "default", "sleep";
477 pinctrl-names = "default", "idle", "sleep";
478 pinctrl-0 = <&usart2_pins_a>;
479 pinctrl-1 = <&usart2_idle_pins_a>;
480 pinctrl-2 = <&usart2_sleep_pins_a>;
481 /delete-property/dmas;
482 /delete-property/dma-names;
487 pinctrl-names = "default", "idle", "sleep";
488 pinctrl-0 = <&usart6_pins_a>;
489 pinctrl-1 = <&usart6_idle_pins_a>;
490 pinctrl-2 = <&usart6_sleep_pins_a>;
491 uart-has-rtscts;