Lines Matching +full:bias +full:- +full:disable
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 eth2_rgmii_pins_a: eth2-rgmii-0 {
16 bias-disable;
17 drive-push-pull;
18 slew-rate = <3>;
24 bias-disable;
25 drive-push-pull;
26 slew-rate = <3>;
30 bias-disable;
31 drive-push-pull;
32 slew-rate = <0>;
40 bias-disable;
44 bias-disable;
48 eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
68 i2c2_pins_a: i2c2-0 {
72 bias-disable;
73 drive-open-drain;
74 slew-rate = <0>;
78 i2c2_sleep_pins_a: i2c2-sleep-0 {
85 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
92 slew-rate = <2>;
93 drive-push-pull;
94 bias-disable;
98 slew-rate = <3>;
99 drive-push-pull;
100 bias-disable;
104 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
110 slew-rate = <2>;
111 drive-push-pull;
112 bias-disable;
116 slew-rate = <3>;
117 drive-push-pull;
118 bias-disable;
122 slew-rate = <2>;
123 drive-open-drain;
124 bias-disable;
128 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
139 spi3_pins_a: spi3-0 {
143 drive-push-pull;
144 bias-disable;
145 slew-rate = <1>;
149 bias-disable;
153 spi3_sleep_pins_a: spi3-sleep-0 {
161 usart2_pins_a: usart2-0 {
164 bias-disable;
165 drive-push-pull;
166 slew-rate = <0>;
170 bias-disable;
174 usart2_idle_pins_a: usart2-idle-0 {
180 bias-disable;
184 usart2_sleep_pins_a: usart2-sleep-0 {
191 usart6_pins_a: usart6-0 {
195 bias-disable;
196 drive-push-pull;
197 slew-rate = <0>;
202 bias-pull-up;
206 usart6_idle_pins_a: usart6-idle-0 {
213 bias-disable;
214 drive-push-pull;
215 slew-rate = <0>;
219 bias-pull-up;
223 usart6_sleep_pins_a: usart6-sleep-0 {
234 i2c8_pins_a: i2c8-0 {
238 bias-disable;
239 drive-open-drain;
240 slew-rate = <0>;
244 i2c8_sleep_pins_a: i2c8-sleep-0 {
253 spi8_pins_a: spi8-0 {
257 drive-push-pull;
258 bias-disable;
259 slew-rate = <1>;
263 bias-disable;
267 spi8_sleep_pins_a: spi8-sleep-0 {