Lines Matching +full:hwspinlock +full:- +full:r3p0
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
66 ap-apb@70000000 {
67 compatible = "simple-bus";
68 #address-cells = <1>;
69 #size-cells = <1>;
73 compatible = "sprd,sc9860-uart",
74 "sprd,sc9836-uart";
80 clock-names = "enable", "uart", "source";
85 compatible = "sprd,sc9860-uart",
86 "sprd,sc9836-uart";
92 clock-names = "enable", "uart", "source";
97 compatible = "sprd,sc9860-uart",
98 "sprd,sc9836-uart";
104 clock-names = "enable", "uart", "source";
109 compatible = "sprd,sc9860-uart",
110 "sprd,sc9836-uart";
116 clock-names = "enable", "uart", "source";
121 ap-ahb {
122 compatible = "simple-bus";
123 #address-cells = <2>;
124 #size-cells = <2>;
127 ap_dma: dma-controller@20100000 {
128 compatible = "sprd,sc9860-dma";
131 #dma-cells = <1>;
133 #dma-channels = <32>;
134 dma-channels = <32>;
136 clock-names = "enable";
140 compatible = "sprd,sdhci-r11";
147 clock-names = "sdio", "enable", "2x_enable";
148 assigned-clocks = <&aon_prediv CLK_EMMC_2X>;
149 assigned-clock-parents = <&clk_l0_409m6>;
151 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
152 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
153 sprd,phy-delay-mmc-ddr52 = <0x3f 0x75 0x14 0x14>;
154 sprd,phy-delay-mmc-hs400es = <0x3f 0x3f 0x2e 0x2e>;
155 vmmc-supply = <&vddemmccore>;
156 bus-width = <8>;
157 non-removable;
158 no-sdio;
159 no-sd;
160 cap-mmc-hw-reset;
161 mmc-hs400-enhanced-strobe;
162 mmc-hs400-1_8v;
163 mmc-hs200-1_8v;
164 mmc-ddr-1_8v;
169 compatible = "simple-bus";
170 #address-cells = <2>;
171 #size-cells = <2>;
175 compatible = "sprd,sc9860-adi";
178 hwlock-names = "adi";
179 #address-cells = <1>;
180 #size-cells = <0>;
184 compatible = "sprd,sc9860-timer";
191 compatible = "sprd,sc9860-suspend-timer";
196 hwlock: hwspinlock@40500000 {
197 compatible = "sprd,hwspinlock-r3p0";
199 #hwlock-cells = <1>;
201 clock-names = "enable";
205 compatible = "sprd,sc9860-eic-debounce";
207 gpio-controller;
208 #gpio-cells = <2>;
209 interrupt-controller;
210 #interrupt-cells = <2>;
215 compatible = "sprd,sc9860-eic-latch";
217 gpio-controller;
218 #gpio-cells = <2>;
219 interrupt-controller;
220 #interrupt-cells = <2>;
225 compatible = "sprd,sc9860-eic-async";
227 gpio-controller;
228 #gpio-cells = <2>;
229 interrupt-controller;
230 #interrupt-cells = <2>;
235 compatible = "sprd,sc9860-eic-sync";
237 gpio-controller;
238 #gpio-cells = <2>;
239 interrupt-controller;
240 #interrupt-cells = <2>;
245 compatible = "sprd,sc9860-gpio";
247 gpio-controller;
248 #gpio-cells = <2>;
249 interrupt-controller;
250 #interrupt-cells = <2>;
255 compatible = "sprd,sc9860-pinctrl";
260 compatible = "sprd,sp9860-wdt";
263 timeout-sec = <12>;
266 clock-names = "enable", "rtc_enable";
271 compatible = "simple-bus";
272 #address-cells = <2>;
273 #size-cells = <2>;
276 agcp_dma: dma-controller@41580000 {
277 compatible = "sprd,sc9860-dma";
279 #dma-cells = <1>;
281 #dma-channels = <32>;
282 dma-channels = <32>;
285 clock-names = "enable", "ashb_eb";
291 compatible = "fixed-clock";
292 #clock-cells = <0>;
293 clock-frequency = <32768>;
294 clock-output-names = "ext-32k";
298 compatible = "fixed-clock";
299 #clock-cells = <0>;
300 clock-frequency = <26000000>;
301 clock-output-names = "ext-26m";
305 compatible = "fixed-clock";
306 #clock-cells = <0>;
307 clock-frequency = <100000000>;
308 clock-output-names = "ext-rco-100m";
312 compatible = "fixed-clock";
313 #clock-cells = <0>;
314 clock-frequency = <409600000>;
315 clock-output-names = "ext-409m6";