Lines Matching +full:timer +full:- +full:secure
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
50 compatible = "arm,cortex-a55";
52 enable-method = "psci";
53 cpu-idle-states = <&LIT_CORE_PD>;
58 compatible = "arm,cortex-a55";
60 enable-method = "psci";
61 cpu-idle-states = <&LIT_CORE_PD>;
66 compatible = "arm,cortex-a55";
68 enable-method = "psci";
69 cpu-idle-states = <&LIT_CORE_PD>;
74 compatible = "arm,cortex-a55";
76 enable-method = "psci";
77 cpu-idle-states = <&LIT_CORE_PD>;
82 compatible = "arm,cortex-a76";
84 enable-method = "psci";
85 cpu-idle-states = <&BIG_CORE_PD>;
90 compatible = "arm,cortex-a76";
92 enable-method = "psci";
93 cpu-idle-states = <&BIG_CORE_PD>;
98 compatible = "arm,cortex-a76";
100 enable-method = "psci";
101 cpu-idle-states = <&BIG_CORE_PD>;
106 compatible = "arm,cortex-a76";
108 enable-method = "psci";
109 cpu-idle-states = <&BIG_CORE_PD>;
113 idle-states {
114 entry-method = "psci";
115 LIT_CORE_PD: cpu-pd-lit {
116 compatible = "arm,idle-state";
117 entry-latency-us = <1000>;
118 exit-latency-us = <500>;
119 min-residency-us = <2500>;
120 local-timer-stop;
121 arm,psci-suspend-param = <0x00010000>;
124 BIG_CORE_PD: cpu-pd-big {
125 compatible = "arm,idle-state";
126 entry-latency-us = <4000>;
127 exit-latency-us = <4000>;
128 min-residency-us = <10000>;
129 local-timer-stop;
130 arm,psci-suspend-param = <0x00010000>;
135 compatible = "arm,psci-0.2";
139 timer {
140 compatible = "arm,armv8-timer";
141 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, /* Physical Secure PPI */
142 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, /* Physical Non-Secure PPI */
147 pmu-a55 {
148 compatible = "arm,cortex-a55-pmu";
153 interrupt-affinity = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>;
156 pmu-a76 {
157 compatible = "arm,cortex-a76-pmu";
162 interrupt-affinity = <&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>;
166 compatible = "simple-bus";
168 #address-cells = <2>;
169 #size-cells = <2>;
171 gic: interrupt-controller@12000000 {
172 compatible = "arm,gic-v3";
175 #interrupt-cells = <3>;
176 #address-cells = <2>;
177 #size-cells = <2>;
178 redistributor-stride = <0x0 0x20000>; /* 128KB stride */
179 #redistributor-regions = <1>;
180 interrupt-controller;
185 compatible = "simple-bus";
187 #address-cells = <1>;
188 #size-cells = <1>;
191 compatible = "sprd,ums9620-uart",
192 "sprd,sc9836-uart";
200 compatible = "sprd,ums9620-uart",
201 "sprd,sc9836-uart";
210 ext_26m: clk-26m {
211 compatible = "fixed-clock";
212 #clock-cells = <0>;
213 clock-frequency = <26000000>;
214 clock-output-names = "ext-26m";
217 ext_4m: clk-4m {
218 compatible = "fixed-clock";
219 #clock-cells = <0>;
220 clock-frequency = <4000000>;
221 clock-output-names = "ext-4m";
224 ext_32k: clk-32k {
225 compatible = "fixed-clock";
226 #clock-cells = <0>;
227 clock-frequency = <32768>;
228 clock-output-names = "ext-32k";
231 rco_100m: clk-100m {
232 compatible = "fixed-clock";
233 #clock-cells = <0>;
234 clock-frequency = <100000000>;
235 clock-output-names = "rco-100m";
238 dphy_312m5: dphy-312m5 {
239 compatible = "fixed-clock";
240 #clock-cells = <0>;
241 clock-frequency = <312500000>;
242 clock-output-names = "dphy-312m5";
245 dphy_416m7: dphy-416m7 {
246 compatible = "fixed-clock";
247 #clock-cells = <0>;
248 clock-frequency = <416700000>;
249 clock-output-names = "dphy-416m7";