Lines Matching +full:pmu +full:- +full:syscon
1 // SPDX-License-Identifier: GPL-2.0-only
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 compatible = "simple-bus";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 ap_ahb_regs: syscon@20e00000 {
20 compatible = "sprd,sc9863a-glbregs", "syscon",
21 "simple-mfd";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 apahb_gate: apahb-gate@0 {
28 compatible = "sprd,sc9863a-apahb-gate";
30 #clock-cells = <1>;
34 pmu_regs: syscon@402b0000 {
35 compatible = "sprd,sc9863a-glbregs", "syscon",
36 "simple-mfd";
38 #address-cells = <1>;
39 #size-cells = <1>;
42 pmu_gate: pmu-gate@0 {
43 compatible = "sprd,sc9863a-pmu-gate";
46 clock-names = "ext-26m";
47 #clock-cells = <1>;
51 aon_apb_regs: syscon@402e0000 {
52 compatible = "sprd,sc9863a-glbregs", "syscon",
53 "simple-mfd";
55 #address-cells = <1>;
56 #size-cells = <1>;
59 aonapb_gate: aonapb-gate@0 {
60 compatible = "sprd,sc9863a-aonapb-gate";
62 #clock-cells = <1>;
66 anlg_phy_g2_regs: syscon@40353000 {
67 compatible = "sprd,sc9863a-glbregs", "syscon",
68 "simple-mfd";
70 #address-cells = <1>;
71 #size-cells = <1>;
75 compatible = "sprd,sc9863a-pll";
78 clock-names = "ext-26m";
79 #clock-cells = <1>;
83 anlg_phy_g4_regs: syscon@40359000 {
84 compatible = "sprd,sc9863a-glbregs", "syscon",
85 "simple-mfd";
87 #address-cells = <1>;
88 #size-cells = <1>;
92 compatible = "sprd,sc9863a-mpll";
94 #clock-cells = <1>;
98 anlg_phy_g5_regs: syscon@4035c000 {
99 compatible = "sprd,sc9863a-glbregs", "syscon",
100 "simple-mfd";
102 #address-cells = <1>;
103 #size-cells = <1>;
107 compatible = "sprd,sc9863a-rpll";
110 clock-names = "ext-26m";
111 #clock-cells = <1>;
115 anlg_phy_g7_regs: syscon@40363000 {
116 compatible = "sprd,sc9863a-glbregs", "syscon",
117 "simple-mfd";
119 #address-cells = <1>;
120 #size-cells = <1>;
124 compatible = "sprd,sc9863a-dpll";
126 #clock-cells = <1>;
130 mm_ahb_regs: syscon@60800000 {
131 compatible = "sprd,sc9863a-glbregs", "syscon",
132 "simple-mfd";
134 #address-cells = <1>;
135 #size-cells = <1>;
138 mm_gate: mm-gate@0 {
139 compatible = "sprd,sc9863a-mm-gate";
141 #clock-cells = <1>;
145 ap_apb_regs: syscon@71300000 {
146 compatible = "sprd,sc9863a-glbregs", "syscon",
147 "simple-mfd";
149 #address-cells = <1>;
150 #size-cells = <1>;
153 apapb_gate: apapb-gate@0 {
154 compatible = "sprd,sc9863a-apapb-gate";
157 clock-names = "ext-26m";
158 #clock-cells = <1>;
163 compatible = "simple-bus";
164 #address-cells = <1>;
165 #size-cells = <1>;
169 compatible = "sprd,sc9863a-uart",
170 "sprd,sc9836-uart";
178 compatible = "sprd,sc9863a-uart",
179 "sprd,sc9836-uart";
187 compatible = "sprd,sc9863a-uart",
188 "sprd,sc9836-uart";
196 compatible = "sprd,sc9863a-uart",
197 "sprd,sc9836-uart";
205 compatible = "sprd,sc9863a-uart",
206 "sprd,sc9836-uart";
215 ext_26m: ext-26m {
216 compatible = "fixed-clock";
217 #clock-cells = <0>;
218 clock-frequency = <26000000>;
219 clock-output-names = "ext-26m";
222 ext_32k: ext-32k {
223 compatible = "fixed-clock";
224 #clock-cells = <0>;
225 clock-frequency = <32768>;
226 clock-output-names = "ext-32k";
229 ext_4m: ext-4m {
230 compatible = "fixed-clock";
231 #clock-cells = <0>;
232 clock-frequency = <4000000>;
233 clock-output-names = "ext-4m";
236 rco_100m: rco-100m {
237 compatible = "fixed-clock";
238 #clock-cells = <0>;
239 clock-frequency = <100000000>;
240 clock-output-names = "rco-100m";