Lines Matching +full:0 +full:x59810000
21 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0 0x000>;
54 reg = <0 0x001>;
65 reg = <0 0x002>;
76 reg = <0 0x003>;
137 #clock-cells = <0>;
192 reg = <0x0 0x81000000 0x0 0x01000000>;
197 soc@0 {
201 ranges = <0 0 0 0xffffffff>;
206 reg = <0x54006000 0x100>;
208 #size-cells = <0>;
211 pinctrl-0 = <&pinctrl_spi0>;
219 reg = <0x54006100 0x100>;
221 #size-cells = <0>;
224 pinctrl-0 = <&pinctrl_spi1>;
232 reg = <0x54006800 0x40>;
235 pinctrl-0 = <&pinctrl_uart0>;
236 clocks = <&peri_clk 0>;
237 resets = <&peri_rst 0>;
243 reg = <0x54006900 0x40>;
246 pinctrl-0 = <&pinctrl_uart1>;
254 reg = <0x54006a00 0x40>;
257 pinctrl-0 = <&pinctrl_uart2>;
265 reg = <0x54006b00 0x40>;
268 pinctrl-0 = <&pinctrl_uart3>;
275 reg = <0x55000000 0x200>;
281 gpio-ranges = <&pinctrl 0 0 0>,
282 <&pinctrl 104 0 0>,
283 <&pinctrl 168 0 0>;
288 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
295 reg = <0x58780000 0x80>;
297 #size-cells = <0>;
300 pinctrl-0 = <&pinctrl_i2c0>;
309 reg = <0x58781000 0x80>;
311 #size-cells = <0>;
314 pinctrl-0 = <&pinctrl_i2c1>;
323 reg = <0x58782000 0x80>;
325 #size-cells = <0>;
328 pinctrl-0 = <&pinctrl_i2c2>;
337 reg = <0x58783000 0x80>;
339 #size-cells = <0>;
342 pinctrl-0 = <&pinctrl_i2c3>;
351 reg = <0x58786000 0x80>;
353 #size-cells = <0>;
363 reg = <0x58c00000 0x400>;
367 pinctrl-0 = <&pinctrl_system_bus>;
372 reg = <0x59801000 0x400>;
378 reg = <0x59810000 0x400>;
394 reg = <0x59820000 0x200>;
409 reg = <0x5a000000 0x400>;
412 pinctrl-0 = <&pinctrl_emmc>;
429 reg = <0x5a400000 0x800>;
432 pinctrl-0 = <&pinctrl_sd>;
434 clocks = <&sd_clk 0>;
436 resets = <&sd_rst 0>;
442 socionext,syscon-uhs-mode = <&sdctrl 0>;
448 reg = <0x5f800000 0x2000>;
458 reg = <0x5f900000 0x2000>;
461 ranges = <0 0x5f900000 0x2000>;
465 reg = <0x100 0x28>;
470 reg = <0x200 0x68>;
476 reg = <0x54 1>;
480 reg = <0x55 1>;
484 reg = <0x58 1>;
488 reg = <0x59 1>;
491 usb_sel_t0: trim@54,0 {
492 reg = <0x54 1>;
493 bits = <0 4>;
495 usb_sel_t1: trim@55,0 {
496 reg = <0x55 1>;
497 bits = <0 4>;
499 usb_sel_t2: trim@58,0 {
500 reg = <0x58 1>;
501 bits = <0 4>;
503 usb_sel_t3: trim@59,0 {
504 reg = <0x59 1>;
505 bits = <0 4>;
507 usb_hs_i0: trim@56,0 {
508 reg = <0x56 1>;
509 bits = <0 4>;
511 usb_hs_i2: trim@5a,0 {
512 reg = <0x5a 1>;
513 bits = <0 4>;
520 reg = <0x5fc10000 0x5300>;
528 reg = <0x5fc20000 0x200>;
535 reg = <0x5fe00000 0x10000>, /* GICD */
536 <0x5fe80000 0x80000>; /* GICR */
545 reg = <0x61840000 0x10000>;
564 #thermal-sensor-cells = <0>;
565 socionext,tmod-calibration = <0x0f22 0x68ee>;
572 reg = <0x65000000 0x8500>;
575 pinctrl-0 = <&pinctrl_ether_rgmii>;
582 socionext,syscon-phy-mode = <&soc_glue 0>;
586 #size-cells = <0>;
593 reg = <0x65200000 0x8500>;
596 pinctrl-0 = <&pinctrl_ether1_rgmii>;
607 #size-cells = <0>;
615 reg = <0x65600000 0x10000>;
618 resets = <&sys_rst 28>, <&ahci0_rst 0>;
626 reg = <0x65700000 0x100>;
629 ranges = <0 0x65700000 0x100>;
631 ahci0_rst: reset-controller@0 {
633 reg = <0x0 0x4>;
643 reg = <0x10 0x10>;
648 #phy-cells = <0>;
656 reg = <0x65800000 0x10000>;
659 resets = <&sys_rst 29>, <&ahci1_rst 0>;
667 reg = <0x65900000 0x100>;
670 ranges = <0 0x65900000 0x100>;
672 ahci1_rst: reset-controller@0 {
674 reg = <0x0 0x4>;
684 reg = <0x10 0x10>;
689 #phy-cells = <0>;
696 reg = <0x65a00000 0xcd00>;
700 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
712 reg = <0x65b00000 0x400>;
715 ranges = <0 0x65b00000 0x400>;
717 usb0_rst: reset-controller@0 {
719 reg = <0x0 0x4>;
729 reg = <0x100 0x10>;
738 reg = <0x110 0x10>;
747 reg = <0x200 0x10>;
748 #phy-cells = <0>;
761 reg = <0x210 0x10>;
762 #phy-cells = <0>;
775 reg = <0x300 0x10>;
776 #phy-cells = <0>;
786 reg = <0x310 0x10>;
787 #phy-cells = <0>;
799 reg = <0x65c00000 0xcd00>;
803 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
815 reg = <0x65d00000 0x400>;
818 ranges = <0 0x65d00000 0x400>;
820 usb1_rst: reset-controller@0 {
822 reg = <0x0 0x4>;
832 reg = <0x100 0x10>;
841 reg = <0x110 0x10>;
850 reg = <0x200 0x10>;
851 #phy-cells = <0>;
865 reg = <0x210 0x10>;
866 #phy-cells = <0>;
880 reg = <0x300 0x10>;
881 #phy-cells = <0>;
895 reg = <0x66000000 0x1000>, <0x66010000 0x10000>,
896 <0x2fff0000 0x10000>;
903 bus-range = <0x0 0xff>;
907 <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>,
909 <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>;
914 interrupt-map-mask = <0 0 0 7>;
915 interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
916 <0 0 0 2 &pcie_intc 1>, /* INTB */
917 <0 0 0 3 &pcie_intc 2>, /* INTC */
918 <0 0 0 4 &pcie_intc 3>; /* INTD */
932 reg = <0x66038000 0x4000>;
933 #phy-cells = <0>;
945 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
947 #size-cells = <0>;
950 pinctrl-0 = <&pinctrl_nand>;