Lines Matching +full:regulator +full:- +full:state +full:-
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "tsd,rk3588-tiger", "rockchip,rk3588";
21 emmc_pwrseq: emmc-pwrseq {
22 compatible = "mmc-pwrseq-emmc";
23 pinctrl-0 = <&emmc_reset>;
24 pinctrl-names = "default";
25 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
28 extcon_usb3: extcon-usb3 {
29 compatible = "linux,extcon-usb-gpio";
30 id-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&usb3_id>;
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&module_led_pin>;
42 led-1 {
45 linux,default-trigger = "heartbeat";
51 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
54 * This is modeled as a fixed-clock plus a gpio-gate-clock.
56 pcie_refclk_gen: pcie-refclk-gen-clock {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <100000000>;
62 pcie_refclk: pcie-refclk-clock {
63 compatible = "gpio-gate-clock";
65 #clock-cells = <0>;
66 enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */
69 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
70 compatible = "regulator-fixed";
71 regulator-name = "vcc_1v1_nldo_s3";
72 regulator-always-on;
73 regulator-boot-on;
74 regulator-min-microvolt = <1100000>;
75 regulator-max-microvolt = <1100000>;
76 vin-supply = <&vcc5v0_sys>;
79 vcc_1v2_s3: regulator-vcc-1v2-s3 {
80 compatible = "regulator-fixed";
81 regulator-name = "vcc_1v2_s3";
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-min-microvolt = <1200000>;
85 regulator-max-microvolt = <1200000>;
86 vin-supply = <&vcc5v0_sys>;
89 vcc5v0_sys: regulator-vcc5v0-sys {
90 compatible = "regulator-fixed";
91 regulator-name = "vcc5v0_sys";
92 regulator-always-on;
93 regulator-boot-on;
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
96 vin-supply = <&vcc5v0_baseboard>;
101 cpu-supply = <&vdd_cpu_big0_s0>;
105 cpu-supply = <&vdd_cpu_big0_s0>;
109 cpu-supply = <&vdd_cpu_big1_s0>;
113 cpu-supply = <&vdd_cpu_big1_s0>;
117 cpu-supply = <&vdd_cpu_lit_s0>;
121 cpu-supply = <&vdd_cpu_lit_s0>;
125 cpu-supply = <&vdd_cpu_lit_s0>;
129 cpu-supply = <&vdd_cpu_lit_s0>;
134 phy-handle = <&rgmii_phy>;
135 phy-mode = "rgmii";
136 phy-supply = <&vcc_1v2_s3>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&gmac0_miim
147 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
148 snps,reset-active-low;
149 snps,reset-delays-us = <0 10000 100000>;
153 mali-supply = <&vdd_gpu_s0>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl
164 pinctrl-0 = <&i2c1m0_xfer>;
176 pinctrl-0 = <&i2c2m3_xfer>;
188 pinctrl-0 = <&i2c3m0_xfer>;
192 pinctrl-0 = <&i2c4m4_xfer>;
195 vdd_npu_s0: regulator@42 {
198 fcs,suspend-voltage-selector = <1>;
199 regulator-name = "vdd_npu_s0";
200 regulator-always-on;
201 regulator-boot-on;
202 regulator-min-microvolt = <550000>;
203 regulator-max-microvolt = <950000>;
204 regulator-ramp-delay = <2300>;
205 vin-supply = <&vcc5v0_sys>;
207 regulator-state-mem {
208 regulator-off-in-suspend;
214 pinctrl-0 = <&i2c5m1_xfer>;
227 * Mule-ATtiny can handle up to Fast mode Plus (1MHz) on I2C bus,
230 clock-frequency = <400000>;
237 i2c-mux {
238 compatible = "tsd,mule-i2c-mux";
239 #address-cells = <1>;
240 #size-cells = <0>;
244 #address-cells = <1>;
245 #size-cells = <0>;
267 vdd_cpu_big0_s0: regulator@42 {
270 fcs,suspend-voltage-selector = <1>;
271 regulator-name = "vdd_cpu_big0_s0";
272 regulator-always-on;
273 regulator-boot-on;
274 regulator-min-microvolt = <550000>;
275 regulator-max-microvolt = <1050000>;
276 regulator-ramp-delay = <2300>;
277 vin-supply = <&vcc5v0_sys>;
279 regulator-state-mem {
280 regulator-off-in-suspend;
284 vdd_cpu_big1_s0: regulator@43 {
287 fcs,suspend-voltage-selector = <1>;
288 regulator-name = "vdd_cpu_big1_s0";
289 regulator-always-on;
290 regulator-boot-on;
291 regulator-min-microvolt = <550000>;
292 regulator-max-microvolt = <1050000>;
293 regulator-ramp-delay = <2300>;
294 vin-supply = <&vcc5v0_sys>;
296 regulator-state-mem {
297 regulator-off-in-suspend;
311 pinctrl-0 = <&i2c8m2_xfer>;
315 rgmii_phy: ethernet-phy@6 {
317 compatible = "ethernet-phy-ieee802.3-c22";
325 * The board has a gpio-controlled "pcie_refclk" generator,
332 clock-names = "aclk_mst", "aclk_slv",
336 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
340 domain-supply = <&vdd_gpu_s0>;
345 emmc_reset: emmc-reset {
351 eth_reset: eth-reset {
357 module_led_pin: module-led-pin {
363 usb3_id: usb3-id {
371 pinctrl-0 = <&pwm0m1_pins>;
372 pinctrl-names = "default";
376 vref-supply = <&vcc_1v8_s0>;
381 bus-width = <8>;
382 cap-mmc-highspeed;
383 mmc-ddr-1_8v;
384 mmc-hs200-1_8v;
385 mmc-hs400-1_8v;
386 mmc-hs400-enhanced-strobe;
387 mmc-pwrseq = <&emmc_pwrseq>;
388 no-sdio;
389 no-sd;
390 non-removable;
391 pinctrl-names = "default";
392 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
393 vmmc-supply = <&vcc_3v3_s3>;
394 vqmmc-supply = <&vcc_1v8_s3>;
399 bus-width = <4>;
400 cap-sd-highspeed;
401 max-frequency = <150000000>;
402 vqmmc-supply = <&vccio_sd_s0>;
406 pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>;
410 assigned-clocks = <&cru CLK_SPI2>;
411 assigned-clock-rates = <200000000>;
412 num-cs = <1>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
420 interrupt-parent = <&gpio0>;
422 gpio-controller;
423 #gpio-cells = <2>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
427 spi-max-frequency = <1000000>;
428 system-power-controller;
429 vcc1-supply = <&vcc5v0_sys>;
430 vcc2-supply = <&vcc5v0_sys>;
431 vcc3-supply = <&vcc5v0_sys>;
432 vcc4-supply = <&vcc5v0_sys>;
433 vcc5-supply = <&vcc5v0_sys>;
434 vcc6-supply = <&vcc5v0_sys>;
435 vcc7-supply = <&vcc5v0_sys>;
436 vcc8-supply = <&vcc5v0_sys>;
437 vcc9-supply = <&vcc5v0_sys>;
438 vcc10-supply = <&vcc5v0_sys>;
439 vcc11-supply = <&vcc_2v0_pldo_s3>;
440 vcc12-supply = <&vcc5v0_sys>;
441 vcc13-supply = <&vcc_1v1_nldo_s3>;
442 vcc14-supply = <&vcc_1v1_nldo_s3>;
443 vcca-supply = <&vcc5v0_sys>;
444 rockchip,reset-mode = <RK806_RESTART>;
446 rk806_dvs1_null: dvs1-null-pins {
451 rk806_dvs2_null: dvs2-null-pins {
456 rk806_dvs3_null: dvs3-null-pins {
462 vdd_gpu_s0: dcdc-reg1 {
463 regulator-boot-on;
464 regulator-min-microvolt = <550000>;
465 regulator-max-microvolt = <950000>;
466 regulator-ramp-delay = <12500>;
467 regulator-name = "vdd_gpu_s0";
468 regulator-enable-ramp-delay = <400>;
470 regulator-state-mem {
471 regulator-off-in-suspend;
475 vdd_cpu_lit_s0: dcdc-reg2 {
476 regulator-name = "vdd_cpu_lit_s0";
477 regulator-always-on;
478 regulator-boot-on;
479 regulator-min-microvolt = <550000>;
480 regulator-max-microvolt = <950000>;
481 regulator-ramp-delay = <12500>;
483 regulator-state-mem {
484 regulator-off-in-suspend;
488 vdd_log_s0: dcdc-reg3 {
489 regulator-name = "vdd_log_s0";
490 regulator-always-on;
491 regulator-boot-on;
492 regulator-min-microvolt = <675000>;
493 regulator-max-microvolt = <750000>;
494 regulator-ramp-delay = <12500>;
496 regulator-state-mem {
497 regulator-off-in-suspend;
498 regulator-suspend-microvolt = <750000>;
502 vdd_vdenc_s0: dcdc-reg4 {
503 regulator-name = "vdd_vdenc_s0";
504 regulator-always-on;
505 regulator-boot-on;
506 regulator-min-microvolt = <550000>;
507 regulator-max-microvolt = <950000>;
508 regulator-ramp-delay = <12500>;
510 regulator-state-mem {
511 regulator-off-in-suspend;
515 vdd_ddr_s0: dcdc-reg5 {
516 regulator-name = "vdd_ddr_s0";
517 regulator-always-on;
518 regulator-boot-on;
519 regulator-min-microvolt = <675000>;
520 regulator-max-microvolt = <900000>;
521 regulator-ramp-delay = <12500>;
523 regulator-state-mem {
524 regulator-off-in-suspend;
525 regulator-suspend-microvolt = <850000>;
529 vdd2_ddr_s3: dcdc-reg6 {
530 regulator-name = "vdd2_ddr_s3";
531 regulator-always-on;
532 regulator-boot-on;
534 regulator-state-mem {
535 regulator-on-in-suspend;
539 vcc_2v0_pldo_s3: dcdc-reg7 {
540 regulator-name = "vcc_2v0_pldo_s3";
541 regulator-always-on;
542 regulator-boot-on;
543 regulator-min-microvolt = <2000000>;
544 regulator-max-microvolt = <2000000>;
545 regulator-ramp-delay = <12500>;
547 regulator-state-mem {
548 regulator-on-in-suspend;
549 regulator-suspend-microvolt = <2000000>;
553 vcc_3v3_s3: dcdc-reg8 {
554 regulator-name = "vcc_3v3_s3";
555 regulator-always-on;
556 regulator-boot-on;
557 regulator-min-microvolt = <3300000>;
558 regulator-max-microvolt = <3300000>;
560 regulator-state-mem {
561 regulator-on-in-suspend;
562 regulator-suspend-microvolt = <3300000>;
566 vddq_ddr_s0: dcdc-reg9 {
567 regulator-name = "vddq_ddr_s0";
568 regulator-always-on;
569 regulator-boot-on;
571 regulator-state-mem {
572 regulator-off-in-suspend;
576 vcc_1v8_s3: dcdc-reg10 {
577 regulator-name = "vcc_1v8_s3";
578 regulator-always-on;
579 regulator-boot-on;
580 regulator-min-microvolt = <1800000>;
581 regulator-max-microvolt = <1800000>;
583 regulator-state-mem {
584 regulator-on-in-suspend;
585 regulator-suspend-microvolt = <1800000>;
589 vcca_1v8_s0: pldo-reg1 {
590 regulator-name = "vcca_1v8_s0";
591 regulator-always-on;
592 regulator-boot-on;
593 regulator-min-microvolt = <1800000>;
594 regulator-max-microvolt = <1800000>;
596 regulator-state-mem {
597 regulator-off-in-suspend;
601 vcc_1v8_s0: pldo-reg2 {
602 regulator-name = "vcc_1v8_s0";
603 regulator-always-on;
604 regulator-boot-on;
605 regulator-min-microvolt = <1800000>;
606 regulator-max-microvolt = <1800000>;
608 regulator-state-mem {
609 regulator-off-in-suspend;
610 regulator-suspend-microvolt = <1800000>;
614 vdda_1v2_s0: pldo-reg3 {
615 regulator-name = "vdda_1v2_s0";
616 regulator-always-on;
617 regulator-boot-on;
618 regulator-min-microvolt = <1200000>;
619 regulator-max-microvolt = <1200000>;
621 regulator-state-mem {
622 regulator-off-in-suspend;
626 vcca_3v3_s0: pldo-reg4 {
627 regulator-name = "vcca_3v3_s0";
628 regulator-always-on;
629 regulator-boot-on;
630 regulator-min-microvolt = <3300000>;
631 regulator-max-microvolt = <3300000>;
632 regulator-ramp-delay = <12500>;
634 regulator-state-mem {
635 regulator-off-in-suspend;
639 vccio_sd_s0: pldo-reg5 {
640 regulator-name = "vccio_sd_s0";
641 regulator-always-on;
642 regulator-boot-on;
643 regulator-min-microvolt = <1800000>;
644 regulator-max-microvolt = <3300000>;
645 regulator-ramp-delay = <12500>;
647 regulator-state-mem {
648 regulator-off-in-suspend;
652 pldo6_s3: pldo-reg6 {
653 regulator-name = "pldo6_s3";
654 regulator-always-on;
655 regulator-boot-on;
656 regulator-min-microvolt = <1800000>;
657 regulator-max-microvolt = <1800000>;
659 regulator-state-mem {
660 regulator-on-in-suspend;
661 regulator-suspend-microvolt = <1800000>;
665 vdd_0v75_s3: nldo-reg1 {
666 regulator-name = "vdd_0v75_s3";
667 regulator-always-on;
668 regulator-boot-on;
669 regulator-min-microvolt = <750000>;
670 regulator-max-microvolt = <750000>;
672 regulator-state-mem {
673 regulator-on-in-suspend;
674 regulator-suspend-microvolt = <750000>;
678 vdda_ddr_pll_s0: nldo-reg2 {
679 regulator-name = "vdda_ddr_pll_s0";
680 regulator-always-on;
681 regulator-boot-on;
682 regulator-min-microvolt = <850000>;
683 regulator-max-microvolt = <850000>;
685 regulator-state-mem {
686 regulator-off-in-suspend;
687 regulator-suspend-microvolt = <850000>;
691 vdda_0v75_s0: nldo-reg3 {
692 regulator-name = "vdda_0v75_s0";
693 regulator-always-on;
694 regulator-boot-on;
695 regulator-min-microvolt = <750000>;
696 regulator-max-microvolt = <750000>;
698 regulator-state-mem {
699 regulator-off-in-suspend;
703 vdda_0v85_s0: nldo-reg4 {
704 regulator-name = "vdda_0v85_s0";
705 regulator-always-on;
706 regulator-boot-on;
707 regulator-min-microvolt = <850000>;
708 regulator-max-microvolt = <850000>;
710 regulator-state-mem {
711 regulator-off-in-suspend;
715 vdd_0v75_s0: nldo-reg5 {
716 regulator-name = "vdd_0v75_s0";
717 regulator-always-on;
718 regulator-boot-on;
719 regulator-min-microvolt = <750000>;
720 regulator-max-microvolt = <750000>;
722 regulator-state-mem {
723 regulator-off-in-suspend;
736 pinctrl-0 = <&uart2m2_xfer>;
739 /* Mule-ATtiny UPDI */
741 pinctrl-0 = <&uart4m2_xfer>;