Lines Matching +full:vpcie3v3 +full:- +full:supply
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
10 stdout-path = "serial2:1500000n8";
13 vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
14 compatible = "regulator-fixed";
15 regulator-name = "vcc3v3_pcie2x1l0";
16 regulator-min-microvolt = <3300000>;
17 regulator-max-microvolt = <3300000>;
18 startup-delay-us = <5000>;
19 vin-supply = <&vcc_3v3_s3>;
22 vcc3v3_pcie3x2: vcc3v3-pcie3x2-regulator {
23 compatible = "regulator-fixed";
24 enable-active-high;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pcie3x2_vcc3v3_en>;
28 regulator-name = "vcc3v3_pcie3x2";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 startup-delay-us = <5000>;
32 vin-supply = <&vcc5v0_sys>;
35 vcc3v3_pcie3x4: vcc3v3-pcie3x4-regulator {
36 compatible = "regulator-fixed";
37 enable-active-high;
39 pinctrl-names = "default";
40 pinctrl-0 = <&pcie3x4_vcc3v3_en>;
41 regulator-name = "vcc3v3_pcie3x4";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 startup-delay-us = <5000>;
45 vin-supply = <&vcc5v0_sys>;
48 vcc5v0_host: vcc5v0-host-regulator {
49 compatible = "regulator-fixed";
50 enable-active-high;
52 pinctrl-names = "default";
53 pinctrl-0 = <&vcc5v0_host_en>;
54 regulator-name = "vcc5v0_host";
55 regulator-min-microvolt = <5000000>;
56 regulator-max-microvolt = <5000000>;
57 regulator-boot-on;
58 regulator-always-on;
59 vin-supply = <&vcc5v0_sys>;
81 interrupt-parent = <&gpio0>;
83 #clock-cells = <0>;
84 clock-output-names = "hym8563";
85 pinctrl-names = "default";
86 pinctrl-0 = <&hym8563_int>;
87 wakeup-source;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pcie2_0_rst>;
95 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; /* PCIE20_1_PERST_L */
96 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
104 /* B-Key and E-Key */
106 pinctrl-names = "default";
107 pinctrl-0 = <&pcie3x2_rst>;
108 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTn_M1_L */
109 vpcie3v3-supply = <&vcc3v3_pcie3x2>;
113 /* M-Key */
115 pinctrl-names = "default";
116 pinctrl-0 = <&pcie3x4_rst>;
117 reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* PCIE30X2_PERSTn_M1_L */
118 vpcie3v3-supply = <&vcc3v3_pcie3x4>;
124 pcie2_0_rst: pcie2-0-rst {
130 pcie3x2_rst: pcie3x2-rst {
134 pcie3x2_vcc3v3_en: pcie3x2-vcc3v3-en {
138 pcie3x4_rst: pcie3x4-rst {
142 pcie3x4_vcc3v3_en: pcie3x4-vcc3v3-en {
148 hym8563_int: hym8563-int {
154 vcc5v0_host_en: vcc5v0-host-en {
162 pinctrl-0 = <&pwm2m1_pins>;
163 pinctrl-names = "default";
172 bus-width = <4>;
173 cap-mmc-highspeed;
174 cap-sd-highspeed;
175 disable-wp;
176 no-sdio;
177 no-mmc;
178 sd-uhs-sdr104;
179 vmmc-supply = <&vcc_3v3_s3>;
180 vqmmc-supply = <&vccio_sd_s0>;
185 pinctrl-0 = <&uart2m0_xfer>;
191 pinctrl-0 = <&uart6m0_xfer>;
192 pinctrl-names = "default";
198 pinctrl-0 = <&uart7m2_xfer>;
199 pinctrl-names = "default";
209 phy-supply = <&vcc5v0_sys>;
218 phy-supply = <&vcc5v0_host>;