Lines Matching +full:rk3568 +full:- +full:pcie
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
9 /dts-v1/;
10 #include "rk3568-nanopi-r5s.dtsi"
14 compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
16 gpio-keys {
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&reset_button_pin>;
21 button-reset {
22 debounce-interval = <50>;
29 gpio-leds {
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
34 led-lan {
40 power_led: led-power {
43 linux,default-trigger = "heartbeat";
47 led-wan {
53 led-wlan {
62 pinctrl-names = "default";
63 pinctrl-0 = <&pcie20_reset_pin>;
64 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
69 num-lanes = <1>;
70 reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
71 vpcie3v3-supply = <&vcc3v3_pcie>;
76 num-lanes = <1>;
77 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
78 vpcie3v3-supply = <&vcc3v3_pcie>;
83 gpio-leds {
84 lan_led_pin: lan-led-pin {
88 power_led_pin: power-led-pin {
92 wan_led_pin: wan-led-pin {
96 wlan_led_pin: wlan-led-pin {
101 pcie {
102 pcie20_reset_pin: pcie20-reset-pin {
107 rockchip-key {
108 reset_button_pin: reset-button-pin {