Lines Matching +full:wp +full:- +full:inverted
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/pwm/pwm.h>
20 stdout-path = "serial2:1500000n8";
23 tas2562-sound {
24 compatible = "simple-audio-card";
25 simple-audio-card,format = "i2s";
26 simple-audio-card,name = "Speaker";
27 simple-audio-card,mclk-fs = <256>;
29 simple-audio-card,cpu {
30 sound-dai = <&i2s1_8ch>;
33 simple-audio-card,codec {
34 sound-dai = <&tas2562>;
38 vdd_gpu: regulator-vdd-gpu {
39 compatible = "pwm-regulator";
41 regulator-name = "vdd_gpu";
42 regulator-min-microvolt = <915000>;
43 regulator-max-microvolt = <1000000>;
44 regulator-always-on;
45 regulator-boot-on;
46 regulator-settling-time-up-us = <250>;
47 pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
50 p3v3: regulator-p3v3 {
51 compatible = "regulator-fixed";
52 regulator-name = "p3v3";
53 regulator-always-on;
54 regulator-boot-on;
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
59 p1v8: regulator-p1v8 {
60 compatible = "regulator-fixed";
61 regulator-name = "p1v8";
62 regulator-always-on;
63 regulator-boot-on;
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <1800000>;
68 vcc_sd: regulator-sd {
69 compatible = "regulator-gpio";
70 enable-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
71 enable-active-high;
73 regulator-name = "sdcard-gpio-supply";
74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <3300000>;
79 vdd_npu: regulator-vdd-npu {
80 compatible = "pwm-regulator";
82 regulator-name = "vdd_npu";
83 regulator-min-microvolt = <915000>;
84 regulator-max-microvolt = <1000000>;
85 regulator-always-on;
86 regulator-boot-on;
87 regulator-settling-time-up-us = <250>;
88 pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
93 compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
94 pinctrl-names = "default";
95 pinctrl-0 = <&can0m0_pins>;
100 compatible = "rockchip,rk3568v3-canfd", "rockchip,rk3568v2-canfd";
101 pinctrl-names = "default";
102 pinctrl-0 = <&can1m1_pins>;
119 cpu-supply = <&vdd_cpu>;
123 cpu-supply = <&vdd_cpu>;
127 cpu-supply = <&vdd_cpu>;
131 cpu-supply = <&vdd_cpu>;
135 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
136 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
137 phy-handle = <&rgmii_phy1>;
138 phy-mode = "rgmii-id";
140 pinctrl-names = "default";
141 pinctrl-0 = <&gmac1m1_miim
151 mali-supply = <&vdd_gpu>;
156 compatible = "operating-points-v2";
158 opp-200000000 {
159 opp-hz = /bits/ 64 <200000000>;
160 opp-microvolt = <915000>;
163 opp-300000000 {
164 opp-hz = /bits/ 64 <300000000>;
165 opp-microvolt = <915000>;
168 opp-400000000 {
169 opp-hz = /bits/ 64 <400000000>;
170 opp-microvolt = <915000>;
173 opp-600000000 {
174 opp-hz = /bits/ 64 <600000000>;
175 opp-microvolt = <920000>;
178 opp-700000000 {
179 opp-hz = /bits/ 64 <700000000>;
180 opp-microvolt = <950000>;
183 opp-800000000 {
184 opp-hz = /bits/ 64 <800000000>;
185 opp-microvolt = <1000000>;
195 fcs,suspend-voltage-selector = <1>;
196 regulator-name = "vdd_cpu";
197 regulator-always-on;
198 regulator-boot-on;
199 regulator-min-microvolt = <800000>;
200 regulator-max-microvolt = <1150000>;
201 regulator-ramp-delay = <2300>;
203 regulator-state-mem {
204 regulator-off-in-suspend;
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c2m0_xfer>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&i2c3m0_xfer>;
223 #sound-dai-cells = <0>;
224 shutdown-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
225 interrupt-parent = <&gpio1>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_tas2562>;
229 ti,imon-slot-no = <0>;
236 temperature-sensor@48 {
244 #clock-cells = <0>;
245 clock-output-names = "rtcic_32kout";
250 pinctrl-names = "default";
251 pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
252 rockchip,trcm-sync-tx-only;
257 rgmii_phy1: ethernet-phy@2 {
258 compatible = "ethernet-phy-ieee802.3-c22";
260 pinctrl-names = "default";
261 pinctrl-0 = <ð_phy1_rst>;
262 reset-assert-us = <20000>;
263 reset-deassert-us = <100000>;
264 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&pcie20m1_pins>;
271 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&pcie30x2m1_pins>;
282 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
283 vpcie3v3-supply = <&p3v3>;
289 eth_phy1_rst: eth-phy1-rst {
302 pmuio1-supply = <&p3v3>;
303 pmuio2-supply = <&p3v3>;
304 vccio1-supply = <&p1v8>;
305 vccio2-supply = <&p1v8>;
306 vccio3-supply = <&vcc_sd>;
307 vccio4-supply = <&p1v8>;
308 vccio5-supply = <&p3v3>;
309 vccio6-supply = <&p1v8>;
310 vccio7-supply = <&p3v3>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&pwm1m0_pins>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pwm2m0_pins>;
327 vref-supply = <&p1v8>;
332 bus-width = <8>;
333 max-frequency = <200000000>;
334 non-removable;
335 pinctrl-names = "default";
336 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
337 vmmc-supply = <&p3v3>;
338 vqmmc-supply = <&p1v8>;
339 mmc-hs200-1_8v;
340 non-removable;
341 no-sd;
342 no-sdio;
347 bus-width = <4>;
348 cap-sd-highspeed;
349 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
350 disable-wp;
351 pinctrl-names = "default";
352 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
353 sd-uhs-sdr50;
354 sd-uhs-sdr104;
355 vmmc-supply = <&p3v3>;
356 vqmmc-supply = <&vcc_sd>;
361 rockchip,hw-tshut-mode = <1>;
362 rockchip,hw-tshut-polarity = <0>;