Lines Matching +full:adc +full:- +full:1 +full:bit +full:- +full:rpt
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: ppvar-sys {
46 compatible = "regulator-fixed";
47 regulator-name = "ppvar_sys";
48 regulator-always-on;
49 regulator-boot-on;
52 pp1200_lpddr: pp1200-lpddr {
53 compatible = "regulator-fixed";
54 regulator-name = "pp1200_lpddr";
57 regulator-always-on;
58 regulator-boot-on;
59 regulator-min-microvolt = <1200000>;
60 regulator-max-microvolt = <1200000>;
62 vin-supply = <&ppvar_sys>;
66 compatible = "regulator-fixed";
67 regulator-name = "pp1800";
70 regulator-always-on;
71 regulator-boot-on;
72 regulator-min-microvolt = <1800000>;
73 regulator-max-microvolt = <1800000>;
75 vin-supply = <&ppvar_sys>;
79 compatible = "regulator-fixed";
80 regulator-name = "pp3300";
83 regulator-always-on;
84 regulator-boot-on;
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
88 vin-supply = <&ppvar_sys>;
92 compatible = "regulator-fixed";
93 regulator-name = "pp5000";
96 regulator-always-on;
97 regulator-boot-on;
98 regulator-min-microvolt = <5000000>;
99 regulator-max-microvolt = <5000000>;
101 vin-supply = <&ppvar_sys>;
104 ppvar_bigcpu_pwm: ppvar-bigcpu-pwm {
105 compatible = "pwm-regulator";
106 regulator-name = "ppvar_bigcpu_pwm";
109 pwm-supply = <&ppvar_sys>;
110 pwm-dutycycle-range = <100 0>;
111 pwm-dutycycle-unit = <100>;
114 regulator-always-on;
115 regulator-boot-on;
116 regulator-min-microvolt = <800107>;
117 regulator-max-microvolt = <1302232>;
120 ppvar_bigcpu: ppvar-bigcpu {
121 compatible = "vctrl-regulator";
122 regulator-name = "ppvar_bigcpu";
124 regulator-min-microvolt = <800107>;
125 regulator-max-microvolt = <1302232>;
127 ctrl-supply = <&ppvar_bigcpu_pwm>;
128 ctrl-voltage-range = <800107 1302232>;
130 regulator-settling-time-up-us = <322>;
133 ppvar_litcpu_pwm: ppvar-litcpu-pwm {
134 compatible = "pwm-regulator";
135 regulator-name = "ppvar_litcpu_pwm";
138 pwm-supply = <&ppvar_sys>;
139 pwm-dutycycle-range = <100 0>;
140 pwm-dutycycle-unit = <100>;
143 regulator-always-on;
144 regulator-boot-on;
145 regulator-min-microvolt = <797743>;
146 regulator-max-microvolt = <1307837>;
149 ppvar_litcpu: ppvar-litcpu {
150 compatible = "vctrl-regulator";
151 regulator-name = "ppvar_litcpu";
153 regulator-min-microvolt = <797743>;
154 regulator-max-microvolt = <1307837>;
156 ctrl-supply = <&ppvar_litcpu_pwm>;
157 ctrl-voltage-range = <797743 1307837>;
159 regulator-settling-time-up-us = <384>;
162 ppvar_gpu_pwm: ppvar-gpu-pwm {
163 compatible = "pwm-regulator";
164 regulator-name = "ppvar_gpu_pwm";
167 pwm-supply = <&ppvar_sys>;
168 pwm-dutycycle-range = <100 0>;
169 pwm-dutycycle-unit = <100>;
172 regulator-always-on;
173 regulator-boot-on;
174 regulator-min-microvolt = <786384>;
175 regulator-max-microvolt = <1217747>;
178 ppvar_gpu: ppvar-gpu {
179 compatible = "vctrl-regulator";
180 regulator-name = "ppvar_gpu";
182 regulator-min-microvolt = <786384>;
183 regulator-max-microvolt = <1217747>;
185 ctrl-supply = <&ppvar_gpu_pwm>;
186 ctrl-voltage-range = <786384 1217747>;
188 regulator-settling-time-up-us = <390>;
192 pp900_ddrpll: pp900-ap {
196 pp900_pll: pp900-ap {
200 pp900_pmu: pp900-ap {
227 pp3000_sd_slot: pp3000-sd-slot {
228 compatible = "regulator-fixed";
229 regulator-name = "pp3000_sd_slot";
230 pinctrl-names = "default";
231 pinctrl-0 = <&sd_slot_pwr_en>;
233 enable-active-high;
236 vin-supply = <&pp3000>;
240 * Technically, this is a small abuse of 'regulator-gpio'; this
245 ppvar_sd_card_io: ppvar-sd-card-io {
246 compatible = "regulator-gpio";
247 regulator-name = "ppvar_sd_card_io";
248 pinctrl-names = "default";
249 pinctrl-0 = <&sd_io_pwr_en &sd_pwr_1800_sel>;
251 enable-active-high;
252 enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <3000000>;
262 pp3300_trackpad: pp3300-trackpad {
269 ap_rtc_clk: ap-rtc-clk {
270 compatible = "fixed-clock";
271 clock-frequency = <32768>;
272 clock-output-names = "xin32k";
273 #clock-cells = <0>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&sdmode_en>;
280 sdmode-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
281 sdmode-delay = <2>;
282 #sound-dai-cells = <0>;
287 compatible = "rockchip,rk3399-gru-sound";
315 opp-suspend;
321 opp-suspend;
326 cpu-supply = <&ppvar_litcpu>;
330 cpu-supply = <&ppvar_litcpu>;
334 cpu-supply = <&ppvar_litcpu>;
338 cpu-supply = <&ppvar_litcpu>;
342 cpu-supply = <&ppvar_bigcpu>;
346 cpu-supply = <&ppvar_bigcpu>;
351 assigned-clocks =
362 assigned-clock-rates =
382 rockchip,pd-idle-ns = <160>;
383 rockchip,sr-idle-ns = <10240>;
384 rockchip,sr-mc-gate-idle-ns = <40960>;
385 rockchip,srpd-lite-idle-ns = <61440>;
386 rockchip,standby-idle-ns = <81920>;
392 rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>;
393 rockchip,srpd-lite-idle-dis-freq-hz = <0>;
394 rockchip,standby-idle-dis-freq-hz = <928000000>;
399 opp-suspend;
408 mali-supply = <&ppvar_gpu>;
415 clock-frequency = <400000>;
418 i2c-scl-falling-time-ns = <50>;
419 i2c-scl-rising-time-ns = <300>;
425 clock-frequency = <400000>;
428 i2c-scl-falling-time-ns = <50>;
429 i2c-scl-rising-time-ns = <300>;
431 codec: da7219@1a {
434 interrupt-parent = <&gpio1>;
437 clock-names = "mclk";
438 dlg,micbias-lvl = <2600>;
439 dlg,mic-amp-in-sel = "diff";
440 pinctrl-names = "default";
441 pinctrl-0 = <&headset_int_l>;
442 VDD-supply = <&pp1800>;
443 VDDMIC-supply = <&pp3300>;
444 VDDIO-supply = <&pp1800>;
447 dlg,adc-1bit-rpt = <1>;
448 dlg,btn-avg = <4>;
449 dlg,btn-cfg = <50>;
450 dlg,mic-det-thr = <500>;
451 dlg,jack-ins-deb = <20>;
452 dlg,jack-det-rate = "32_64";
453 dlg,jack-rem-deb = <1>;
455 dlg,a-d-btn-thr = <0xa>;
456 dlg,d-b-btn-thr = <0x16>;
457 dlg,b-c-btn-thr = <0x21>;
458 dlg,c-mic-btn-thr = <0x3E>;
470 audio-supply = <&pp1800_audio>; /* APIO5_VDD; 3d 4a */
471 bt656-supply = <&pp1800_ap_io>; /* APIO2_VDD; 2a 2b */
472 gpio1830-supply = <&pp3000_ap>; /* APIO4_VDD; 4c 4d */
473 sdmmc-supply = <&ppvar_sd_card_io>; /* SDMMC0_VDD; 4b */
479 ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;
482 vpcie3v3-supply = <&pp3300_wifi_bt>;
483 vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */
484 vpcie0v9-supply = <&pp900_pcie>;
488 #address-cells = <3>;
489 #size-cells = <2>;
502 pmu1830-supply = <&pp1800_pmu>; /* PMUIO2_VDD */
527 assigned-clock-rates = <150000000>;
529 bus-width = <8>;
530 mmc-hs400-1_8v;
531 mmc-hs400-enhanced-strobe;
532 non-removable;
541 * hooked to ground. Because we specified "cd-gpios" below dw_mmc
547 pinctrl-names = "default";
548 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_cd_pin
551 bus-width = <4>;
552 cap-mmc-highspeed;
553 cap-sd-highspeed;
554 cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
555 disable-wp;
556 sd-uhs-sdr12;
557 sd-uhs-sdr25;
558 sd-uhs-sdr50;
559 sd-uhs-sdr104;
560 vmmc-supply = <&pp3000_sd_slot>;
561 vqmmc-supply = <&ppvar_sd_card_io>;
571 /delete-property/ pinctrl-0;
572 /delete-property/ pinctrl-names;
578 pinctrl-names = "default", "sleep";
579 pinctrl-1 = <&spi1_sleep>;
582 compatible = "jedec,spi-nor";
586 spi-max-frequency = <10000000>;
598 compatible = "google,cros-ec-spi";
600 interrupt-parent = <&gpio0>;
601 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
602 pinctrl-names = "default";
603 pinctrl-0 = <&ec_ap_int_l>;
604 spi-max-frequency = <3000000>;
606 i2c_tunnel: i2c-tunnel {
607 compatible = "google,cros-ec-i2c-tunnel";
608 google,remote-bus = <4>;
609 #address-cells = <1>;
610 #size-cells = <0>;
614 compatible = "google,extcon-usbc-cros-ec";
615 google,usb-port-id = <0>;
623 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
624 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
686 #include <arm/cros-ec-keyboard.dtsi>
687 #include <arm/cros-ec-sbs.dtsi>
696 pinctrl-names = "default";
697 pinctrl-0 = <
698 &ap_pwroff /* AP will auto-assert this when in S3 */
702 pcfg_output_low: pcfg-output-low {
703 output-low;
706 pcfg_output_high: pcfg-output-high {
707 output-high;
710 pcfg_pull_none_8ma: pcfg-pull-none-8ma {
711 bias-disable;
712 drive-strength = <8>;
715 backlight-enable {
716 bl_en: bl-en {
717 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
721 cros-ec {
722 ec_ap_int_l: ec-ap-int-l {
727 discrete-regulators {
728 sd_io_pwr_en: sd-io-pwr-en {
733 sd_pwr_1800_sel: sd-pwr-1800-sel {
738 sd_slot_pwr_en: sd-slot-pwr-en {
746 headset_int_l: headset-int-l {
747 rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
750 mic_int: mic-int {
751 rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
756 sdmode_en: sdmode-en {
757 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>;
762 pcie_clkreqn_cpm: pci-clkreqn-cpm {
766 * de-assert it along and make ClockPM(CPM) work.
777 sdmmc_bus4: sdmmc-bus4 {
779 <4 RK_PB0 1 &pcfg_pull_none_8ma>,
780 <4 RK_PB1 1 &pcfg_pull_none_8ma>,
781 <4 RK_PB2 1 &pcfg_pull_none_8ma>,
782 <4 RK_PB3 1 &pcfg_pull_none_8ma>;
785 sdmmc_clk: sdmmc-clk {
787 <4 RK_PB4 1 &pcfg_pull_none_8ma>;
790 sdmmc_cmd: sdmmc-cmd {
792 <4 RK_PB5 1 &pcfg_pull_none_8ma>;
798 * in the SD card slot (see the force_jtag bit in the TRM).
804 sdmmc_cd: sdmmc-cd {
806 <0 RK_PA7 1 &pcfg_pull_none>;
810 sdmmc_cd_pin: sdmmc-cd-pin {
816 spi1_sleep: spi1-sleep {
821 rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>,
822 <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>,
823 <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>,
824 <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
829 touch_int_l: touch-int-l {
833 touch_reset_l: touch-reset-l {
839 ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
843 trackpad_int_l: trackpad-int-l {
844 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
849 wlan_module_reset_l: wlan-module-reset-l {
850 rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
853 bt_host_wake_l: bt-host-wake-l {
859 write-protect {
860 ap_fw_wp: ap-fw-wp {
861 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;