Lines Matching +full:0 +full:xff900000
51 #size-cells = <0>;
79 cpu_l0: cpu@0 {
82 reg = <0x0 0x0>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
101 reg = <0x0 0x1>;
108 i-cache-size = <0x8000>;
111 d-cache-size = <0x8000>;
120 reg = <0x0 0x2>;
127 i-cache-size = <0x8000>;
130 d-cache-size = <0x8000>;
139 reg = <0x0 0x3>;
146 i-cache-size = <0x8000>;
149 d-cache-size = <0x8000>;
158 reg = <0x0 0x100>;
165 i-cache-size = <0xC000>;
168 d-cache-size = <0x8000>;
183 reg = <0x0 0x101>;
190 i-cache-size = <0xC000>;
193 d-cache-size = <0x8000>;
209 cache-size = <0x80000>;
218 cache-size = <0x100000>;
229 arm,psci-suspend-param = <0x0010000>;
238 arm,psci-suspend-param = <0x1010000>;
277 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
278 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
279 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
280 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
288 #clock-cells = <0>;
293 reg = <0x0 0xf8000000 0x0 0x2000000>,
294 <0x0 0xfd000000 0x0 0x1000000>;
301 bus-range = <0x0 0x1f>;
306 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
307 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
308 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
310 interrupt-map-mask = <0 0 0 7>;
311 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
312 <0 0 0 2 &pcie0_intc 1>,
313 <0 0 0 3 &pcie0_intc 2>,
314 <0 0 0 4 &pcie0_intc 3>;
316 msi-map = <0x0 &its 0x0 0x1000>;
317 phys = <&pcie_phy 0>, <&pcie_phy 1>,
319 phy-names = "pcie-phy-0", "pcie-phy-1",
321 ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
322 <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
333 #address-cells = <0>;
340 reg = <0x0 0xfd000000 0x0 0x1000000>,
341 <0x0 0xfa000000 0x0 0x2000000>;
355 phys = <&pcie_phy 0>, <&pcie_phy 1>,
357 phy-names = "pcie-phy-0", "pcie-phy-1",
361 pinctrl-0 = <&pcie_clkreqnb_cpm>;
367 reg = <0x0 0xfe300000 0x0 0x10000>;
368 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
382 snps,txpbl = <0x4>;
389 reg = <0x0 0xfe310000 0x0 0x4000>;
390 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
395 fifo-depth = <0x100>;
405 reg = <0x0 0xfe320000 0x0 0x4000>;
406 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
413 fifo-depth = <0x100>;
422 reg = <0x0 0xfe330000 0x0 0x10000>;
423 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
430 #clock-cells = <0>;
440 reg = <0x0 0xfe380000 0x0 0x20000>;
441 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
451 reg = <0x0 0xfe3a0000 0x0 0x20000>;
452 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
462 reg = <0x0 0xfe3c0000 0x0 0x20000>;
463 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
473 reg = <0x0 0xfe3e0000 0x0 0x20000>;
474 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
484 reg = <0 0xfe430000 0 0x1000>;
492 reg = <0 0xfe432000 0 0x1000>;
500 reg = <0 0xfe434000 0 0x1000>;
508 reg = <0 0xfe436000 0 0x1000>;
516 reg = <0 0xfe610000 0 0x1000>;
524 reg = <0 0xfe710000 0 0x1000>;
547 reg = <0x0 0xfe800000 0x0 0x100000>;
548 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
583 reg = <0x0 0xfe900000 0x0 0x100000>;
584 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
604 reg = <0x0 0xfec00000 0x0 0x100000>;
605 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
623 #size-cells = <0>;
625 dp_in_vopb: endpoint@0 {
626 reg = <0>;
646 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
647 <0x0 0xfef00000 0 0xc0000>, /* GICR */
648 <0x0 0xfff00000 0 0x10000>, /* GICC */
649 <0x0 0xfff10000 0 0x10000>, /* GICH */
650 <0x0 0xfff20000 0 0x10000>; /* GICV */
651 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
656 reg = <0x0 0xfee20000 0x0 0x20000>;
660 ppi_cluster0: interrupt-partition-0 {
672 reg = <0x0 0xff100000 0x0 0x100>;
673 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
684 reg = <0x0 0xff8b0000 0x0 0x4000>;
685 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>;
694 reg = <0x0 0xff8b8000 0x0 0x4000>;
695 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
704 reg = <0x0 0xff110000 0x0 0x1000>;
709 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
711 pinctrl-0 = <&i2c1_xfer>;
713 #size-cells = <0>;
719 reg = <0x0 0xff120000 0x0 0x1000>;
724 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
726 pinctrl-0 = <&i2c2_xfer>;
728 #size-cells = <0>;
734 reg = <0x0 0xff130000 0x0 0x1000>;
739 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
741 pinctrl-0 = <&i2c3_xfer>;
743 #size-cells = <0>;
749 reg = <0x0 0xff140000 0x0 0x1000>;
754 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
756 pinctrl-0 = <&i2c5_xfer>;
758 #size-cells = <0>;
764 reg = <0x0 0xff150000 0x0 0x1000>;
769 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
771 pinctrl-0 = <&i2c6_xfer>;
773 #size-cells = <0>;
779 reg = <0x0 0xff160000 0x0 0x1000>;
784 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
786 pinctrl-0 = <&i2c7_xfer>;
788 #size-cells = <0>;
794 reg = <0x0 0xff180000 0x0 0x100>;
797 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
801 pinctrl-0 = <&uart0_xfer>;
807 reg = <0x0 0xff190000 0x0 0x100>;
810 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
814 pinctrl-0 = <&uart1_xfer>;
820 reg = <0x0 0xff1a0000 0x0 0x100>;
823 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
827 pinctrl-0 = <&uart2c_xfer>;
833 reg = <0x0 0xff1b0000 0x0 0x100>;
836 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
840 pinctrl-0 = <&uart3_xfer>;
846 reg = <0x0 0xff1c0000 0x0 0x1000>;
849 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
853 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
855 #size-cells = <0>;
861 reg = <0x0 0xff1d0000 0x0 0x1000>;
864 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
868 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
870 #size-cells = <0>;
876 reg = <0x0 0xff1e0000 0x0 0x1000>;
879 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
883 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
885 #size-cells = <0>;
891 reg = <0x0 0xff1f0000 0x0 0x1000>;
894 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
898 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
900 #size-cells = <0>;
906 reg = <0x0 0xff200000 0x0 0x1000>;
909 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
913 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
916 #size-cells = <0>;
925 thermal-sensors = <&tsadc 0>;
996 reg = <0x0 0xff260000 0x0 0x100>;
997 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
1007 pinctrl-0 = <&otp_pin>;
1016 reg = <0x0 0xffa58000 0x0 0x20>;
1021 reg = <0x0 0xffa5c000 0x0 0x20>;
1026 reg = <0x0 0xffa60080 0x0 0x20>;
1031 reg = <0x0 0xffa60100 0x0 0x20>;
1036 reg = <0x0 0xffa60180 0x0 0x20>;
1041 reg = <0x0 0xffa70000 0x0 0x20>;
1046 reg = <0x0 0xffa70080 0x0 0x20>;
1051 reg = <0x0 0xffa74000 0x0 0x20>;
1056 reg = <0x0 0xffa76000 0x0 0x20>;
1061 reg = <0x0 0xffa90000 0x0 0x20>;
1066 reg = <0x0 0xffa98000 0x0 0x20>;
1071 reg = <0x0 0xffaa0000 0x0 0x20>;
1076 reg = <0x0 0xffaa0080 0x0 0x20>;
1081 reg = <0x0 0xffaa8000 0x0 0x20>;
1086 reg = <0x0 0xffaa8080 0x0 0x20>;
1091 reg = <0x0 0xffab0000 0x0 0x20>;
1096 reg = <0x0 0xffab0080 0x0 0x20>;
1101 reg = <0x0 0xffab8000 0x0 0x20>;
1106 reg = <0x0 0xffac0000 0x0 0x20>;
1111 reg = <0x0 0xffac0080 0x0 0x20>;
1116 reg = <0x0 0xffac8000 0x0 0x20>;
1121 reg = <0x0 0xffac8080 0x0 0x20>;
1126 reg = <0x0 0xffad0000 0x0 0x20>;
1131 reg = <0x0 0xffad8080 0x0 0x20>;
1136 reg = <0x0 0xffae0000 0x0 0x20>;
1141 reg = <0x0 0xff310000 0x0 0x1000>;
1154 #size-cells = <0>;
1162 #power-domain-cells = <0>;
1170 #power-domain-cells = <0>;
1177 #power-domain-cells = <0>;
1187 #power-domain-cells = <0>;
1195 #power-domain-cells = <0>;
1202 #power-domain-cells = <0>;
1208 #power-domain-cells = <0>;
1215 #power-domain-cells = <0>;
1222 #power-domain-cells = <0>;
1228 #power-domain-cells = <0>;
1234 #power-domain-cells = <0>;
1240 #power-domain-cells = <0>;
1247 #power-domain-cells = <0>;
1253 #size-cells = <0>;
1261 #power-domain-cells = <0>;
1269 #power-domain-cells = <0>;
1277 #power-domain-cells = <0>;
1283 #size-cells = <0>;
1291 #power-domain-cells = <0>;
1298 #power-domain-cells = <0>;
1307 reg = <0x0 0xff320000 0x0 0x1000>;
1317 reg = <0x0 0xff350000 0x0 0x1000>;
1320 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1322 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1324 #size-cells = <0>;
1330 reg = <0x0 0xff370000 0x0 0x100>;
1333 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1337 pinctrl-0 = <&uart4_xfer>;
1343 reg = <0x0 0xff3c0000 0x0 0x1000>;
1348 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1350 pinctrl-0 = <&i2c0_xfer>;
1352 #size-cells = <0>;
1358 reg = <0x0 0xff3d0000 0x0 0x1000>;
1363 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1365 pinctrl-0 = <&i2c4_xfer>;
1367 #size-cells = <0>;
1373 reg = <0x0 0xff3e0000 0x0 0x1000>;
1378 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1380 pinctrl-0 = <&i2c8_xfer>;
1382 #size-cells = <0>;
1388 reg = <0x0 0xff420000 0x0 0x10>;
1391 pinctrl-0 = <&pwm0_pin>;
1398 reg = <0x0 0xff420010 0x0 0x10>;
1401 pinctrl-0 = <&pwm1_pin>;
1408 reg = <0x0 0xff420020 0x0 0x10>;
1411 pinctrl-0 = <&pwm2_pin>;
1418 reg = <0x0 0xff420030 0x0 0x10>;
1421 pinctrl-0 = <&pwm3a_pin>;
1427 reg = <0x00 0xff630000 0x00 0x4000>;
1430 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1437 reg = <0x0 0xff650000 0x0 0x800>;
1438 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
1439 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1449 reg = <0x0 0xff650800 0x0 0x40>;
1450 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1453 #iommu-cells = <0>;
1459 reg = <0x0 0xff660000 0x0 0x480>;
1460 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1470 reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
1471 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1475 #iommu-cells = <0>;
1480 reg = <0x0 0xff670800 0x0 0x40>;
1481 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1484 #iommu-cells = <0>;
1490 reg = <0x0 0xff680000 0x0 0x10000>;
1491 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
1501 reg = <0x0 0xff690000 0x0 0x80>;
1509 reg = <0x07 0x10>;
1512 reg = <0x17 0x1>;
1515 reg = <0x18 0x1>;
1518 reg = <0x19 0x1>;
1521 reg = <0x1a 0x1>;
1524 reg = <0x1b 0x1>;
1527 reg = <0x1c 0x1>;
1533 reg = <0x0 0xff6d0000 0x0 0x4000>;
1534 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
1535 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
1544 reg = <0x0 0xff6e0000 0x0 0x4000>;
1545 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
1546 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
1555 reg = <0x0 0xff750000 0x0 0x1000>;
1567 reg = <0x0 0xff760000 0x0 0x1000>;
1601 reg = <0x0 0xff770000 0x0 0x10000>;
1617 #phy-cells = <0>;
1623 reg = <0xe450 0x10>;
1626 #clock-cells = <0>;
1631 #phy-cells = <0>;
1632 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1638 #phy-cells = <0>;
1639 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1640 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1641 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1650 reg = <0xe460 0x10>;
1653 #clock-cells = <0>;
1658 #phy-cells = <0>;
1659 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1665 #phy-cells = <0>;
1666 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1667 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1668 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1677 reg = <0xf780 0x24>;
1681 #phy-cells = <0>;
1698 reg = <0x0 0xff7c0000 0x0 0x40000>;
1713 #phy-cells = <0>;
1717 #phy-cells = <0>;
1723 reg = <0x0 0xff800000 0x0 0x40000>;
1738 #phy-cells = <0>;
1742 #phy-cells = <0>;
1748 reg = <0x0 0xff848000 0x0 0x100>;
1750 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1755 reg = <0x0 0xff850000 0x0 0x1000>;
1756 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1763 reg = <0x0 0xff870000 0x0 0x1000>;
1764 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1770 pinctrl-0 = <&spdif_bus>;
1772 #sound-dai-cells = <0>;
1778 reg = <0x0 0xff880000 0x0 0x1000>;
1780 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1781 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1786 pinctrl-0 = <&i2s0_8ch_bus>;
1789 #sound-dai-cells = <0>;
1795 reg = <0x0 0xff890000 0x0 0x1000>;
1796 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1802 pinctrl-0 = <&i2s1_2ch_bus>;
1804 #sound-dai-cells = <0>;
1810 reg = <0x0 0xff8a0000 0x0 0x1000>;
1811 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1817 #sound-dai-cells = <0>;
1823 reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
1824 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1837 #size-cells = <0>;
1839 vopl_out_mipi: endpoint@0 {
1840 reg = <0>;
1868 reg = <0x0 0xff8f3f00 0x0 0x100>;
1869 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1873 #iommu-cells = <0>;
1879 reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
1880 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1893 #size-cells = <0>;
1895 vopb_out_edp: endpoint@0 {
1896 reg = <0>;
1924 reg = <0x0 0xff903f00 0x0 0x100>;
1925 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1929 #iommu-cells = <0>;
1935 reg = <0x0 0xff910000 0x0 0x4000>;
1936 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1949 #size-cells = <0>;
1951 port@0 {
1952 reg = <0>;
1954 #size-cells = <0>;
1961 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1962 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1965 #iommu-cells = <0>;
1972 reg = <0x0 0xff920000 0x0 0x4000>;
1973 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1986 #size-cells = <0>;
1988 port@0 {
1989 reg = <0>;
1991 #size-cells = <0>;
1998 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
1999 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
2002 #iommu-cells = <0>;
2024 reg = <0x0 0xff940000 0x0 0x20000>;
2026 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
2035 #sound-dai-cells = <0>;
2040 #size-cells = <0>;
2042 hdmi_in: port@0 {
2043 reg = <0>;
2045 #size-cells = <0>;
2047 hdmi_in_vopb: endpoint@0 {
2048 reg = <0>;
2065 reg = <0x0 0xff960000 0x0 0x8000>;
2066 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
2075 #size-cells = <0>;
2080 #size-cells = <0>;
2082 mipi_in: port@0 {
2083 reg = <0>;
2085 #size-cells = <0>;
2087 mipi_in_vopb: endpoint@0 {
2088 reg = <0>;
2106 reg = <0x0 0xff968000 0x0 0x8000>;
2107 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
2116 #size-cells = <0>;
2117 #phy-cells = <0>;
2122 #size-cells = <0>;
2124 mipi1_in: port@0 {
2125 reg = <0>;
2127 #size-cells = <0>;
2129 mipi1_in_vopb: endpoint@0 {
2130 reg = <0>;
2148 reg = <0x0 0xff970000 0x0 0x8000>;
2149 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
2153 pinctrl-0 = <&edp_hpd>;
2162 #size-cells = <0>;
2164 edp_in: port@0 {
2165 reg = <0>;
2167 #size-cells = <0>;
2169 edp_in_vopb: endpoint@0 {
2170 reg = <0>;
2188 reg = <0x0 0xff9a0000 0x0 0x10000>;
2189 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
2190 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
2191 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
2210 reg = <0x0 0xff720000 0x0 0x100>;
2212 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
2215 #gpio-cells = <0x2>;
2218 #interrupt-cells = <0x2>;
2223 reg = <0x0 0xff730000 0x0 0x100>;
2225 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
2228 #gpio-cells = <0x2>;
2231 #interrupt-cells = <0x2>;
2236 reg = <0x0 0xff780000 0x0 0x100>;
2238 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
2241 #gpio-cells = <0x2>;
2244 #interrupt-cells = <0x2>;
2249 reg = <0x0 0xff788000 0x0 0x100>;
2251 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
2254 #gpio-cells = <0x2>;
2257 #interrupt-cells = <0x2>;
2262 reg = <0x0 0xff790000 0x0 0x100>;
2264 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
2267 #gpio-cells = <0x2>;
2270 #interrupt-cells = <0x2>;
2374 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
2638 <0 RK_PA3 1 &pcfg_pull_up>;
2643 <0 RK_PA4 1 &pcfg_pull_up>;
2673 <0 RK_PA7 1 &pcfg_pull_up>;
2678 <0 RK_PB0 1 &pcfg_pull_up>;
2688 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
2825 <0 RK_PA0 1 &pcfg_pull_none>;
2835 <0 RK_PB0 3 &pcfg_pull_none>;
2982 <0 RK_PA6 1 &pcfg_pull_none>;