Lines Matching +full:r9a09g057 +full:- +full:sys
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "renesas,r9a09g057";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
30 cluster0_opp: opp-table-0 {
31 compatible = "operating-points-v2";
33 opp-1700000000 {
34 opp-hz = /bits/ 64 <1700000000>;
35 opp-microvolt = <900000>;
36 clock-latency-ns = <300000>;
38 opp-850000000 {
39 opp-hz = /bits/ 64 <850000000>;
40 opp-microvolt = <800000>;
41 clock-latency-ns = <300000>;
43 opp-425000000 {
44 opp-hz = /bits/ 64 <425000000>;
45 opp-microvolt = <800000>;
46 clock-latency-ns = <300000>;
48 opp-212500000 {
49 opp-hz = /bits/ 64 <212500000>;
50 opp-microvolt = <800000>;
51 clock-latency-ns = <300000>;
52 opp-suspend;
57 #address-cells = <1>;
58 #size-cells = <0>;
61 compatible = "arm,cortex-a55";
64 next-level-cache = <&L3_CA55>;
65 enable-method = "psci";
67 operating-points-v2 = <&cluster0_opp>;
71 compatible = "arm,cortex-a55";
74 next-level-cache = <&L3_CA55>;
75 enable-method = "psci";
77 operating-points-v2 = <&cluster0_opp>;
81 compatible = "arm,cortex-a55";
84 next-level-cache = <&L3_CA55>;
85 enable-method = "psci";
87 operating-points-v2 = <&cluster0_opp>;
91 compatible = "arm,cortex-a55";
94 next-level-cache = <&L3_CA55>;
95 enable-method = "psci";
97 operating-points-v2 = <&cluster0_opp>;
100 L3_CA55: cache-controller-0 {
102 cache-unified;
103 cache-size = <0x100000>;
104 cache-level = <3>;
109 compatible = "arm,psci-1.0", "arm,psci-0.2";
113 qextal_clk: qextal-clk {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
117 clock-frequency = <0>;
120 rtxin_clk: rtxin-clk {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
124 clock-frequency = <0>;
128 compatible = "simple-bus";
129 interrupt-parent = <&gic>;
130 #address-cells = <2>;
131 #size-cells = <2>;
134 icu: interrupt-controller@10400000 {
135 compatible = "renesas,r9a09g057-icu";
137 #interrupt-cells = <2>;
138 #address-cells = <0>;
139 interrupt-controller;
198 interrupt-names = "nmi",
213 "int-ca55-0", "int-ca55-1",
214 "int-ca55-2", "int-ca55-3",
215 "icu-error-ca55",
216 "gpt-u0-gtciada", "gpt-u0-gtciadb",
217 "gpt-u1-gtciada", "gpt-u1-gtciadb";
219 power-domains = <&cpg>;
224 compatible = "renesas,r9a09g057-pinctrl";
227 gpio-controller;
228 #gpio-cells = <2>;
229 gpio-ranges = <&pinctrl 0 0 96>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
232 interrupt-parent = <&icu>;
233 power-domains = <&cpg>;
237 cpg: clock-controller@10420000 {
238 compatible = "renesas,r9a09g057-cpg";
241 clock-names = "audio_extal", "rtxin", "qextal";
242 #clock-cells = <2>;
243 #reset-cells = <1>;
244 #power-domain-cells = <0>;
247 sys: system-controller@10430000 { label
248 compatible = "renesas,r9a09g057-sys";
256 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
261 power-domains = <&cpg>;
266 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
271 power-domains = <&cpg>;
276 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
281 power-domains = <&cpg>;
286 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
291 power-domains = <&cpg>;
296 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
301 power-domains = <&cpg>;
306 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
311 power-domains = <&cpg>;
316 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
321 power-domains = <&cpg>;
326 compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
331 power-domains = <&cpg>;
336 compatible = "renesas,r9a09g057-wdt";
339 clock-names = "pclk", "oscclk";
341 power-domains = <&cpg>;
346 compatible = "renesas,r9a09g057-wdt";
349 clock-names = "pclk", "oscclk";
351 power-domains = <&cpg>;
356 compatible = "renesas,r9a09g057-wdt";
359 clock-names = "pclk", "oscclk";
361 power-domains = <&cpg>;
366 compatible = "renesas,r9a09g057-wdt";
369 clock-names = "pclk", "oscclk";
371 power-domains = <&cpg>;
376 compatible = "renesas,scif-r9a09g057";
387 interrupt-names = "eri", "rxi", "txi", "bri", "dri",
388 "tei", "tei-dri", "rxi-edge", "txi-edge";
390 clock-names = "fck";
391 power-domains = <&cpg>;
397 compatible = "renesas,riic-r9a09g057";
407 interrupt-names = "tei", "ri", "ti", "spi", "sti",
411 power-domains = <&cpg>;
412 #address-cells = <1>;
413 #size-cells = <0>;
418 compatible = "renesas,riic-r9a09g057";
428 interrupt-names = "tei", "ri", "ti", "spi", "sti",
432 power-domains = <&cpg>;
433 #address-cells = <1>;
434 #size-cells = <0>;
439 compatible = "renesas,riic-r9a09g057";
449 interrupt-names = "tei", "ri", "ti", "spi", "sti",
453 power-domains = <&cpg>;
454 #address-cells = <1>;
455 #size-cells = <0>;
460 compatible = "renesas,riic-r9a09g057";
470 interrupt-names = "tei", "ri", "ti", "spi", "sti",
474 power-domains = <&cpg>;
475 #address-cells = <1>;
476 #size-cells = <0>;
481 compatible = "renesas,riic-r9a09g057";
491 interrupt-names = "tei", "ri", "ti", "spi", "sti",
495 power-domains = <&cpg>;
496 #address-cells = <1>;
497 #size-cells = <0>;
502 compatible = "renesas,riic-r9a09g057";
512 interrupt-names = "tei", "ri", "ti", "spi", "sti",
516 power-domains = <&cpg>;
517 #address-cells = <1>;
518 #size-cells = <0>;
523 compatible = "renesas,riic-r9a09g057";
533 interrupt-names = "tei", "ri", "ti", "spi", "sti",
537 power-domains = <&cpg>;
538 #address-cells = <1>;
539 #size-cells = <0>;
544 compatible = "renesas,riic-r9a09g057";
554 interrupt-names = "tei", "ri", "ti", "spi", "sti",
558 power-domains = <&cpg>;
559 #address-cells = <1>;
560 #size-cells = <0>;
565 compatible = "renesas,riic-r9a09g057";
575 interrupt-names = "tei", "ri", "ti", "spi", "sti",
579 power-domains = <&cpg>;
580 #address-cells = <1>;
581 #size-cells = <0>;
585 gic: interrupt-controller@14900000 {
586 compatible = "arm,gic-v3";
589 #interrupt-cells = <3>;
590 #address-cells = <0>;
591 interrupt-controller;
596 compatible = "renesas,sdhi-r9a09g057";
602 clock-names = "core", "clkh", "cd", "aclk";
604 power-domains = <&cpg>;
609 compatible = "renesas,sdhi-r9a09g057";
615 clock-names = "core", "clkh", "cd", "aclk";
617 power-domains = <&cpg>;
622 compatible = "renesas,sdhi-r9a09g057";
628 clock-names = "core", "clkh", "cd", "aclk";
630 power-domains = <&cpg>;
636 compatible = "arm,armv8-timer";
637 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
642 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";