Lines Matching +full:ec7tie1 +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a08g045-cpg.h>
10 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 audio_clk1: audio1-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
24 audio_clk2: audio2-clk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
28 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
33 opp-shared;
35 opp-137500000 {
36 opp-hz = /bits/ 64 <137500000>;
37 opp-microvolt = <940000>;
38 clock-latency-ns = <300000>;
40 opp-275000000 {
41 opp-hz = /bits/ 64 <275000000>;
42 opp-microvolt = <940000>;
43 clock-latency-ns = <300000>;
45 opp-550000000 {
46 opp-hz = /bits/ 64 <550000000>;
47 opp-microvolt = <940000>;
48 clock-latency-ns = <300000>;
50 opp-1100000000 {
51 opp-hz = /bits/ 64 <1100000000>;
52 opp-microvolt = <940000>;
53 clock-latency-ns = <300000>;
54 opp-suspend;
59 #address-cells = <1>;
60 #size-cells = <0>;
63 compatible = "arm,cortex-a55";
66 #cooling-cells = <2>;
67 next-level-cache = <&L3_CA55>;
68 enable-method = "psci";
70 operating-points-v2 = <&cluster0_opp>;
73 L3_CA55: cache-controller-0 {
75 cache-level = <3>;
76 cache-unified;
77 cache-size = <0x40000>;
81 extal_clk: extal-clk {
82 compatible = "fixed-clock";
83 #clock-cells = <0>;
85 clock-frequency = <0>;
89 compatible = "arm,psci-1.0", "arm,psci-0.2";
94 compatible = "simple-bus";
95 interrupt-parent = <&gic>;
96 #address-cells = <2>;
97 #size-cells = <2>;
101 compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";
109 interrupt-names = "eri", "rxi", "txi",
112 clock-names = "fck";
113 power-domains = <&cpg>;
119 compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";
127 interrupt-names = "eri", "rxi", "txi",
130 clock-names = "fck";
131 power-domains = <&cpg>;
137 compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";
145 interrupt-names = "eri", "rxi", "txi",
148 clock-names = "fck";
149 power-domains = <&cpg>;
155 compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";
163 interrupt-names = "eri", "rxi", "txi",
166 clock-names = "fck";
167 power-domains = <&cpg>;
173 compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";
181 interrupt-names = "eri", "rxi", "txi",
184 clock-names = "fck";
185 power-domains = <&cpg>;
191 compatible = "renesas,scif-r9a08g045", "renesas,scif-r9a07g044";
199 interrupt-names = "eri", "rxi", "txi",
202 clock-names = "fck";
203 power-domains = <&cpg>;
209 compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3";
214 interrupt-names = "alarm", "period", "carry";
216 clock-names = "bus", "counter";
217 power-domains = <&cpg>;
223 compatible = "renesas,r9a08g045-adc";
228 clock-names = "adclk", "pclk";
231 reset-names = "presetn", "adrst-n";
232 power-domains = <&cpg>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 #io-channel-cells = <1>;
242 channel@1 {
243 reg = <1>;
275 vbattb: clock-controller@1005c000 {
276 compatible = "renesas,r9a08g045-vbattb";
280 clock-names = "bclk", "rtx";
281 #clock-cells = <1>;
282 power-domains = <&cpg>;
288 compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
298 interrupt-names = "tei", "ri", "ti", "spi", "sti",
301 clock-frequency = <100000>;
303 power-domains = <&cpg>;
304 #address-cells = <1>;
305 #size-cells = <0>;
310 compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
320 interrupt-names = "tei", "ri", "ti", "spi", "sti",
323 clock-frequency = <100000>;
325 power-domains = <&cpg>;
326 #address-cells = <1>;
327 #size-cells = <0>;
332 compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
342 interrupt-names = "tei", "ri", "ti", "spi", "sti",
345 clock-frequency = <100000>;
347 power-domains = <&cpg>;
348 #address-cells = <1>;
349 #size-cells = <0>;
354 compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
364 interrupt-names = "tei", "ri", "ti", "spi", "sti",
367 clock-frequency = <100000>;
369 power-domains = <&cpg>;
370 #address-cells = <1>;
371 #size-cells = <0>;
376 compatible = "renesas,r9a08g045-ssi",
377 "renesas,rz-ssi";
382 interrupt-names = "int_req", "dma_rx", "dma_tx";
386 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
389 dma-names = "tx", "rx";
390 power-domains = <&cpg>;
391 #sound-dai-cells = <0>;
396 compatible = "renesas,r9a08g045-ssi",
397 "renesas,rz-ssi";
402 interrupt-names = "int_req", "dma_rx", "dma_tx";
406 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
409 dma-names = "tx", "rx";
410 power-domains = <&cpg>;
411 #sound-dai-cells = <0>;
416 compatible = "renesas,r9a08g045-ssi",
417 "renesas,rz-ssi";
422 interrupt-names = "int_req", "dma_rx", "dma_tx";
426 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
429 dma-names = "tx", "rx";
430 power-domains = <&cpg>;
431 #sound-dai-cells = <0>;
436 compatible = "renesas,r9a08g045-ssi",
437 "renesas,rz-ssi";
442 interrupt-names = "int_req", "dma_rx", "dma_tx";
446 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
449 dma-names = "tx", "rx";
450 power-domains = <&cpg>;
451 #sound-dai-cells = <0>;
455 cpg: clock-controller@11010000 {
456 compatible = "renesas,r9a08g045-cpg";
459 clock-names = "extal";
460 #clock-cells = <2>;
461 #reset-cells = <1>;
462 #power-domain-cells = <0>;
465 sysc: system-controller@11020000 {
466 compatible = "renesas,r9a08g045-sysc";
472 interrupt-names = "lpm_int", "ca55stbydone_int",
477 compatible = "renesas,r9a08g045-pinctrl";
479 gpio-controller;
480 #gpio-cells = <2>;
481 interrupt-controller;
482 #interrupt-cells = <2>;
483 interrupt-parent = <&irqc>;
484 gpio-ranges = <&pinctrl 0 0 152>;
486 power-domains = <&cpg>;
492 irqc: interrupt-controller@11050000 {
493 compatible = "renesas,r9a08g045-irqc", "renesas,rzg2l-irqc";
494 #interrupt-cells = <2>;
495 #address-cells = <0>;
496 interrupt-controller;
499 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
543 interrupt-names = "nmi",
554 "bus-err", "ec7tie1-0", "ec7tie2-0",
555 "ec7tiovf-0";
558 clock-names = "clk", "pclk";
559 power-domains = <&cpg>;
563 dmac: dma-controller@11820000 {
564 compatible = "renesas,r9a08g045-dmac",
565 "renesas,rz-dmac";
585 interrupt-names = "error",
592 clock-names = "main", "register";
593 power-domains = <&cpg>;
596 reset-names = "arst", "rst_async";
597 #dma-cells = <1>;
598 dma-channels = <16>;
602 compatible = "renesas,sdhi-r9a08g045", "renesas,rzg2l-sdhi";
610 clock-names = "core", "clkh", "cd", "aclk";
612 power-domains = <&cpg>;
617 compatible = "renesas,sdhi-r9a08g045", "renesas,rzg2l-sdhi";
625 clock-names = "core", "clkh", "cd", "aclk";
627 power-domains = <&cpg>;
632 compatible = "renesas,sdhi-r9a08g045", "renesas,rzg2l-sdhi";
640 clock-names = "core", "clkh", "cd", "aclk";
642 power-domains = <&cpg>;
647 compatible = "renesas,r9a08g045-gbeth", "renesas,rzg2l-gbeth";
652 interrupt-names = "mux", "fil", "arp_ns";
653 phy-mode = "rgmii";
657 clock-names = "axi", "chi", "refclk";
659 power-domains = <&cpg>;
660 #address-cells = <1>;
661 #size-cells = <0>;
666 compatible = "renesas,r9a08g045-gbeth", "renesas,rzg2l-gbeth";
671 interrupt-names = "mux", "fil", "arp_ns";
672 phy-mode = "rgmii";
676 clock-names = "axi", "chi", "refclk";
678 power-domains = <&cpg>;
679 #address-cells = <1>;
680 #size-cells = <0>;
684 gic: interrupt-controller@12400000 {
685 compatible = "arm,gic-v3";
686 #interrupt-cells = <3>;
687 #address-cells = <0>;
688 interrupt-controller;
695 compatible = "renesas,r9a08g045-wdt", "renesas,rzg2l-wdt";
699 clock-names = "pclk", "oscclk";
702 interrupt-names = "wdt", "perrout";
704 power-domains = <&cpg>;
710 compatible = "arm,armv8-timer";
711 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
716 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
717 "hyp-virt";
720 vbattb_xtal: vbattb-xtal {
721 compatible = "fixed-clock";
722 #clock-cells = <0>;
724 clock-frequency = <0>;