Lines Matching +full:canfd +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
27 clock-frequency = <0>;
30 /* External CAN clock - to be overridden by boards that provide it */
31 can_clk: can-clk {
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <0>;
38 extal_clk: extal-clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-150000000 {
50 opp-hz = /bits/ 64 <150000000>;
51 opp-microvolt = <1100000>;
52 clock-latency-ns = <300000>;
54 opp-300000000 {
55 opp-hz = /bits/ 64 <300000000>;
56 opp-microvolt = <1100000>;
57 clock-latency-ns = <300000>;
59 opp-600000000 {
60 opp-hz = /bits/ 64 <600000000>;
61 opp-microvolt = <1100000>;
62 clock-latency-ns = <300000>;
64 opp-1200000000 {
65 opp-hz = /bits/ 64 <1200000000>;
66 opp-microvolt = <1100000>;
67 clock-latency-ns = <300000>;
68 opp-suspend;
73 #address-cells = <1>;
74 #size-cells = <0>;
76 cpu-map {
88 compatible = "arm,cortex-a55";
91 #cooling-cells = <2>;
92 next-level-cache = <&L3_CA55>;
93 enable-method = "psci";
95 operating-points-v2 = <&cluster0_opp>;
99 compatible = "arm,cortex-a55";
102 next-level-cache = <&L3_CA55>;
103 enable-method = "psci";
105 operating-points-v2 = <&cluster0_opp>;
108 L3_CA55: cache-controller-0 {
110 cache-unified;
111 cache-size = <0x40000>;
112 cache-level = <3>;
116 gpu_opp_table: opp-table-1 {
117 compatible = "operating-points-v2";
119 opp-500000000 {
120 opp-hz = /bits/ 64 <500000000>;
121 opp-microvolt = <1100000>;
124 opp-400000000 {
125 opp-hz = /bits/ 64 <400000000>;
126 opp-microvolt = <1100000>;
129 opp-250000000 {
130 opp-hz = /bits/ 64 <250000000>;
131 opp-microvolt = <1100000>;
134 opp-200000000 {
135 opp-hz = /bits/ 64 <200000000>;
136 opp-microvolt = <1100000>;
139 opp-125000000 {
140 opp-hz = /bits/ 64 <125000000>;
141 opp-microvolt = <1100000>;
144 opp-100000000 {
145 opp-hz = /bits/ 64 <100000000>;
146 opp-microvolt = <1100000>;
149 opp-62500000 {
150 opp-hz = /bits/ 64 <62500000>;
151 opp-microvolt = <1100000>;
154 opp-50000000 {
155 opp-hz = /bits/ 64 <50000000>;
156 opp-microvolt = <1100000>;
161 compatible = "arm,cortex-a55-pmu";
162 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
166 compatible = "arm,psci-1.0", "arm,psci-0.2";
171 compatible = "simple-bus";
172 interrupt-parent = <&gic>;
173 #address-cells = <2>;
174 #size-cells = <2>;
178 compatible = "renesas,r9a07g054-mtu3",
179 "renesas,rz-mtu3";
225 interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
241 power-domains = <&cpg>;
243 #pwm-cells = <2>;
248 compatible = "renesas,r9a07g054-ssi",
249 "renesas,rz-ssi";
254 interrupt-names = "int_req", "dma_rx", "dma_tx";
258 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
261 dma-names = "tx", "rx";
262 power-domains = <&cpg>;
263 #sound-dai-cells = <0>;
268 compatible = "renesas,r9a07g054-ssi",
269 "renesas,rz-ssi";
274 interrupt-names = "int_req", "dma_rx", "dma_tx";
278 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
281 dma-names = "tx", "rx";
282 power-domains = <&cpg>;
283 #sound-dai-cells = <0>;
288 compatible = "renesas,r9a07g054-ssi",
289 "renesas,rz-ssi";
293 interrupt-names = "int_req", "dma_rt";
297 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
300 dma-names = "rt";
301 power-domains = <&cpg>;
302 #sound-dai-cells = <0>;
307 compatible = "renesas,r9a07g054-ssi",
308 "renesas,rz-ssi";
313 interrupt-names = "int_req", "dma_rx", "dma_tx";
317 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
320 dma-names = "tx", "rx";
321 power-domains = <&cpg>;
322 #sound-dai-cells = <0>;
327 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
332 interrupt-names = "error", "rx", "tx";
336 dma-names = "tx", "rx";
337 power-domains = <&cpg>;
338 num-cs = <1>;
339 #address-cells = <1>;
340 #size-cells = <0>;
345 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
350 interrupt-names = "error", "rx", "tx";
354 dma-names = "tx", "rx";
355 power-domains = <&cpg>;
356 num-cs = <1>;
357 #address-cells = <1>;
358 #size-cells = <0>;
363 compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
368 interrupt-names = "error", "rx", "tx";
372 dma-names = "tx", "rx";
373 power-domains = <&cpg>;
374 num-cs = <1>;
375 #address-cells = <1>;
376 #size-cells = <0>;
381 compatible = "renesas,scif-r9a07g054",
382 "renesas,scif-r9a07g044";
390 interrupt-names = "eri", "rxi", "txi",
393 clock-names = "fck";
394 power-domains = <&cpg>;
400 compatible = "renesas,scif-r9a07g054",
401 "renesas,scif-r9a07g044";
409 interrupt-names = "eri", "rxi", "txi",
412 clock-names = "fck";
413 power-domains = <&cpg>;
419 compatible = "renesas,scif-r9a07g054",
420 "renesas,scif-r9a07g044";
428 interrupt-names = "eri", "rxi", "txi",
431 clock-names = "fck";
432 power-domains = <&cpg>;
438 compatible = "renesas,scif-r9a07g054",
439 "renesas,scif-r9a07g044";
447 interrupt-names = "eri", "rxi", "txi",
450 clock-names = "fck";
451 power-domains = <&cpg>;
457 compatible = "renesas,scif-r9a07g054",
458 "renesas,scif-r9a07g044";
466 interrupt-names = "eri", "rxi", "txi",
469 clock-names = "fck";
470 power-domains = <&cpg>;
476 compatible = "renesas,r9a07g054-sci", "renesas,sci";
482 interrupt-names = "eri", "rxi", "txi", "tei";
484 clock-names = "fck";
485 power-domains = <&cpg>;
491 compatible = "renesas,r9a07g054-sci", "renesas,sci";
497 interrupt-names = "eri", "rxi", "txi", "tei";
499 clock-names = "fck";
500 power-domains = <&cpg>;
505 canfd: can@10050000 { label
506 compatible = "renesas,r9a07g054-canfd", "renesas,rzg2l-canfd";
516 interrupt-names = "g_err", "g_recc",
522 clock-names = "fck", "canfd", "can_clk";
523 assigned-clocks = <&cpg CPG_CORE R9A07G054_CLK_P0_DIV2>;
524 assigned-clock-rates = <50000000>;
527 reset-names = "rstp_n", "rstc_n";
528 power-domains = <&cpg>;
540 #address-cells = <1>;
541 #size-cells = <0>;
542 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
552 interrupt-names = "tei", "ri", "ti", "spi", "sti",
555 clock-frequency = <100000>;
557 power-domains = <&cpg>;
562 #address-cells = <1>;
563 #size-cells = <0>;
564 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
574 interrupt-names = "tei", "ri", "ti", "spi", "sti",
577 clock-frequency = <100000>;
579 power-domains = <&cpg>;
584 #address-cells = <1>;
585 #size-cells = <0>;
586 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
596 interrupt-names = "tei", "ri", "ti", "spi", "sti",
599 clock-frequency = <100000>;
601 power-domains = <&cpg>;
606 #address-cells = <1>;
607 #size-cells = <0>;
608 compatible = "renesas,riic-r9a07g054", "renesas,riic-rz";
618 interrupt-names = "tei", "ri", "ti", "spi", "sti",
621 clock-frequency = <100000>;
623 power-domains = <&cpg>;
628 compatible = "renesas,r9a07g054-adc", "renesas,rzg2l-adc";
633 clock-names = "adclk", "pclk";
636 reset-names = "presetn", "adrst-n";
637 power-domains = <&cpg>;
640 #address-cells = <1>;
641 #size-cells = <0>;
646 channel@1 {
647 reg = <1>;
670 compatible = "renesas,r9a07g054-tsu",
671 "renesas,rzg2l-tsu";
675 power-domains = <&cpg>;
676 #thermal-sensor-cells = <1>;
680 compatible = "renesas,r9a07g054-rpc-if",
681 "renesas,rzg2l-rpc-if";
685 reg-names = "regs", "dirmap", "wbuf";
690 power-domains = <&cpg>;
691 #address-cells = <1>;
692 #size-cells = <0>;
697 compatible = "renesas,r9a07g054-cru", "renesas,rzg2l-cru";
702 clock-names = "video", "apb", "axi";
706 interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
709 reset-names = "presetn", "aresetn";
710 power-domains = <&cpg>;
714 #address-cells = <1>;
715 #size-cells = <0>;
718 #address-cells = <1>;
719 #size-cells = <0>;
727 port@1 {
728 #address-cells = <1>;
729 #size-cells = <0>;
731 reg = <1>;
734 remote-endpoint = <&csi2cru>;
741 compatible = "renesas,r9a07g054-csi2", "renesas,rzg2l-csi2";
747 clock-names = "system", "video", "apb";
750 reset-names = "presetn", "cmn-rstb";
751 power-domains = <&cpg>;
755 #address-cells = <1>;
756 #size-cells = <0>;
762 port@1 {
763 #address-cells = <1>;
764 #size-cells = <0>;
765 reg = <1>;
769 remote-endpoint = <&crucsi2>;
776 compatible = "renesas,r9a07g054-mipi-dsi",
777 "renesas,rzg2l-mipi-dsi";
786 interrupt-names = "seq0", "seq1", "vin1", "rcv",
794 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
798 reset-names = "rst", "arst", "prst";
799 power-domains = <&cpg>;
803 #address-cells = <1>;
804 #size-cells = <0>;
809 remote-endpoint = <&du_out_dsi>;
813 port@1 {
814 reg = <1>;
820 compatible = "renesas,r9a07g054-vsp2",
821 "renesas,r9a07g044-vsp2";
827 clock-names = "aclk", "pclk", "vclk";
828 power-domains = <&cpg>;
834 compatible = "renesas,r9a07g054-fcpvd",
840 clock-names = "aclk", "pclk", "vclk";
841 power-domains = <&cpg>;
846 compatible = "renesas,r9a07g054-du",
847 "renesas,r9a07g044-du";
853 clock-names = "aclk", "pclk", "vclk";
854 power-domains = <&cpg>;
860 #address-cells = <1>;
861 #size-cells = <0>;
866 remote-endpoint = <&dsi0_in>;
870 port@1 {
871 reg = <1>;
876 cpg: clock-controller@11010000 {
877 compatible = "renesas,r9a07g054-cpg";
880 clock-names = "extal";
881 #clock-cells = <2>;
882 #reset-cells = <1>;
883 #power-domain-cells = <0>;
886 sysc: system-controller@11020000 {
887 compatible = "renesas,r9a07g054-sysc";
893 interrupt-names = "lpm_int", "ca55stbydone_int",
899 compatible = "renesas,r9a07g054-pinctrl",
900 "renesas,r9a07g044-pinctrl";
902 gpio-controller;
903 #gpio-cells = <2>;
904 #interrupt-cells = <2>;
905 interrupt-parent = <&irqc>;
906 interrupt-controller;
907 gpio-ranges = <&pinctrl 0 0 392>;
909 power-domains = <&cpg>;
915 irqc: interrupt-controller@110a0000 {
916 compatible = "renesas,r9a07g054-irqc",
917 "renesas,rzg2l-irqc";
918 #interrupt-cells = <2>;
919 #address-cells = <0>;
920 interrupt-controller;
923 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
970 interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3",
980 "bus-err", "ec7tie1-0", "ec7tie2-0",
981 "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1",
982 "ec7tiovf-1";
985 clock-names = "clk", "pclk";
986 power-domains = <&cpg>;
990 dmac: dma-controller@11820000 {
991 compatible = "renesas,r9a07g054-dmac",
992 "renesas,rz-dmac";
1012 interrupt-names = "error",
1019 clock-names = "main", "register";
1020 power-domains = <&cpg>;
1023 reset-names = "arst", "rst_async";
1024 #dma-cells = <1>;
1025 dma-channels = <16>;
1029 compatible = "renesas,r9a07g054-mali",
1030 "arm,mali-bifrost";
1036 interrupt-names = "job", "mmu", "gpu", "event";
1040 clock-names = "gpu", "bus", "bus_ace";
1041 power-domains = <&cpg>;
1045 reset-names = "rst", "axi_rst", "ace_rst";
1046 operating-points-v2 = <&gpu_opp_table>;
1049 gic: interrupt-controller@11900000 {
1050 compatible = "arm,gic-v3";
1051 #interrupt-cells = <3>;
1052 #address-cells = <0>;
1053 interrupt-controller;
1060 compatible = "renesas,sdhi-r9a07g054",
1061 "renesas,rzg2l-sdhi";
1069 clock-names = "core", "clkh", "cd", "aclk";
1071 power-domains = <&cpg>;
1076 compatible = "renesas,sdhi-r9a07g054",
1077 "renesas,rzg2l-sdhi";
1085 clock-names = "core", "clkh", "cd", "aclk";
1087 power-domains = <&cpg>;
1092 compatible = "renesas,r9a07g054-gbeth",
1093 "renesas,rzg2l-gbeth";
1098 interrupt-names = "mux", "fil", "arp_ns";
1099 phy-mode = "rgmii";
1103 clock-names = "axi", "chi", "refclk";
1105 power-domains = <&cpg>;
1106 #address-cells = <1>;
1107 #size-cells = <0>;
1112 compatible = "renesas,r9a07g054-gbeth",
1113 "renesas,rzg2l-gbeth";
1118 interrupt-names = "mux", "fil", "arp_ns";
1119 phy-mode = "rgmii";
1123 clock-names = "axi", "chi", "refclk";
1125 power-domains = <&cpg>;
1126 #address-cells = <1>;
1127 #size-cells = <0>;
1131 phyrst: usbphy-ctrl@11c40000 {
1132 compatible = "renesas,r9a07g054-usbphy-ctrl",
1133 "renesas,rzg2l-usbphy-ctrl";
1137 power-domains = <&cpg>;
1138 #reset-cells = <1>;
1141 usb0_vbus_otg: regulator-vbus {
1142 regulator-name = "vbus";
1147 compatible = "generic-ohci";
1154 phys = <&usb2_phy0 1>;
1155 phy-names = "usb";
1156 power-domains = <&cpg>;
1161 compatible = "generic-ohci";
1166 resets = <&phyrst 1>,
1168 phys = <&usb2_phy1 1>;
1169 phy-names = "usb";
1170 power-domains = <&cpg>;
1175 compatible = "generic-ehci";
1183 phy-names = "usb";
1185 power-domains = <&cpg>;
1190 compatible = "generic-ehci";
1195 resets = <&phyrst 1>,
1198 phy-names = "usb";
1200 power-domains = <&cpg>;
1204 usb2_phy0: usb-phy@11c50200 {
1205 compatible = "renesas,usb2-phy-r9a07g054",
1206 "renesas,rzg2l-usb2-phy";
1212 #phy-cells = <1>;
1213 power-domains = <&cpg>;
1217 usb2_phy1: usb-phy@11c70200 {
1218 compatible = "renesas,usb2-phy-r9a07g054",
1219 "renesas,rzg2l-usb2-phy";
1224 resets = <&phyrst 1>;
1225 #phy-cells = <1>;
1226 power-domains = <&cpg>;
1231 compatible = "renesas,usbhs-r9a07g054",
1232 "renesas,rzg2l-usbhs";
1244 phy-names = "usb";
1245 power-domains = <&cpg>;
1250 compatible = "renesas,r9a07g054-wdt",
1251 "renesas,rzg2l-wdt";
1255 clock-names = "pclk", "oscclk";
1258 interrupt-names = "wdt", "perrout";
1260 power-domains = <&cpg>;
1265 compatible = "renesas,r9a07g054-wdt",
1266 "renesas,rzg2l-wdt";
1270 clock-names = "pclk", "oscclk";
1273 interrupt-names = "wdt", "perrout";
1275 power-domains = <&cpg>;
1280 compatible = "renesas,r9a07g054-ostm",
1286 power-domains = <&cpg>;
1291 compatible = "renesas,r9a07g054-ostm",
1297 power-domains = <&cpg>;
1302 compatible = "renesas,r9a07g054-ostm",
1308 power-domains = <&cpg>;
1313 thermal-zones {
1314 cpu-thermal {
1315 polling-delay-passive = <250>;
1316 polling-delay = <1000>;
1317 thermal-sensors = <&tsu 0>;
1318 sustainable-power = <717>;
1320 cooling-maps {
1323 cooling-device = <&cpu0 0 2>;
1329 sensor_crit: sensor-crit {
1335 target: trip-point {
1345 compatible = "arm,armv8-timer";
1346 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
1351 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
1352 "hyp-virt";