Lines Matching +full:0 +full:x2656

17 		#clock-cells = <0>;
19 		clock-frequency = <0>;
24 		#clock-cells = <0>;
26 		clock-frequency = <0>;
32 		#clock-cells = <0>;
33 		clock-frequency = <0>;
39 		#clock-cells = <0>;
41 		clock-frequency = <0>;
44 	cluster0_opp: opp-table-0 {
80 			reg = <0 0x10001200 0 0xb00>;
150 			reg = <0 0x10049c00 0 0x400>;
160 			dmas = <&dmac 0x2655>, <&dmac 0x2656>;
163 			#sound-dai-cells = <0>;
170 			reg = <0 0x1004a000 0 0x400>;
180 			dmas = <&dmac 0x2659>, <&dmac 0x265a>;
183 			#sound-dai-cells = <0>;
190 			reg = <0 0x1004a400 0 0x400>;
199 			dmas = <&dmac 0x265f>;
202 			#sound-dai-cells = <0>;
209 			reg = <0 0x1004a800 0 0x400>;
219 			dmas = <&dmac 0x2661>, <&dmac 0x2662>;
222 			#sound-dai-cells = <0>;
228 			reg = <0 0x1004ac00 0 0x400>;
235 			dmas = <&dmac 0x2e95>, <&dmac 0x2e96>;
240 			#size-cells = <0>;
246 			reg = <0 0x1004b000 0 0x400>;
253 			dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
258 			#size-cells = <0>;
264 			reg = <0 0x1004b400 0 0x400>;
271 			dmas = <&dmac 0x2e9d>, <&dmac 0x2e9e>;
276 			#size-cells = <0>;
283 			reg = <0 0x1004b800 0 0x400>;
302 			reg = <0 0x1004bc00 0 0x400>;
321 			reg = <0 0x1004c000 0 0x400>;
340 			reg = <0 0x1004c400 0 0x400>;
359 			reg = <0 0x1004c800 0 0x400>;
377 			reg = <0 0x1004d000 0 0x400>;
392 			reg = <0 0x1004d400 0 0x400>;
407 			reg = <0 0x10050000 0 0x8000>;
441 			#size-cells = <0>;
443 			reg = <0 0x10058000 0 0x400>;
463 			#size-cells = <0>;
465 			reg = <0 0x10058400 0 0x400>;
485 			#size-cells = <0>;
487 			reg = <0 0x10058800 0 0x400>;
507 			#size-cells = <0>;
509 			reg = <0 0x10058c00 0 0x400>;
529 			reg = <0 0x10059000 0 0x400>;
541 			#size-cells = <0>;
543 			channel@0 {
544 				reg = <0>;
554 			reg = <0 0x10059400 0 0x400>;
564 			reg = <0 0x10060000 0 0x10000>,
565 			      <0 0x20000000 0 0x10000000>,
566 			      <0 0x10070000 0 0x10000>;
573 			#size-cells = <0>;
579 			reg = <0 0x11010000 0 0x10000>;
584 			#power-domain-cells = <0>;
589 			reg = <0 0x11020000 0 0x10000>;
595 			reg = <0 0x11030000 0 0x10000>;
598 			gpio-ranges = <&pinctrl 0 0 152>;
612 			reg = <0 0x11820000 0 0x10000>,
613 			      <0 0x11830000 0 0x10000>;
650 			reg = <0x0 0x11c00000 0 0x10000>;
666 			reg = <0x0 0x11c10000 0 0x10000>;
682 			reg = <0 0x11c20000 0 0x10000>;
695 			#size-cells = <0>;
702 			reg = <0 0x11c30000 0 0x10000>;
715 			#size-cells = <0>;
722 			reg = <0 0x11c40000 0 0x10000>;
736 			reg = <0 0x11c50000 0 0x100>;
740 			resets = <&phyrst 0>,
750 			reg = <0 0x11c70000 0 0x100>;
764 			reg = <0 0x11c50100 0 0x100>;
768 			resets = <&phyrst 0>,
779 			reg = <0 0x11c70100 0 0x100>;
795 			reg = <0 0x11c50200 0 0x700>;
799 			resets = <&phyrst 0>;
808 			reg = <0 0x11c70200 0 0x700>;
821 			reg = <0 0x11c60000 0 0x10000>;
828 			resets = <&phyrst 0>,
840 			reg = <0 0x12800800 0 0x400>;
855 			reg = <0x0 0x12801000 0x0 0x400>;
866 			reg = <0x0 0x12801400 0x0 0x400>;
877 			reg = <0x0 0x12801800 0x0 0x400>;
890 			thermal-sensors = <&tsu 0>;
896 					cooling-device = <&cpu0 0 2>;