Lines Matching +full:power +full:- +full:domains
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC
8 #include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/renesas,r8a779h0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 /* External Audio clock - to be overridden by boards that provide it */
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <0>;
24 /* External CAN clock - to be overridden by boards that provide it */
25 can_clk: can-clk {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
34 opp-500000000 {
35 opp-hz = /bits/ 64 <500000000>;
36 opp-microvolt = <825000>;
37 clock-latency-ns = <500000>;
39 opp-1000000000 {
40 opp-hz = /bits/ 64 <1000000000>;
41 opp-microvolt = <825000>;
42 clock-latency-ns = <500000>;
47 #address-cells = <1>;
48 #size-cells = <0>;
50 cpu-map {
68 compatible = "arm,cortex-a76";
71 power-domains = <&sysc R8A779H0_PD_A1E0D0C0>;
72 next-level-cache = <&L3_CA76>;
73 enable-method = "psci";
74 cpu-idle-states = <&CPU_SLEEP_0>;
76 operating-points-v2 = <&cluster0_opp>;
80 compatible = "arm,cortex-a76";
83 power-domains = <&sysc R8A779H0_PD_A1E0D0C1>;
84 next-level-cache = <&L3_CA76>;
85 enable-method = "psci";
86 cpu-idle-states = <&CPU_SLEEP_0>;
88 operating-points-v2 = <&cluster0_opp>;
92 compatible = "arm,cortex-a76";
95 power-domains = <&sysc R8A779H0_PD_A1E0D0C2>;
96 next-level-cache = <&L3_CA76>;
97 enable-method = "psci";
98 cpu-idle-states = <&CPU_SLEEP_0>;
100 operating-points-v2 = <&cluster0_opp>;
104 compatible = "arm,cortex-a76";
107 power-domains = <&sysc R8A779H0_PD_A1E0D0C3>;
108 next-level-cache = <&L3_CA76>;
109 enable-method = "psci";
110 cpu-idle-states = <&CPU_SLEEP_0>;
112 operating-points-v2 = <&cluster0_opp>;
115 idle-states {
116 entry-method = "psci";
118 CPU_SLEEP_0: cpu-sleep-0 {
119 compatible = "arm,idle-state";
120 arm,psci-suspend-param = <0x0010000>;
121 local-timer-stop;
122 entry-latency-us = <400>;
123 exit-latency-us = <500>;
124 min-residency-us = <4000>;
128 L3_CA76: cache-controller {
130 power-domains = <&sysc R8A779H0_PD_A2E0D0>;
131 cache-unified;
132 cache-level = <3>;
136 extal_clk: extal-clk {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
140 clock-frequency = <0>;
143 extalr_clk: extalr-clk {
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
147 clock-frequency = <0>;
150 pcie0_clkref: pcie0-clkref {
151 compatible = "fixed-clock";
152 #clock-cells = <0>;
154 clock-frequency = <0>;
157 pmu-a76 {
158 compatible = "arm,cortex-a76-pmu";
159 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
163 compatible = "arm,psci-1.0", "arm,psci-0.2";
167 /* External SCIF clocks - to be overridden by boards that provide them */
168 scif_clk: scif-clk {
169 compatible = "fixed-clock";
170 #clock-cells = <0>;
171 clock-frequency = <0>;
174 scif_clk2: scif-clk2 {
175 compatible = "fixed-clock";
176 #clock-cells = <0>;
177 clock-frequency = <0>;
181 compatible = "simple-bus";
182 interrupt-parent = <&gic>;
183 #address-cells = <2>;
184 #size-cells = <2>;
188 compatible = "renesas,r8a779h0-wdt",
189 "renesas,rcar-gen4-wdt";
193 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
199 compatible = "renesas,pfc-r8a779h0";
207 compatible = "renesas,gpio-r8a779h0",
208 "renesas,rcar-gen4-gpio";
211 #gpio-cells = <2>;
212 gpio-controller;
213 gpio-ranges = <&pfc 0 0 19>;
214 #interrupt-cells = <2>;
215 interrupt-controller;
217 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
222 compatible = "renesas,gpio-r8a779h0",
223 "renesas,rcar-gen4-gpio";
226 #gpio-cells = <2>;
227 gpio-controller;
228 gpio-ranges = <&pfc 0 32 30>;
229 #interrupt-cells = <2>;
230 interrupt-controller;
232 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
237 compatible = "renesas,gpio-r8a779h0",
238 "renesas,rcar-gen4-gpio";
241 #gpio-cells = <2>;
242 gpio-controller;
243 gpio-ranges = <&pfc 0 64 20>;
244 #interrupt-cells = <2>;
245 interrupt-controller;
247 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
252 compatible = "renesas,gpio-r8a779h0",
253 "renesas,rcar-gen4-gpio";
256 #gpio-cells = <2>;
257 gpio-controller;
258 gpio-ranges = <&pfc 0 96 32>;
259 #interrupt-cells = <2>;
260 interrupt-controller;
262 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
267 compatible = "renesas,gpio-r8a779h0",
268 "renesas,rcar-gen4-gpio";
271 #gpio-cells = <2>;
272 gpio-controller;
273 gpio-ranges = <&pfc 0 128 25>;
274 #interrupt-cells = <2>;
275 interrupt-controller;
277 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
282 compatible = "renesas,gpio-r8a779h0",
283 "renesas,rcar-gen4-gpio";
286 #gpio-cells = <2>;
287 gpio-controller;
288 gpio-ranges = <&pfc 0 160 21>;
289 #interrupt-cells = <2>;
290 interrupt-controller;
292 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
297 compatible = "renesas,gpio-r8a779h0",
298 "renesas,rcar-gen4-gpio";
301 #gpio-cells = <2>;
302 gpio-controller;
303 gpio-ranges = <&pfc 0 192 21>;
304 #interrupt-cells = <2>;
305 interrupt-controller;
307 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
312 compatible = "renesas,gpio-r8a779h0",
313 "renesas,rcar-gen4-gpio";
316 #gpio-cells = <2>;
317 gpio-controller;
318 gpio-ranges = <&pfc 0 224 21>;
319 #interrupt-cells = <2>;
320 interrupt-controller;
322 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
327 compatible = "renesas,r8a779h0-cmt0",
328 "renesas,rcar-gen4-cmt0";
333 clock-names = "fck";
334 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
340 compatible = "renesas,r8a779h0-cmt1",
341 "renesas,rcar-gen4-cmt1";
352 clock-names = "fck";
353 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
359 compatible = "renesas,r8a779h0-cmt1",
360 "renesas,rcar-gen4-cmt1";
371 clock-names = "fck";
372 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
378 compatible = "renesas,r8a779h0-cmt1",
379 "renesas,rcar-gen4-cmt1";
390 clock-names = "fck";
391 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
396 cpg: clock-controller@e6150000 {
397 compatible = "renesas,r8a779h0-cpg-mssr";
400 clock-names = "extal", "extalr";
401 #clock-cells = <2>;
402 #power-domain-cells = <0>;
403 #reset-cells = <1>;
406 rst: reset-controller@e6160000 {
407 compatible = "renesas,r8a779h0-rst";
411 sysc: system-controller@e6180000 {
412 compatible = "renesas,r8a779h0-sysc";
414 #power-domain-cells = <1>;
418 compatible = "renesas,r8a779h0-thermal";
422 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
424 #thermal-sensor-cells = <1>;
428 compatible = "renesas,r8a779h0-otp";
432 intc_ex: interrupt-controller@e61c0000 {
433 compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc";
434 #interrupt-cells = <2>;
435 interrupt-controller;
444 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
449 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
454 interrupt-names = "tuni0", "tuni1", "tuni2";
456 clock-names = "fck";
457 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
463 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
469 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
471 clock-names = "fck";
472 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
478 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
484 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
486 clock-names = "fck";
487 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
493 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
499 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
501 clock-names = "fck";
502 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
508 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
514 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
516 clock-names = "fck";
517 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
523 compatible = "renesas,i2c-r8a779h0",
524 "renesas,rcar-gen4-i2c";
528 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
532 dma-names = "tx", "rx", "tx", "rx";
533 i2c-scl-internal-delay-ns = <110>;
534 #address-cells = <1>;
535 #size-cells = <0>;
540 compatible = "renesas,i2c-r8a779h0",
541 "renesas,rcar-gen4-i2c";
545 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
549 dma-names = "tx", "rx", "tx", "rx";
550 i2c-scl-internal-delay-ns = <110>;
551 #address-cells = <1>;
552 #size-cells = <0>;
557 compatible = "renesas,i2c-r8a779h0",
558 "renesas,rcar-gen4-i2c";
562 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
566 dma-names = "tx", "rx", "tx", "rx";
567 i2c-scl-internal-delay-ns = <110>;
568 #address-cells = <1>;
569 #size-cells = <0>;
574 compatible = "renesas,i2c-r8a779h0",
575 "renesas,rcar-gen4-i2c";
579 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
583 dma-names = "tx", "rx", "tx", "rx";
584 i2c-scl-internal-delay-ns = <110>;
585 #address-cells = <1>;
586 #size-cells = <0>;
591 compatible = "renesas,hscif-r8a779h0",
592 "renesas,rcar-gen4-hscif", "renesas,hscif";
598 clock-names = "fck", "brg_int", "scif_clk";
599 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
603 dma-names = "tx", "rx", "tx", "rx";
608 compatible = "renesas,hscif-r8a779h0",
609 "renesas,rcar-gen4-hscif", "renesas,hscif";
615 clock-names = "fck", "brg_int", "scif_clk";
616 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
620 dma-names = "tx", "rx", "tx", "rx";
625 compatible = "renesas,hscif-r8a779h0",
626 "renesas,rcar-gen4-hscif", "renesas,hscif";
632 clock-names = "fck", "brg_int", "scif_clk";
633 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
637 dma-names = "tx", "rx", "tx", "rx";
642 compatible = "renesas,hscif-r8a779h0",
643 "renesas,rcar-gen4-hscif", "renesas,hscif";
649 clock-names = "fck", "brg_int", "scif_clk";
650 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
654 dma-names = "tx", "rx", "tx", "rx";
659 compatible = "renesas,r8a779h0-pcie",
660 "renesas,rcar-gen4-pcie";
665 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
670 interrupt-names = "msi", "dma", "sft_ce", "app";
672 clock-names = "core", "ref";
673 power-domains = <&sysc R8A779H0_PD_A2PCIPHY>;
675 reset-names = "pwr";
676 max-link-speed = <4>;
677 num-lanes = <2>;
678 #address-cells = <3>;
679 #size-cells = <2>;
680 bus-range = <0x00 0xff>;
684 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
685 #interrupt-cells = <1>;
686 interrupt-map-mask = <0 0 0 7>;
687 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
691 snps,enable-cdm-check;
695 pciec0_ep: pcie-ep@e65d0000 {
696 compatible = "renesas,r8a779h0-pcie-ep",
697 "renesas,rcar-gen4-pcie-ep";
702 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";
706 interrupt-names = "dma", "sft_ce", "app";
708 clock-names = "core", "ref";
709 power-domains = <&sysc R8A779H0_PD_A2PCIPHY>;
711 reset-names = "pwr";
712 max-link-speed = <4>;
713 num-lanes = <2>;
714 max-functions = /bits/ 8 <2>;
719 compatible = "renesas,r8a779h0-canfd",
720 "renesas,rcar-gen4-canfd";
724 interrupt-names = "ch_int", "g_int";
728 clock-names = "fck", "canfd", "can_clk";
729 assigned-clocks = <&cpg CPG_CORE R8A779H0_CLK_CANFD>;
730 assigned-clock-rates = <80000000>;
731 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
753 compatible = "renesas,etheravb-r8a779h0",
754 "renesas,etheravb-rcar-gen4";
781 interrupt-names = "ch0", "ch1", "ch2", "ch3",
789 clock-names = "fck";
790 power-domains = <&sysc R8A779H0_PD_C4>;
792 phy-mode = "rgmii";
793 rx-internal-delay-ps = <0>;
794 tx-internal-delay-ps = <0>;
796 #address-cells = <1>;
797 #size-cells = <0>;
802 compatible = "renesas,etheravb-r8a779h0",
803 "renesas,etheravb-rcar-gen4";
830 interrupt-names = "ch0", "ch1", "ch2", "ch3",
838 clock-names = "fck";
839 power-domains = <&sysc R8A779H0_PD_C4>;
841 phy-mode = "rgmii";
842 rx-internal-delay-ps = <0>;
843 tx-internal-delay-ps = <0>;
845 #address-cells = <1>;
846 #size-cells = <0>;
851 compatible = "renesas,etheravb-r8a779h0",
852 "renesas,etheravb-rcar-gen4";
879 interrupt-names = "ch0", "ch1", "ch2", "ch3",
887 clock-names = "fck";
888 power-domains = <&sysc R8A779H0_PD_C4>;
890 phy-mode = "rgmii";
891 rx-internal-delay-ps = <0>;
892 tx-internal-delay-ps = <0>;
894 #address-cells = <1>;
895 #size-cells = <0>;
900 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
902 #pwm-cells = <2>;
904 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
910 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
912 #pwm-cells = <2>;
914 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
920 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
922 #pwm-cells = <2>;
924 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
930 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
932 #pwm-cells = <2>;
934 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
940 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
942 #pwm-cells = <2>;
944 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
950 compatible = "renesas,scif-r8a779h0",
951 "renesas,rcar-gen4-scif", "renesas,scif";
957 clock-names = "fck", "brg_int", "scif_clk";
958 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
962 dma-names = "tx", "rx", "tx", "rx";
967 compatible = "renesas,scif-r8a779h0",
968 "renesas,rcar-gen4-scif", "renesas,scif";
974 clock-names = "fck", "brg_int", "scif_clk";
975 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
979 dma-names = "tx", "rx", "tx", "rx";
984 compatible = "renesas,scif-r8a779h0",
985 "renesas,rcar-gen4-scif", "renesas,scif";
991 clock-names = "fck", "brg_int", "scif_clk";
992 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
996 dma-names = "tx", "rx", "tx", "rx";
1001 compatible = "renesas,scif-r8a779h0",
1002 "renesas,rcar-gen4-scif", "renesas,scif";
1008 clock-names = "fck", "brg_int", "scif_clk";
1009 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1013 dma-names = "tx", "rx", "tx", "rx";
1018 compatible = "renesas,msiof-r8a779h0",
1019 "renesas,rcar-gen4-msiof";
1025 dma-names = "tx", "rx", "tx", "rx";
1026 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1028 #address-cells = <1>;
1029 #size-cells = <0>;
1034 compatible = "renesas,msiof-r8a779h0",
1035 "renesas,rcar-gen4-msiof";
1041 dma-names = "tx", "rx", "tx", "rx";
1042 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1050 compatible = "renesas,msiof-r8a779h0",
1051 "renesas,rcar-gen4-msiof";
1057 dma-names = "tx", "rx", "tx", "rx";
1058 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1060 #address-cells = <1>;
1061 #size-cells = <0>;
1066 compatible = "renesas,msiof-r8a779h0",
1067 "renesas,rcar-gen4-msiof";
1073 dma-names = "tx", "rx", "tx", "rx";
1074 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1076 #address-cells = <1>;
1077 #size-cells = <0>;
1082 compatible = "renesas,msiof-r8a779h0",
1083 "renesas,rcar-gen4-msiof";
1089 dma-names = "tx", "rx", "tx", "rx";
1090 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1092 #address-cells = <1>;
1093 #size-cells = <0>;
1098 compatible = "renesas,msiof-r8a779h0",
1099 "renesas,rcar-gen4-msiof";
1105 dma-names = "tx", "rx", "tx", "rx";
1106 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1108 #address-cells = <1>;
1109 #size-cells = <0>;
1114 compatible = "renesas,vin-r8a779h0",
1115 "renesas,rcar-gen4-vin";
1119 power-domains = <&sysc R8A779H0_PD_C4>;
1125 #address-cells = <1>;
1126 #size-cells = <0>;
1129 #address-cells = <1>;
1130 #size-cells = <0>;
1136 remote-endpoint = <&isp0vin00>;
1143 compatible = "renesas,vin-r8a779h0",
1144 "renesas,rcar-gen4-vin";
1148 power-domains = <&sysc R8A779H0_PD_C4>;
1154 #address-cells = <1>;
1155 #size-cells = <0>;
1158 #address-cells = <1>;
1159 #size-cells = <0>;
1165 remote-endpoint = <&isp0vin01>;
1172 compatible = "renesas,vin-r8a779h0",
1173 "renesas,rcar-gen4-vin";
1177 power-domains = <&sysc R8A779H0_PD_C4>;
1183 #address-cells = <1>;
1184 #size-cells = <0>;
1187 #address-cells = <1>;
1188 #size-cells = <0>;
1194 remote-endpoint = <&isp0vin02>;
1201 compatible = "renesas,vin-r8a779h0",
1202 "renesas,rcar-gen4-vin";
1206 power-domains = <&sysc R8A779H0_PD_C4>;
1212 #address-cells = <1>;
1213 #size-cells = <0>;
1216 #address-cells = <1>;
1217 #size-cells = <0>;
1223 remote-endpoint = <&isp0vin03>;
1230 compatible = "renesas,vin-r8a779h0",
1231 "renesas,rcar-gen4-vin";
1235 power-domains = <&sysc R8A779H0_PD_C4>;
1241 #address-cells = <1>;
1242 #size-cells = <0>;
1245 #address-cells = <1>;
1246 #size-cells = <0>;
1252 remote-endpoint = <&isp0vin04>;
1259 compatible = "renesas,vin-r8a779h0",
1260 "renesas,rcar-gen4-vin";
1264 power-domains = <&sysc R8A779H0_PD_C4>;
1270 #address-cells = <1>;
1271 #size-cells = <0>;
1274 #address-cells = <1>;
1275 #size-cells = <0>;
1281 remote-endpoint = <&isp0vin05>;
1288 compatible = "renesas,vin-r8a779h0",
1289 "renesas,rcar-gen4-vin";
1293 power-domains = <&sysc R8A779H0_PD_C4>;
1299 #address-cells = <1>;
1300 #size-cells = <0>;
1303 #address-cells = <1>;
1304 #size-cells = <0>;
1310 remote-endpoint = <&isp0vin06>;
1317 compatible = "renesas,vin-r8a779h0",
1318 "renesas,rcar-gen4-vin";
1322 power-domains = <&sysc R8A779H0_PD_C4>;
1328 #address-cells = <1>;
1329 #size-cells = <0>;
1332 #address-cells = <1>;
1333 #size-cells = <0>;
1339 remote-endpoint = <&isp0vin07>;
1346 compatible = "renesas,vin-r8a779h0",
1347 "renesas,rcar-gen4-vin";
1351 power-domains = <&sysc R8A779H0_PD_C4>;
1357 #address-cells = <1>;
1358 #size-cells = <0>;
1361 #address-cells = <1>;
1362 #size-cells = <0>;
1368 remote-endpoint = <&isp1vin08>;
1375 compatible = "renesas,vin-r8a779h0",
1376 "renesas,rcar-gen4-vin";
1380 power-domains = <&sysc R8A779H0_PD_C4>;
1386 #address-cells = <1>;
1387 #size-cells = <0>;
1390 #address-cells = <1>;
1391 #size-cells = <0>;
1397 remote-endpoint = <&isp1vin09>;
1404 compatible = "renesas,vin-r8a779h0",
1405 "renesas,rcar-gen4-vin";
1409 power-domains = <&sysc R8A779H0_PD_C4>;
1415 #address-cells = <1>;
1416 #size-cells = <0>;
1419 #address-cells = <1>;
1420 #size-cells = <0>;
1426 remote-endpoint = <&isp1vin10>;
1433 compatible = "renesas,vin-r8a779h0",
1434 "renesas,rcar-gen4-vin";
1438 power-domains = <&sysc R8A779H0_PD_C4>;
1444 #address-cells = <1>;
1445 #size-cells = <0>;
1448 #address-cells = <1>;
1449 #size-cells = <0>;
1455 remote-endpoint = <&isp1vin11>;
1462 compatible = "renesas,vin-r8a779h0",
1463 "renesas,rcar-gen4-vin";
1467 power-domains = <&sysc R8A779H0_PD_C4>;
1473 #address-cells = <1>;
1474 #size-cells = <0>;
1477 #address-cells = <1>;
1478 #size-cells = <0>;
1484 remote-endpoint = <&isp1vin12>;
1491 compatible = "renesas,vin-r8a779h0",
1492 "renesas,rcar-gen4-vin";
1496 power-domains = <&sysc R8A779H0_PD_C4>;
1502 #address-cells = <1>;
1503 #size-cells = <0>;
1506 #address-cells = <1>;
1507 #size-cells = <0>;
1513 remote-endpoint = <&isp1vin13>;
1520 compatible = "renesas,vin-r8a779h0",
1521 "renesas,rcar-gen4-vin";
1525 power-domains = <&sysc R8A779H0_PD_C4>;
1531 #address-cells = <1>;
1532 #size-cells = <0>;
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1542 remote-endpoint = <&isp1vin14>;
1549 compatible = "renesas,vin-r8a779h0",
1550 "renesas,rcar-gen4-vin";
1554 power-domains = <&sysc R8A779H0_PD_C4>;
1560 #address-cells = <1>;
1561 #size-cells = <0>;
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1571 remote-endpoint = <&isp1vin15>;
1577 dmac1: dma-controller@e7350000 {
1578 compatible = "renesas,dmac-r8a779h0",
1579 "renesas,rcar-gen4-dmac";
1599 interrupt-names = "error",
1605 clock-names = "fck";
1606 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1608 #dma-cells = <1>;
1609 dma-channels = <16>;
1620 dmac2: dma-controller@e7351000 {
1621 compatible = "renesas,dmac-r8a779h0",
1622 "renesas,rcar-gen4-dmac";
1634 interrupt-names = "error",
1638 clock-names = "fck";
1639 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1641 #dma-cells = <1>;
1642 dma-channels = <8>;
1650 compatible = "renesas,rcar_sound-r8a779h0", "renesas,rcar_sound-gen4";
1655 reg-names = "sdmc", "ssiu", "ssi", "adg";
1657 clock-names = "ssiu.0", "ssi.0", "clkin";
1658 /* #clock-cells is fixed */
1659 #clock-cells = <0>;
1660 /* #sound-dai-cells is fixed */
1661 #sound-dai-cells = <0>;
1663 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1665 reset-names = "ssiu.0", "ssi.0";
1669 ssiu00: ssiu-0 {
1671 dma-names = "tx", "rx";
1673 ssiu01: ssiu-1 {
1675 dma-names = "tx", "rx";
1677 ssiu02: ssiu-2 {
1679 dma-names = "tx", "rx";
1681 ssiu03: ssiu-3 {
1683 dma-names = "tx", "rx";
1685 ssiu04: ssiu-4 {
1687 dma-names = "tx", "rx";
1689 ssiu05: ssiu-5 {
1691 dma-names = "tx", "rx";
1693 ssiu06: ssiu-6 {
1695 dma-names = "tx", "rx";
1697 ssiu07: ssiu-7 {
1699 dma-names = "tx", "rx";
1704 ssi0: ssi-0 {
1711 compatible = "renesas,sdhi-r8a779h0",
1712 "renesas,rcar-gen4-sdhi";
1717 clock-names = "core", "clkh";
1718 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1720 max-frequency = <200000000>;
1726 compatible = "renesas,r8a779h0-rpc-if",
1727 "renesas,rcar-gen4-rpc-if";
1731 reg-names = "regs", "dirmap", "wbuf";
1734 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1736 #address-cells = <1>;
1737 #size-cells = <0>;
1742 compatible = "renesas,ipmmu-r8a779h0",
1743 "renesas,rcar-gen4-ipmmu-vmsa";
1745 renesas,ipmmu-main = <&ipmmu_mm>;
1746 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1747 #iommu-cells = <1>;
1751 compatible = "renesas,ipmmu-r8a779h0",
1752 "renesas,rcar-gen4-ipmmu-vmsa";
1754 renesas,ipmmu-main = <&ipmmu_mm>;
1755 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1756 #iommu-cells = <1>;
1760 compatible = "renesas,ipmmu-r8a779h0",
1761 "renesas,rcar-gen4-ipmmu-vmsa";
1763 renesas,ipmmu-main = <&ipmmu_mm>;
1764 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1765 #iommu-cells = <1>;
1769 compatible = "renesas,ipmmu-r8a779h0",
1770 "renesas,rcar-gen4-ipmmu-vmsa";
1772 renesas,ipmmu-main = <&ipmmu_mm>;
1773 power-domains = <&sysc R8A779H0_PD_C4>;
1774 #iommu-cells = <1>;
1778 compatible = "renesas,ipmmu-r8a779h0",
1779 "renesas,rcar-gen4-ipmmu-vmsa";
1781 renesas,ipmmu-main = <&ipmmu_mm>;
1782 power-domains = <&sysc R8A779H0_PD_C4>;
1783 #iommu-cells = <1>;
1787 compatible = "renesas,ipmmu-r8a779h0",
1788 "renesas,rcar-gen4-ipmmu-vmsa";
1790 renesas,ipmmu-main = <&ipmmu_mm>;
1791 power-domains = <&sysc R8A779H0_PD_C4>;
1792 #iommu-cells = <1>;
1796 compatible = "renesas,ipmmu-r8a779h0",
1797 "renesas,rcar-gen4-ipmmu-vmsa";
1799 renesas,ipmmu-main = <&ipmmu_mm>;
1800 power-domains = <&sysc R8A779H0_PD_C4>;
1801 #iommu-cells = <1>;
1805 compatible = "renesas,ipmmu-r8a779h0",
1806 "renesas,rcar-gen4-ipmmu-vmsa";
1808 renesas,ipmmu-main = <&ipmmu_mm>;
1809 power-domains = <&sysc R8A779H0_PD_C4>;
1810 #iommu-cells = <1>;
1814 compatible = "renesas,ipmmu-r8a779h0",
1815 "renesas,rcar-gen4-ipmmu-vmsa";
1817 renesas,ipmmu-main = <&ipmmu_mm>;
1818 power-domains = <&sysc R8A779H0_PD_C4>;
1819 #iommu-cells = <1>;
1823 compatible = "renesas,ipmmu-r8a779h0",
1824 "renesas,rcar-gen4-ipmmu-vmsa";
1826 renesas,ipmmu-main = <&ipmmu_mm>;
1827 power-domains = <&sysc R8A779H0_PD_C4>;
1828 #iommu-cells = <1>;
1832 compatible = "renesas,ipmmu-r8a779h0",
1833 "renesas,rcar-gen4-ipmmu-vmsa";
1837 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1838 #iommu-cells = <1>;
1841 gic: interrupt-controller@f1000000 {
1842 compatible = "arm,gic-v3";
1843 #interrupt-cells = <3>;
1844 #address-cells = <0>;
1845 interrupt-controller;
1852 compatible = "renesas,r8a779h0-csi2";
1856 power-domains = <&sysc R8A779H0_PD_C4>;
1861 #address-cells = <1>;
1862 #size-cells = <0>;
1871 remote-endpoint = <&isp0csi40>;
1878 compatible = "renesas,r8a779h0-csi2";
1882 power-domains = <&sysc R8A779H0_PD_C4>;
1887 #address-cells = <1>;
1888 #size-cells = <0>;
1897 remote-endpoint = <&isp1csi41>;
1904 compatible = "renesas,r8a779h0-isp",
1905 "renesas,rcar-gen4-isp";
1909 power-domains = <&sysc R8A779H0_PD_A3ISP0>;
1914 #address-cells = <1>;
1915 #size-cells = <0>;
1918 #address-cells = <1>;
1919 #size-cells = <0>;
1925 remote-endpoint = <&csi40isp0>;
1932 remote-endpoint = <&vin00isp0>;
1939 remote-endpoint = <&vin01isp0>;
1946 remote-endpoint = <&vin02isp0>;
1953 remote-endpoint = <&vin03isp0>;
1960 remote-endpoint = <&vin04isp0>;
1967 remote-endpoint = <&vin05isp0>;
1974 remote-endpoint = <&vin06isp0>;
1981 remote-endpoint = <&vin07isp0>;
1988 compatible = "renesas,r8a779h0-isp",
1989 "renesas,rcar-gen4-isp";
1993 power-domains = <&sysc R8A779H0_PD_A3ISP0>;
1998 #address-cells = <1>;
1999 #size-cells = <0>;
2002 #address-cells = <1>;
2003 #size-cells = <0>;
2009 remote-endpoint = <&csi41isp1>;
2016 remote-endpoint = <&vin08isp1>;
2023 remote-endpoint = <&vin09isp1>;
2030 remote-endpoint = <&vin10isp1>;
2037 remote-endpoint = <&vin11isp1>;
2044 remote-endpoint = <&vin12isp1>;
2051 remote-endpoint = <&vin13isp1>;
2058 remote-endpoint = <&vin14isp1>;
2065 remote-endpoint = <&vin15isp1>;
2077 thermal-zones {
2078 sensor_thermal_cr52: sensor1-thermal {
2079 polling-delay-passive = <250>;
2080 polling-delay = <1000>;
2081 thermal-sensors = <&tsc 0>;
2084 sensor1_crit: sensor1-crit {
2092 sensor_thermal_ca76: sensor2-thermal {
2093 polling-delay-passive = <250>;
2094 polling-delay = <1000>;
2095 thermal-sensors = <&tsc 1>;
2098 sensor2_crit: sensor2-crit {
2108 compatible = "arm,armv8-timer";
2109 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2114 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
2115 "hyp-virt";