Lines Matching +full:single +full:- +full:board
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4M Gray Hawk Single board
11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture
28 /dts-v1/;
30 #include <dt-bindings/gpio/gpio.h>
31 #include <dt-bindings/input/input.h>
32 #include <dt-bindings/leds/common.h>
37 model = "Renesas Gray Hawk Single board based on r8a779h0";
38 compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";
50 can_transceiver0: can-phy0 {
52 #phy-cells = <0>;
53 enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
54 max-bitrate = <5000000>;
59 stdout-path = "serial0:921600n8";
63 compatible = "gpio-keys";
65 pinctrl-0 = <&keys_pins>;
66 pinctrl-names = "default";
68 key-1 {
72 wakeup-source;
73 debounce-interval = <20>;
76 key-2 {
80 wakeup-source;
81 debounce-interval = <20>;
84 key-3 {
88 wakeup-source;
89 debounce-interval = <20>;
94 compatible = "gpio-leds";
96 led-1 {
100 function-enumerator = <1>;
103 led-2 {
107 function-enumerator = <2>;
110 led-3 {
114 function-enumerator = <3>;
129 pcie_clk: clk-9fgv0841-pci {
130 compatible = "fixed-clock";
131 clock-frequency = <100000000>;
132 #clock-cells = <0>;
135 reg_1p8v: regulator-1p8v {
136 compatible = "regulator-fixed";
137 regulator-name = "fixed-1.8V";
138 regulator-min-microvolt = <1800000>;
139 regulator-max-microvolt = <1800000>;
140 regulator-boot-on;
141 regulator-always-on;
144 reg_3p3v: regulator-3p3v {
145 compatible = "regulator-fixed";
146 regulator-name = "fixed-3.3V";
147 regulator-min-microvolt = <3300000>;
148 regulator-max-microvolt = <3300000>;
149 regulator-boot-on;
150 regulator-always-on;
153 sound_mux: sound-mux {
154 compatible = "simple-audio-mux";
155 mux-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
156 state-labels = "Playback", "Capture";
160 compatible = "audio-graph-card2";
161 label = "rcar-sound";
162 aux-devs = <&sound_mux>; // for GP0_01
169 clock-frequency = <24576000>;
173 pinctrl-0 = <&avb0_pins>;
174 pinctrl-names = "default";
175 phy-handle = <&phy0>;
176 tx-internal-delay-ps = <2000>;
179 phy0: ethernet-phy@0 {
180 compatible = "ethernet-phy-id0022.1622",
181 "ethernet-phy-ieee802.3-c22";
182 rxc-skew-ps = <1500>;
184 interrupts-extended = <&gpio7 5 IRQ_TYPE_LEVEL_LOW>;
185 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
190 clock-frequency = <40000000>;
194 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;
195 pinctrl-names = "default";
209 clock-frequency = <16666666>;
213 clock-frequency = <32768>;
217 audio-power-hog {
218 gpio-hog;
220 output-high;
221 line-name = "Audio-Power";
226 pinctrl-0 = <&hscif0_pins>;
227 pinctrl-names = "default";
229 uart-has-rtscts;
234 pinctrl-0 = <&hscif2_pins>;
235 pinctrl-names = "default";
237 uart-has-rtscts;
242 pinctrl-0 = <&i2c0_pins>;
243 pinctrl-names = "default";
246 clock-frequency = <400000>;
251 interrupts-extended = <&gpio0 0 IRQ_TYPE_LEVEL_LOW>;
252 gpio-controller;
253 #gpio-cells = <2>;
254 interrupt-controller;
255 #interrupt-cells = <2>;
260 label = "cpu-board";
267 label = "breakout-board";
274 label = "csi-dsi-sub-board-id";
281 label = "ethernet-sub-board-id";
288 pinctrl-0 = <&i2c3_pins>;
289 pinctrl-names = "default";
292 clock-frequency = <400000>;
295 compatible = "asahi-kasei,ak4619";
299 clock-names = "mclk";
301 #sound-dai-cells = <0>;
304 remote-endpoint = <&rsnd_endpoint>;
311 pinctrl-0 = <&mmc_pins>;
312 pinctrl-1 = <&mmc_pins>;
313 pinctrl-names = "default", "state_uhs";
315 vmmc-supply = <®_3p3v>;
316 vqmmc-supply = <®_1p8v>;
317 mmc-hs200-1_8v;
318 mmc-hs400-1_8v;
319 bus-width = <8>;
320 no-sd;
321 no-sdio;
322 non-removable;
323 full-pwr-cycle-in-suspend;
328 compatible = "gpio-gate-clock";
330 enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
331 /delete-property/ clock-frequency;
335 reset-gpios = <&io_expander_a 0 GPIO_ACTIVE_LOW>;
340 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
341 pinctrl-names = "default";
352 drive-strength = <21>;
357 drive-strength = <21>;
361 can_clk_pins: can-clk {
398 bias-pull-up;
404 power-source = <1800>;
412 scif_clk_pins: scif-clk {
417 scif_clk2_pins: scif-clk2 {
434 pinctrl-0 = <&sound_clk_pins>, <&sound_pins>;
435 pinctrl-names = "default";
440 clock-frequency = <12288000>;
445 remote-endpoint = <&ak4619_endpoint>;
446 bitclock-master;
447 frame-master;
458 pinctrl-0 = <&qspi0_pins>;
459 pinctrl-names = "default";
464 compatible = "spansion,s25fs512s", "jedec,spi-nor";
466 spi-max-frequency = <40000000>;
467 spi-rx-bus-width = <4>;
470 compatible = "fixed-partitions";
471 #address-cells = <1>;
472 #size-cells = <1>;
476 read-only;
486 timeout-sec = <60>;
491 clock-frequency = <24000000>;
495 clock-frequency = <24000000>;