Lines Matching +full:0 +full:xe6160000
19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
44 #size-cells = <0>;
46 a53_0: cpu@0 {
48 reg = <0x0>;
65 #clock-cells = <0>;
67 clock-frequency = <0>;
82 #clock-cells = <0>;
83 clock-frequency = <0>;
96 reg = <0 0xe6020000 0 0x0c>;
107 reg = <0 0xe6050000 0 0x50>;
111 gpio-ranges = <&pfc 0 0 9>;
122 reg = <0 0xe6051000 0 0x50>;
126 gpio-ranges = <&pfc 0 32 32>;
137 reg = <0 0xe6052000 0 0x50>;
141 gpio-ranges = <&pfc 0 64 32>;
152 reg = <0 0xe6053000 0 0x50>;
156 gpio-ranges = <&pfc 0 96 10>;
167 reg = <0 0xe6054000 0 0x50>;
171 gpio-ranges = <&pfc 0 128 32>;
182 reg = <0 0xe6055000 0 0x50>;
186 gpio-ranges = <&pfc 0 160 21>;
197 reg = <0 0xe6055400 0 0x50>;
201 gpio-ranges = <&pfc 0 192 14>;
211 reg = <0 0xe6060000 0 0x508>;
217 reg = <0 0xe60f0000 0 0x1004>;
230 reg = <0 0xe6130000 0 0x1004>;
249 reg = <0 0xe6140000 0 0x1004>;
268 reg = <0 0xe6148000 0 0x1004>;
286 reg = <0 0xe6150000 0 0x1000>;
290 #power-domain-cells = <0>;
296 reg = <0 0xe6160000 0 0x0200>;
301 reg = <0 0xe6180000 0 0x0400>;
307 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
314 #thermal-sensor-cells = <0>;
321 reg = <0 0xe61c0000 0 0x200>;
322 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
335 reg = <0 0xe61e0000 0 0x30>;
349 reg = <0 0xe6fc0000 0 0x30>;
364 reg = <0 0xe6fd0000 0 0x30>;
379 reg = <0 0xe6fe0000 0 0x30>;
393 reg = <0 0xffc00000 0 0x30>;
407 #size-cells = <0>;
410 reg = <0 0xe6500000 0 0x40>;
415 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
416 <&dmac2 0x91>, <&dmac2 0x90>;
424 #size-cells = <0>;
427 reg = <0 0xe6508000 0 0x40>;
432 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
433 <&dmac2 0x93>, <&dmac2 0x92>;
441 #size-cells = <0>;
444 reg = <0 0xe6510000 0 0x40>;
449 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
450 <&dmac2 0x95>, <&dmac2 0x94>;
458 #size-cells = <0>;
461 reg = <0 0xe66d0000 0 0x40>;
466 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
476 reg = <0 0xe6540000 0 0x60>;
482 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
483 <&dmac2 0x31>, <&dmac2 0x30>;
494 reg = <0 0xe66a0000 0 0x60>;
500 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
510 reg = <0 0xe6590000 0 0x200>;
513 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
514 <&usb_dmac1 0>, <&usb_dmac1 1>;
527 reg = <0 0xe65a0000 0 0x100>;
541 reg = <0 0xe65b0000 0 0x100>;
555 reg = <0x0 0xe6601000 0 0x1000>;
564 reg = <0 0xe66c0000 0 0x8000>;
590 reg = <0 0xe6700000 0 0x10000>;
609 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
618 reg = <0 0xe7300000 0 0x10000>;
637 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
646 reg = <0 0xe7310000 0 0x10000>;
673 reg = <0 0xe6740000 0 0x1000>;
674 renesas,ipmmu-main = <&ipmmu_mm 0>;
681 reg = <0 0xe7740000 0 0x1000>;
689 reg = <0 0xe6570000 0 0x1000>;
697 reg = <0 0xe67b0000 0 0x1000>;
706 reg = <0 0xec670000 0 0x1000>;
714 reg = <0 0xfd800000 0 0x1000>;
722 reg = <0 0xffc80000 0 0x1000>;
730 reg = <0 0xfe6b0000 0 0x1000>;
738 reg = <0 0xfebd0000 0 0x1000>;
746 reg = <0 0xfe990000 0 0x1000>;
755 reg = <0 0xe6800000 0 0x800>;
796 #size-cells = <0>;
803 reg = <0 0xe6c30000 0 0x1000>;
819 reg = <0 0xe6c38000 0 0x1000>;
834 reg = <0 0xe6e30000 0 0x8>;
844 reg = <0 0xe6e31000 0 0x8>;
854 reg = <0 0xe6e32000 0 0x8>;
864 reg = <0 0xe6e33000 0 0x8>;
875 reg = <0 0xe6e60000 0 64>;
881 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
882 <&dmac2 0x51>, <&dmac2 0x50>;
892 reg = <0 0xe6e68000 0 64>;
898 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
899 <&dmac2 0x53>, <&dmac2 0x52>;
909 reg = <0 0xe6e88000 0 64>;
915 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
916 <&dmac2 0x13>, <&dmac2 0x12>;
926 reg = <0 0xe6c50000 0 64>;
932 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
942 reg = <0 0xe6c40000 0 64>;
948 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
958 reg = <0 0xe6f30000 0 64>;
964 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
965 <&dmac2 0x5b>, <&dmac2 0x5a>;
975 reg = <0 0xe6e90000 0 0x64>;
978 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
979 <&dmac2 0x41>, <&dmac2 0x40>;
984 #size-cells = <0>;
991 reg = <0 0xe6ea0000 0 0x64>;
994 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
995 <&dmac2 0x43>, <&dmac2 0x42>;
1000 #size-cells = <0>;
1007 reg = <0 0xe6c00000 0 0x64>;
1010 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1015 #size-cells = <0>;
1022 reg = <0 0xe6c10000 0 0x64>;
1025 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1030 #size-cells = <0>;
1036 reg = <0 0xe6ef4000 0 0x1000>;
1049 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1055 * clkout : #clock-cells = <0>; <&rcar_sound>;
1059 reg = <0 0xec500000 0 0x1000>, /* SCU */
1060 <0 0xec5a0000 0 0x100>, /* ADG */
1061 <0 0xec540000 0 0x1000>, /* SSIU */
1062 <0 0xec541000 0 0x280>, /* SSI */
1063 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1077 "mix.1", "mix.0",
1078 "ctu.1", "ctu.0",
1079 "dvc.0", "dvc.1",
1089 ctu00: ctu-0 { };
1100 dvc0: dvc-0 {
1101 dmas = <&audma0 0xbc>;
1105 dmas = <&audma0 0xbe>;
1111 mix0: mix-0 { };
1118 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1123 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1131 dmas = <&audma0 0x07>, <&audma0 0x08>,
1132 <&audma0 0x6f>, <&audma0 0x70>;
1137 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1138 <&audma0 0x71>, <&audma0 0x72>;
1147 reg = <0 0xec520000 0 0x800>;
1159 reg = <0 0xec700000 0 0x10000>;
1188 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1200 reg = <0 0xee080000 0 0x100>;
1212 reg = <0 0xee080100 0 0x100>;
1226 reg = <0 0xee080200 0 0x700>;
1238 reg = <0 0xee140000 0 0x2000>;
1252 reg = <0 0xee200000 0 0x200>,
1253 <0 0x08000000 0 0x04000000>,
1254 <0 0xee208000 0 0x100>;
1261 #size-cells = <0>;
1268 #address-cells = <0>;
1270 reg = <0x0 0xf1010000 0 0x1000>,
1271 <0x0 0xf1020000 0 0x20000>,
1272 <0x0 0xf1040000 0 0x20000>,
1273 <0x0 0xf1060000 0 0x20000>;
1284 reg = <0 0xfe960000 0 0x8000>;
1294 reg = <0 0xfea20000 0 0x5000>;
1304 reg = <0 0xfea28000 0 0x5000>;
1314 reg = <0 0xfe96f000 0 0x200>;
1323 reg = <0 0xfea27000 0 0x200>;
1332 reg = <0 0xfea2f000 0 0x200>;
1342 reg = <0 0xfea40000 0 0x1000>;
1351 reg = <0 0xfea50000 0 0x1000>;
1359 reg = <0 0xfeb00000 0 0x40000>;
1363 clock-names = "du.0", "du.1";
1365 reset-names = "du.0";
1368 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1374 #size-cells = <0>;
1376 port@0 {
1377 reg = <0>;
1398 reg = <0 0xfeb90000 0 0x20>;
1408 #size-cells = <0>;
1410 port@0 {
1411 reg = <0>;
1425 reg = <0 0xfeb90100 0 0x20>;
1433 #size-cells = <0>;
1435 port@0 {
1436 reg = <0>;
1450 reg = <0 0xfff00044 0 4>;