Lines Matching +full:- +full:resets
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
35 /* External CAN clock - to be overridden by boards that provide it */
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #address-cells = <1>;
44 #size-cells = <0>;
47 compatible = "arm,cortex-a53";
50 power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
51 next-level-cache = <&L2_CA53>;
52 enable-method = "psci";
55 L2_CA53: cache-controller-1 {
57 power-domains = <&sysc R8A77995_PD_CA53_SCU>;
58 cache-unified;
59 cache-level = <2>;
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
67 clock-frequency = <0>;
71 compatible = "arm,cortex-a53-pmu";
72 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
76 compatible = "arm,psci-1.0", "arm,psci-0.2";
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
83 clock-frequency = <0>;
87 compatible = "simple-bus";
88 interrupt-parent = <&gic>;
89 #address-cells = <2>;
90 #size-cells = <2>;
94 compatible = "renesas,r8a77995-wdt",
95 "renesas,rcar-gen3-wdt";
99 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
100 resets = <&cpg 402>;
105 compatible = "renesas,gpio-r8a77995",
106 "renesas,rcar-gen3-gpio";
109 #gpio-cells = <2>;
110 gpio-controller;
111 gpio-ranges = <&pfc 0 0 9>;
112 #interrupt-cells = <2>;
113 interrupt-controller;
115 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
116 resets = <&cpg 912>;
120 compatible = "renesas,gpio-r8a77995",
121 "renesas,rcar-gen3-gpio";
124 #gpio-cells = <2>;
125 gpio-controller;
126 gpio-ranges = <&pfc 0 32 32>;
127 #interrupt-cells = <2>;
128 interrupt-controller;
130 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
131 resets = <&cpg 911>;
135 compatible = "renesas,gpio-r8a77995",
136 "renesas,rcar-gen3-gpio";
139 #gpio-cells = <2>;
140 gpio-controller;
141 gpio-ranges = <&pfc 0 64 32>;
142 #interrupt-cells = <2>;
143 interrupt-controller;
145 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
146 resets = <&cpg 910>;
150 compatible = "renesas,gpio-r8a77995",
151 "renesas,rcar-gen3-gpio";
154 #gpio-cells = <2>;
155 gpio-controller;
156 gpio-ranges = <&pfc 0 96 10>;
157 #interrupt-cells = <2>;
158 interrupt-controller;
160 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
161 resets = <&cpg 909>;
165 compatible = "renesas,gpio-r8a77995",
166 "renesas,rcar-gen3-gpio";
169 #gpio-cells = <2>;
170 gpio-controller;
171 gpio-ranges = <&pfc 0 128 32>;
172 #interrupt-cells = <2>;
173 interrupt-controller;
175 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
176 resets = <&cpg 908>;
180 compatible = "renesas,gpio-r8a77995",
181 "renesas,rcar-gen3-gpio";
184 #gpio-cells = <2>;
185 gpio-controller;
186 gpio-ranges = <&pfc 0 160 21>;
187 #interrupt-cells = <2>;
188 interrupt-controller;
190 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
191 resets = <&cpg 907>;
195 compatible = "renesas,gpio-r8a77995",
196 "renesas,rcar-gen3-gpio";
199 #gpio-cells = <2>;
200 gpio-controller;
201 gpio-ranges = <&pfc 0 192 14>;
202 #interrupt-cells = <2>;
203 interrupt-controller;
205 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
206 resets = <&cpg 906>;
210 compatible = "renesas,pfc-r8a77995";
215 compatible = "renesas,r8a77995-cmt0",
216 "renesas,rcar-gen3-cmt0";
221 clock-names = "fck";
222 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
223 resets = <&cpg 303>;
228 compatible = "renesas,r8a77995-cmt1",
229 "renesas,rcar-gen3-cmt1";
240 clock-names = "fck";
241 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
242 resets = <&cpg 302>;
247 compatible = "renesas,r8a77995-cmt1",
248 "renesas,rcar-gen3-cmt1";
259 clock-names = "fck";
260 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
261 resets = <&cpg 301>;
266 compatible = "renesas,r8a77995-cmt1",
267 "renesas,rcar-gen3-cmt1";
278 clock-names = "fck";
279 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
280 resets = <&cpg 300>;
284 cpg: clock-controller@e6150000 {
285 compatible = "renesas,r8a77995-cpg-mssr";
288 clock-names = "extal";
289 #clock-cells = <2>;
290 #power-domain-cells = <0>;
291 #reset-cells = <1>;
294 rst: reset-controller@e6160000 {
295 compatible = "renesas,r8a77995-rst";
299 sysc: system-controller@e6180000 {
300 compatible = "renesas,r8a77995-sysc";
302 #power-domain-cells = <1>;
306 compatible = "renesas,thermal-r8a77995";
312 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
313 resets = <&cpg 522>;
314 #thermal-sensor-cells = <0>;
317 intc_ex: interrupt-controller@e61c0000 {
318 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
319 #interrupt-cells = <2>;
320 interrupt-controller;
329 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
330 resets = <&cpg 407>;
334 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
339 interrupt-names = "tuni0", "tuni1", "tuni2";
341 clock-names = "fck";
342 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
343 resets = <&cpg 125>;
348 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
354 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
356 clock-names = "fck";
357 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
358 resets = <&cpg 124>;
363 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
369 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
371 clock-names = "fck";
372 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
373 resets = <&cpg 123>;
378 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
383 interrupt-names = "tuni0", "tuni1", "tuni2";
385 clock-names = "fck";
386 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
387 resets = <&cpg 122>;
392 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
397 interrupt-names = "tuni0", "tuni1", "tuni2";
399 clock-names = "fck";
400 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
401 resets = <&cpg 121>;
406 #address-cells = <1>;
407 #size-cells = <0>;
408 compatible = "renesas,i2c-r8a77995",
409 "renesas,rcar-gen3-i2c";
413 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
414 resets = <&cpg 931>;
417 dma-names = "tx", "rx", "tx", "rx";
418 i2c-scl-internal-delay-ns = <6>;
423 #address-cells = <1>;
424 #size-cells = <0>;
425 compatible = "renesas,i2c-r8a77995",
426 "renesas,rcar-gen3-i2c";
430 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
431 resets = <&cpg 930>;
434 dma-names = "tx", "rx", "tx", "rx";
435 i2c-scl-internal-delay-ns = <6>;
440 #address-cells = <1>;
441 #size-cells = <0>;
442 compatible = "renesas,i2c-r8a77995",
443 "renesas,rcar-gen3-i2c";
447 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
448 resets = <&cpg 929>;
451 dma-names = "tx", "rx", "tx", "rx";
452 i2c-scl-internal-delay-ns = <6>;
457 #address-cells = <1>;
458 #size-cells = <0>;
459 compatible = "renesas,i2c-r8a77995",
460 "renesas,rcar-gen3-i2c";
464 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
465 resets = <&cpg 928>;
467 dma-names = "tx", "rx";
468 i2c-scl-internal-delay-ns = <6>;
473 compatible = "renesas,hscif-r8a77995",
474 "renesas,rcar-gen3-hscif",
481 clock-names = "fck", "brg_int", "scif_clk";
484 dma-names = "tx", "rx", "tx", "rx";
485 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
486 resets = <&cpg 520>;
491 compatible = "renesas,hscif-r8a77995",
492 "renesas,rcar-gen3-hscif",
499 clock-names = "fck", "brg_int", "scif_clk";
501 dma-names = "tx", "rx";
502 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
503 resets = <&cpg 517>;
508 compatible = "renesas,usbhs-r8a77995",
509 "renesas,rcar-gen3-usbhs";
515 dma-names = "ch0", "ch1", "ch2", "ch3";
518 phy-names = "usb";
519 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
520 resets = <&cpg 704>, <&cpg 703>;
524 usb_dmac0: dma-controller@e65a0000 {
525 compatible = "renesas,r8a77995-usb-dmac",
526 "renesas,usb-dmac";
530 interrupt-names = "ch0", "ch1";
532 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
533 resets = <&cpg 330>;
534 #dma-cells = <1>;
535 dma-channels = <2>;
538 usb_dmac1: dma-controller@e65b0000 {
539 compatible = "renesas,r8a77995-usb-dmac",
540 "renesas,usb-dmac";
544 interrupt-names = "ch0", "ch1";
546 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
547 resets = <&cpg 331>;
548 #dma-cells = <1>;
549 dma-channels = <2>;
553 compatible = "arm,cryptocell-630p-ree";
557 resets = <&cpg 229>;
558 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
562 compatible = "renesas,r8a77995-canfd",
563 "renesas,rcar-gen3-canfd";
567 interrupt-names = "ch_int", "g_int";
571 clock-names = "fck", "canfd", "can_clk";
572 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
573 assigned-clock-rates = <40000000>;
574 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
575 resets = <&cpg 914>;
587 dmac0: dma-controller@e6700000 {
588 compatible = "renesas,dmac-r8a77995",
589 "renesas,rcar-dmac";
600 interrupt-names = "error",
604 clock-names = "fck";
605 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
606 resets = <&cpg 219>;
607 #dma-cells = <1>;
608 dma-channels = <8>;
615 dmac1: dma-controller@e7300000 {
616 compatible = "renesas,dmac-r8a77995",
617 "renesas,rcar-dmac";
628 interrupt-names = "error",
632 clock-names = "fck";
633 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
634 resets = <&cpg 218>;
635 #dma-cells = <1>;
636 dma-channels = <8>;
643 dmac2: dma-controller@e7310000 {
644 compatible = "renesas,dmac-r8a77995",
645 "renesas,rcar-dmac";
656 interrupt-names = "error",
660 clock-names = "fck";
661 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
662 resets = <&cpg 217>;
663 #dma-cells = <1>;
664 dma-channels = <8>;
672 compatible = "renesas,ipmmu-r8a77995";
674 renesas,ipmmu-main = <&ipmmu_mm 0>;
675 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
676 #iommu-cells = <1>;
680 compatible = "renesas,ipmmu-r8a77995";
682 renesas,ipmmu-main = <&ipmmu_mm 1>;
683 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
684 #iommu-cells = <1>;
688 compatible = "renesas,ipmmu-r8a77995";
690 renesas,ipmmu-main = <&ipmmu_mm 2>;
691 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
692 #iommu-cells = <1>;
696 compatible = "renesas,ipmmu-r8a77995";
700 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
701 #iommu-cells = <1>;
705 compatible = "renesas,ipmmu-r8a77995";
707 renesas,ipmmu-main = <&ipmmu_mm 4>;
708 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
709 #iommu-cells = <1>;
713 compatible = "renesas,ipmmu-r8a77995";
715 renesas,ipmmu-main = <&ipmmu_mm 6>;
716 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
717 #iommu-cells = <1>;
721 compatible = "renesas,ipmmu-r8a77995";
723 renesas,ipmmu-main = <&ipmmu_mm 10>;
724 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
725 #iommu-cells = <1>;
729 compatible = "renesas,ipmmu-r8a77995";
731 renesas,ipmmu-main = <&ipmmu_mm 12>;
732 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
733 #iommu-cells = <1>;
737 compatible = "renesas,ipmmu-r8a77995";
739 renesas,ipmmu-main = <&ipmmu_mm 14>;
740 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
741 #iommu-cells = <1>;
745 compatible = "renesas,ipmmu-r8a77995";
747 renesas,ipmmu-main = <&ipmmu_mm 16>;
748 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
749 #iommu-cells = <1>;
753 compatible = "renesas,etheravb-r8a77995",
754 "renesas,etheravb-rcar-gen3";
781 interrupt-names = "ch0", "ch1", "ch2", "ch3",
789 clock-names = "fck";
790 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
791 resets = <&cpg 812>;
792 phy-mode = "rgmii";
793 rx-internal-delay-ps = <1800>;
795 #address-cells = <1>;
796 #size-cells = <0>;
801 compatible = "renesas,can-r8a77995",
802 "renesas,rcar-gen3-can";
808 clock-names = "clkp1", "clkp2", "can_clk";
809 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
810 assigned-clock-rates = <40000000>;
811 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
812 resets = <&cpg 916>;
817 compatible = "renesas,can-r8a77995",
818 "renesas,rcar-gen3-can";
824 clock-names = "clkp1", "clkp2", "can_clk";
825 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
826 assigned-clock-rates = <40000000>;
827 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
828 resets = <&cpg 915>;
833 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
835 #pwm-cells = <2>;
837 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
838 resets = <&cpg 523>;
843 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
845 #pwm-cells = <2>;
847 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
848 resets = <&cpg 523>;
853 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
855 #pwm-cells = <2>;
857 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
858 resets = <&cpg 523>;
863 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
865 #pwm-cells = <2>;
867 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
868 resets = <&cpg 523>;
873 compatible = "renesas,scif-r8a77995",
874 "renesas,rcar-gen3-scif", "renesas,scif";
880 clock-names = "fck", "brg_int", "scif_clk";
883 dma-names = "tx", "rx", "tx", "rx";
884 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
885 resets = <&cpg 207>;
890 compatible = "renesas,scif-r8a77995",
891 "renesas,rcar-gen3-scif", "renesas,scif";
897 clock-names = "fck", "brg_int", "scif_clk";
900 dma-names = "tx", "rx", "tx", "rx";
901 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
902 resets = <&cpg 206>;
907 compatible = "renesas,scif-r8a77995",
908 "renesas,rcar-gen3-scif", "renesas,scif";
914 clock-names = "fck", "brg_int", "scif_clk";
917 dma-names = "tx", "rx", "tx", "rx";
918 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
919 resets = <&cpg 310>;
924 compatible = "renesas,scif-r8a77995",
925 "renesas,rcar-gen3-scif", "renesas,scif";
931 clock-names = "fck", "brg_int", "scif_clk";
933 dma-names = "tx", "rx";
934 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
935 resets = <&cpg 204>;
940 compatible = "renesas,scif-r8a77995",
941 "renesas,rcar-gen3-scif", "renesas,scif";
947 clock-names = "fck", "brg_int", "scif_clk";
949 dma-names = "tx", "rx";
950 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
951 resets = <&cpg 203>;
956 compatible = "renesas,scif-r8a77995",
957 "renesas,rcar-gen3-scif", "renesas,scif";
963 clock-names = "fck", "brg_int", "scif_clk";
966 dma-names = "tx", "rx", "tx", "rx";
967 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
968 resets = <&cpg 202>;
973 compatible = "renesas,msiof-r8a77995",
974 "renesas,rcar-gen3-msiof";
980 dma-names = "tx", "rx", "tx", "rx";
981 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
982 resets = <&cpg 211>;
983 #address-cells = <1>;
984 #size-cells = <0>;
989 compatible = "renesas,msiof-r8a77995",
990 "renesas,rcar-gen3-msiof";
996 dma-names = "tx", "rx", "tx", "rx";
997 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
998 resets = <&cpg 210>;
999 #address-cells = <1>;
1000 #size-cells = <0>;
1005 compatible = "renesas,msiof-r8a77995",
1006 "renesas,rcar-gen3-msiof";
1011 dma-names = "tx", "rx";
1012 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1013 resets = <&cpg 209>;
1014 #address-cells = <1>;
1015 #size-cells = <0>;
1020 compatible = "renesas,msiof-r8a77995",
1021 "renesas,rcar-gen3-msiof";
1026 dma-names = "tx", "rx";
1027 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1028 resets = <&cpg 208>;
1029 #address-cells = <1>;
1030 #size-cells = <0>;
1035 compatible = "renesas,vin-r8a77995";
1039 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1040 resets = <&cpg 807>;
1047 * #sound-dai-cells is required if simple-card
1049 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1050 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1053 * #clock-cells is required for audio_clkout0/1/2/3
1055 * clkout : #clock-cells = <0>; <&rcar_sound>;
1056 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1058 compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
1064 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1074 clock-names = "ssi-all",
1081 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1082 resets = <&cpg 1005>,
1084 reset-names = "ssi-all",
1089 ctu00: ctu-0 { };
1090 ctu01: ctu-1 { };
1091 ctu02: ctu-2 { };
1092 ctu03: ctu-3 { };
1093 ctu10: ctu-4 { };
1094 ctu11: ctu-5 { };
1095 ctu12: ctu-6 { };
1096 ctu13: ctu-7 { };
1100 dvc0: dvc-0 {
1102 dma-names = "tx";
1104 dvc1: dvc-1 {
1106 dma-names = "tx";
1111 mix0: mix-0 { };
1112 mix1: mix-1 { };
1116 src5: src-5 {
1119 dma-names = "rx", "tx";
1121 src6: src-6 {
1124 dma-names = "rx", "tx";
1129 ssi3: ssi-3 {
1133 dma-names = "rx", "tx", "rxu", "txu";
1135 ssi4: ssi-4 {
1139 dma-names = "rx", "tx", "rxu", "txu";
1145 compatible = "renesas,r8a77995-mlp",
1146 "renesas,rcar-gen3-mlp";
1151 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1152 resets = <&cpg 802>;
1156 audma0: dma-controller@ec700000 {
1157 compatible = "renesas,dmac-r8a77995",
1158 "renesas,rcar-dmac";
1177 interrupt-names = "error",
1183 clock-names = "fck";
1184 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1185 resets = <&cpg 502>;
1186 #dma-cells = <1>;
1187 dma-channels = <16>;
1199 compatible = "generic-ohci";
1204 phy-names = "usb";
1205 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1206 resets = <&cpg 703>, <&cpg 704>;
1211 compatible = "generic-ehci";
1216 phy-names = "usb";
1218 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1219 resets = <&cpg 703>, <&cpg 704>;
1223 usb2_phy0: usb-phy@ee080200 {
1224 compatible = "renesas,usb2-phy-r8a77995",
1225 "renesas,rcar-gen3-usb2-phy";
1229 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1230 resets = <&cpg 703>, <&cpg 704>;
1231 #phy-cells = <1>;
1236 compatible = "renesas,sdhi-r8a77995",
1237 "renesas,rcar-gen3-sdhi";
1241 clock-names = "core", "clkh";
1242 max-frequency = <200000000>;
1243 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1244 resets = <&cpg 312>;
1250 compatible = "renesas,r8a77995-rpc-if",
1251 "renesas,rcar-gen3-rpc-if";
1255 reg-names = "regs", "dirmap", "wbuf";
1258 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1259 resets = <&cpg 917>;
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1265 gic: interrupt-controller@f1010000 {
1266 compatible = "arm,gic-400";
1267 #interrupt-cells = <3>;
1268 #address-cells = <0>;
1269 interrupt-controller;
1277 clock-names = "clk";
1278 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1279 resets = <&cpg 408>;
1287 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1288 resets = <&cpg 627>;
1297 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1298 resets = <&cpg 623>;
1307 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1308 resets = <&cpg 622>;
1316 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1317 resets = <&cpg 607>;
1325 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1326 resets = <&cpg 603>;
1334 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1335 resets = <&cpg 602>;
1340 compatible = "renesas,r8a77995-cmm",
1341 "renesas,rcar-gen3-cmm";
1343 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1345 resets = <&cpg 711>;
1349 compatible = "renesas,r8a77995-cmm",
1350 "renesas,rcar-gen3-cmm";
1352 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1354 resets = <&cpg 710>;
1358 compatible = "renesas,du-r8a77995";
1363 clock-names = "du.0", "du.1";
1364 resets = <&cpg 724>;
1365 reset-names = "du.0";
1373 #address-cells = <1>;
1374 #size-cells = <0>;
1383 remote-endpoint = <&lvds0_in>;
1390 remote-endpoint = <&lvds1_in>;
1396 lvds0: lvds-encoder@feb90000 {
1397 compatible = "renesas,r8a77995-lvds";
1400 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1401 resets = <&cpg 727>;
1407 #address-cells = <1>;
1408 #size-cells = <0>;
1413 remote-endpoint = <&du_out_lvds0>;
1423 lvds1: lvds-encoder@feb90100 {
1424 compatible = "renesas,r8a77995-lvds";
1427 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1428 resets = <&cpg 726>;
1432 #address-cells = <1>;
1433 #size-cells = <0>;
1438 remote-endpoint = <&du_out_lvds1>;
1454 thermal-zones {
1455 cpu_thermal: cpu-thermal {
1456 polling-delay-passive = <250>;
1457 polling-delay = <1000>;
1458 thermal-sensors = <&thermal>;
1460 cooling-maps {
1464 cpu-crit {
1474 compatible = "arm,armv8-timer";
1475 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1479 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";