Lines Matching +full:0 +full:xfeb90000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
71 #size-cells = <0>;
73 a53_0: cpu@0 {
75 reg = <0>;
99 L2_CA53: cache-controller-0 {
109 CPU_SLEEP_0: cpu-sleep-0 {
111 arm,psci-suspend-param = <0x0010000>;
122 #clock-cells = <0>;
124 clock-frequency = <0>;
131 #clock-cells = <0>;
132 clock-frequency = <0>;
150 #clock-cells = <0>;
151 clock-frequency = <0>;
166 reg = <0 0xe6020000 0 0x0c>;
177 reg = <0 0xe6050000 0 0x50>;
181 gpio-ranges = <&pfc 0 0 18>;
192 reg = <0 0xe6051000 0 0x50>;
196 gpio-ranges = <&pfc 0 32 23>;
207 reg = <0 0xe6052000 0 0x50>;
211 gpio-ranges = <&pfc 0 64 26>;
222 reg = <0 0xe6053000 0 0x50>;
226 gpio-ranges = <&pfc 0 96 16>;
237 reg = <0 0xe6054000 0 0x50>;
241 gpio-ranges = <&pfc 0 128 11>;
252 reg = <0 0xe6055000 0 0x50>;
256 gpio-ranges = <&pfc 0 160 20>;
267 reg = <0 0xe6055400 0 0x50>;
271 gpio-ranges = <&pfc 0 192 18>;
281 reg = <0 0xe6060000 0 0x508>;
287 #size-cells = <0>;
291 reg = <0 0xe60b0000 0 0x425>;
296 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
304 reg = <0 0xe60f0000 0 0x1004>;
317 reg = <0 0xe6130000 0 0x1004>;
336 reg = <0 0xe6140000 0 0x1004>;
355 reg = <0 0xe6148000 0 0x1004>;
373 reg = <0 0xe6150000 0 0x1000>;
377 #power-domain-cells = <0>;
384 reg = <0 0xe6160000 0 0x0200>;
390 reg = <0 0xe6180000 0 0x0400>;
396 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
403 #thermal-sensor-cells = <0>;
410 reg = <0 0xe61c0000 0 0x200>;
411 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
424 reg = <0 0xe61e0000 0 0x30>;
438 reg = <0 0xe6fc0000 0 0x30>;
453 reg = <0 0xe6fd0000 0 0x30>;
468 reg = <0 0xe6fe0000 0 0x30>;
482 reg = <0 0xffc00000 0 0x30>;
496 #size-cells = <0>;
499 reg = <0 0xe6500000 0 0x40>;
504 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
505 <&dmac2 0x91>, <&dmac2 0x90>;
513 #size-cells = <0>;
516 reg = <0 0xe6508000 0 0x40>;
521 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
522 <&dmac2 0x93>, <&dmac2 0x92>;
530 #size-cells = <0>;
533 reg = <0 0xe6510000 0 0x40>;
538 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
539 <&dmac2 0x95>, <&dmac2 0x94>;
547 #size-cells = <0>;
550 reg = <0 0xe66d0000 0 0x40>;
555 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
563 #size-cells = <0>;
566 reg = <0 0xe66d8000 0 0x40>;
571 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
579 #size-cells = <0>;
582 reg = <0 0xe66e0000 0 0x40>;
587 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
595 #size-cells = <0>;
598 reg = <0 0xe66e8000 0 0x40>;
603 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
611 #size-cells = <0>;
614 reg = <0 0xe6690000 0 0x40>;
627 reg = <0 0xe6540000 0 0x60>;
633 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
634 <&dmac2 0x31>, <&dmac2 0x30>;
645 reg = <0 0xe6550000 0 0x60>;
651 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
652 <&dmac2 0x33>, <&dmac2 0x32>;
663 reg = <0 0xe6560000 0 0x60>;
669 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
670 <&dmac2 0x35>, <&dmac2 0x34>;
681 reg = <0 0xe66a0000 0 0x60>;
687 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
698 reg = <0 0xe66b0000 0 0x60>;
704 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
714 reg = <0 0xe6590000 0 0x200>;
717 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
718 <&usb_dmac1 0>, <&usb_dmac1 1>;
731 reg = <0 0xe65a0000 0 0x100>;
745 reg = <0 0xe65b0000 0 0x100>;
759 reg = <0x0 0xe6601000 0 0x1000>;
768 reg = <0 0xe6700000 0 0x10000>;
797 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
810 reg = <0 0xe7300000 0 0x10000>;
839 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
852 reg = <0 0xe7310000 0 0x10000>;
893 reg = <0 0xe6740000 0 0x1000>;
894 renesas,ipmmu-main = <&ipmmu_mm 0>;
901 reg = <0 0xe7740000 0 0x1000>;
909 reg = <0 0xe6570000 0 0x1000>;
917 reg = <0 0xe67b0000 0 0x1000>;
926 reg = <0 0xec670000 0 0x1000>;
934 reg = <0 0xfd800000 0 0x1000>;
942 reg = <0 0xffc80000 0 0x1000>;
950 reg = <0 0xfe6b0000 0 0x1000>;
958 reg = <0 0xfebd0000 0 0x1000>;
966 reg = <0 0xfe990000 0 0x1000>;
975 reg = <0 0xe6800000 0 0x800>;
1013 rx-internal-delay-ps = <0>;
1016 #size-cells = <0>;
1023 reg = <0 0xe6c30000 0 0x1000>;
1039 reg = <0 0xe6c38000 0 0x1000>;
1055 reg = <0 0xe66c0000 0 0x8000>;
1080 reg = <0 0xe6e30000 0 0x8>;
1090 reg = <0 0xe6e31000 0 0x8>;
1100 reg = <0 0xe6e32000 0 0x8>;
1110 reg = <0 0xe6e33000 0 0x8>;
1120 reg = <0 0xe6e34000 0 0x8>;
1130 reg = <0 0xe6e35000 0 0x8>;
1140 reg = <0 0xe6e36000 0 0x8>;
1151 reg = <0 0xe6e60000 0 64>;
1157 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1158 <&dmac2 0x51>, <&dmac2 0x50>;
1168 reg = <0 0xe6e68000 0 64>;
1174 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1175 <&dmac2 0x53>, <&dmac2 0x52>;
1185 reg = <0 0xe6e88000 0 64>;
1191 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1192 <&dmac2 0x13>, <&dmac2 0x12>;
1202 reg = <0 0xe6c50000 0 64>;
1208 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1218 reg = <0 0xe6c40000 0 64>;
1224 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1234 reg = <0 0xe6f30000 0 64>;
1240 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1250 reg = <0 0xe6e90000 0 0x0064>;
1253 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1254 <&dmac2 0x41>, <&dmac2 0x40>;
1259 #size-cells = <0>;
1266 reg = <0 0xe6ea0000 0 0x0064>;
1269 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1274 #size-cells = <0>;
1281 reg = <0 0xe6c00000 0 0x0064>;
1284 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1289 #size-cells = <0>;
1296 reg = <0 0xe6c10000 0 0x0064>;
1299 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1304 #size-cells = <0>;
1310 reg = <0 0xe6ef4000 0 0x1000>;
1320 #size-cells = <0>;
1324 #size-cells = <0>;
1338 reg = <0 0xe6ef5000 0 0x1000>;
1348 #size-cells = <0>;
1352 #size-cells = <0>;
1367 reg = <0 0xe6f40000 0 0x84>;
1371 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1382 reg = <0 0xe6f50000 0 0x84>;
1386 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1397 reg = <0 0xe6f60000 0 0x84>;
1401 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1412 reg = <0 0xe6f70000 0 0x84>;
1416 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1427 reg = <0 0xe6f80000 0 0x84>;
1431 dmas = <&dmac0 0x28>;
1442 reg = <0 0xe6f90000 0 0x84>;
1446 dmas = <&dmac0 0x2a>;
1457 reg = <0 0xe6fa0000 0 0x84>;
1461 dmas = <&dmac0 0x2c>;
1472 reg = <0 0xe6fb0000 0 0x84>;
1476 dmas = <&dmac0 0x2e>;
1488 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1494 * clkout : #clock-cells = <0>; <&rcar_sound>;
1498 reg = <0 0xec500000 0 0x1000>, /* SCU */
1499 <0 0xec5a0000 0 0x100>, /* ADG */
1500 <0 0xec540000 0 0x1000>, /* SSIU */
1501 <0 0xec541000 0 0x280>, /* SSI */
1502 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1525 "ssi.1", "ssi.0",
1528 "src.1", "src.0",
1529 "mix.1", "mix.0",
1530 "ctu.1", "ctu.0",
1531 "dvc.0", "dvc.1",
1543 "ssi.1", "ssi.0";
1547 ctu00: ctu-0 { };
1558 dvc0: dvc-0 {
1559 dmas = <&audma0 0xbc>;
1563 dmas = <&audma0 0xbe>;
1569 mix0: mix-0 { };
1574 src0: src-0 {
1576 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1581 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1586 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1591 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1596 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1601 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1606 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1611 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1616 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1621 dmas = <&audma0 0x97>, <&audma0 0xba>;
1627 ssi0: ssi-0 {
1629 dmas = <&audma0 0x01>, <&audma0 0x02>,
1630 <&audma0 0x15>, <&audma0 0x16>;
1635 dmas = <&audma0 0x03>, <&audma0 0x04>,
1636 <&audma0 0x49>, <&audma0 0x4a>;
1641 dmas = <&audma0 0x05>, <&audma0 0x06>,
1642 <&audma0 0x63>, <&audma0 0x64>;
1647 dmas = <&audma0 0x07>, <&audma0 0x08>,
1648 <&audma0 0x6f>, <&audma0 0x70>;
1653 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1654 <&audma0 0x71>, <&audma0 0x72>;
1659 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1660 <&audma0 0x73>, <&audma0 0x74>;
1665 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1666 <&audma0 0x75>, <&audma0 0x76>;
1671 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1672 <&audma0 0x79>, <&audma0 0x7a>;
1677 dmas = <&audma0 0x11>, <&audma0 0x12>,
1678 <&audma0 0x7b>, <&audma0 0x7c>;
1683 dmas = <&audma0 0x13>, <&audma0 0x14>,
1684 <&audma0 0x7d>, <&audma0 0x7e>;
1693 reg = <0 0xec520000 0 0x800>;
1705 reg = <0 0xec700000 0 0x10000>;
1734 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1747 reg = <0 0xee000000 0 0xc00>;
1758 reg = <0 0xee020000 0 0x400>;
1768 reg = <0 0xee080000 0 0x100>;
1780 reg = <0 0xee080100 0 0x100>;
1794 reg = <0 0xee080200 0 0x700>;
1806 reg = <0 0xee100000 0 0x2000>;
1820 reg = <0 0xee120000 0 0x2000>;
1834 reg = <0 0xee160000 0 0x2000>;
1848 reg = <0 0xee200000 0 0x200>,
1849 <0 0x08000000 0 0x04000000>,
1850 <0 0xee208000 0 0x100>;
1857 #size-cells = <0>;
1864 #address-cells = <0>;
1866 reg = <0x0 0xf1010000 0 0x1000>,
1867 <0x0 0xf1020000 0 0x20000>,
1868 <0x0 0xf1040000 0 0x20000>,
1869 <0x0 0xf1060000 0 0x20000>;
1881 reg = <0 0xfe000000 0 0x80000>;
1884 bus-range = <0x00 0xff>;
1886 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1887 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1888 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1889 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1891 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1896 interrupt-map-mask = <0 0 0 0>;
1897 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1902 iommu-map = <0 &ipmmu_hc 0 1>;
1903 iommu-map-mask = <0>;
1909 reg = <0 0xfe960000 0 0x8000>;
1919 reg = <0 0xfe96f000 0 0x200>;
1928 reg = <0 0xfe9a0000 0 0x8000>;
1938 reg = <0 0xfe9af000 0 0x200>;
1947 reg = <0 0xfea20000 0 0x7000>;
1957 reg = <0 0xfea27000 0 0x200>;
1966 reg = <0 0xfea28000 0 0x7000>;
1976 reg = <0 0xfea2f000 0 0x200>;
1986 reg = <0 0xfea40000 0 0x1000>;
1995 reg = <0 0xfea50000 0 0x1000>;
2003 reg = <0 0xfeaa0000 0 0x10000>;
2012 #size-cells = <0>;
2014 port@0 {
2015 reg = <0>;
2020 #size-cells = <0>;
2024 csi40vin4: endpoint@0 {
2025 reg = <0>;
2038 reg = <0 0xfeb00000 0 0x40000>;
2042 clock-names = "du.0", "du.1";
2044 reset-names = "du.0";
2047 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2053 #size-cells = <0>;
2055 port@0 {
2056 reg = <0>;
2077 reg = <0 0xfeb90000 0 0x20>;
2087 #size-cells = <0>;
2089 port@0 {
2090 reg = <0>;
2104 reg = <0 0xfeb90100 0 0x20>;
2112 #size-cells = <0>;
2114 port@0 {
2115 reg = <0>;
2129 reg = <0 0xfff00044 0 4>;
2137 polling-delay = <0>;
2144 cooling-device = <&a53_0 0 2>;