Lines Matching +full:0 +full:xe6160000
18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
67 #size-cells = <0>;
69 a53_0: cpu@0 {
71 reg = <0>;
95 L2_CA53: cache-controller-0 {
105 CPU_SLEEP_0: cpu-sleep-0 {
107 arm,psci-suspend-param = <0x0010000>;
118 #clock-cells = <0>;
120 clock-frequency = <0>;
126 #clock-cells = <0>;
127 clock-frequency = <0>;
145 #clock-cells = <0>;
146 clock-frequency = <0>;
159 reg = <0 0xe6020000 0 0x0c>;
170 reg = <0 0xe6050000 0 0x50>;
174 gpio-ranges = <&pfc 0 0 18>;
185 reg = <0 0xe6051000 0 0x50>;
189 gpio-ranges = <&pfc 0 32 23>;
200 reg = <0 0xe6052000 0 0x50>;
204 gpio-ranges = <&pfc 0 64 26>;
215 reg = <0 0xe6053000 0 0x50>;
219 gpio-ranges = <&pfc 0 96 16>;
230 reg = <0 0xe6054000 0 0x50>;
234 gpio-ranges = <&pfc 0 128 11>;
245 reg = <0 0xe6055000 0 0x50>;
249 gpio-ranges = <&pfc 0 160 20>;
260 reg = <0 0xe6055400 0 0x50>;
264 gpio-ranges = <&pfc 0 192 18>;
274 reg = <0 0xe6060000 0 0x508>;
279 #size-cells = <0>;
283 reg = <0 0xe60b0000 0 0x425>;
288 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
296 reg = <0 0xe60f0000 0 0x1004>;
309 reg = <0 0xe6130000 0 0x1004>;
328 reg = <0 0xe6140000 0 0x1004>;
347 reg = <0 0xe6148000 0 0x1004>;
365 reg = <0 0xe6150000 0 0x1000>;
369 #power-domain-cells = <0>;
375 reg = <0 0xe6160000 0 0x0200>;
380 reg = <0 0xe6180000 0 0x0400>;
386 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
393 #thermal-sensor-cells = <0>;
400 reg = <0 0xe61c0000 0 0x200>;
401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
414 reg = <0 0xe61e0000 0 0x30>;
428 reg = <0 0xe6fc0000 0 0x30>;
443 reg = <0 0xe6fd0000 0 0x30>;
458 reg = <0 0xe6fe0000 0 0x30>;
472 reg = <0 0xffc00000 0 0x30>;
486 #size-cells = <0>;
489 reg = <0 0xe6500000 0 0x40>;
494 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, <&dmac2 0x90>;
503 #size-cells = <0>;
506 reg = <0 0xe6508000 0 0x40>;
511 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, <&dmac2 0x92>;
520 #size-cells = <0>;
523 reg = <0 0xe6510000 0 0x40>;
528 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, <&dmac2 0x94>;
537 #size-cells = <0>;
540 reg = <0 0xe66d0000 0 0x40>;
545 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
553 #size-cells = <0>;
556 reg = <0 0xe66d8000 0 0x40>;
561 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
569 #size-cells = <0>;
572 reg = <0 0xe66e0000 0 0x40>;
577 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
585 #size-cells = <0>;
588 reg = <0 0xe66e8000 0 0x40>;
593 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
601 #size-cells = <0>;
604 reg = <0 0xe6690000 0 0x40>;
617 reg = <0 0xe6540000 0 0x60>;
623 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
624 <&dmac2 0x31>, <&dmac2 0x30>;
635 reg = <0 0xe6550000 0 0x60>;
641 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
642 <&dmac2 0x33>, <&dmac2 0x32>;
653 reg = <0 0xe6560000 0 0x60>;
659 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
660 <&dmac2 0x35>, <&dmac2 0x34>;
671 reg = <0 0xe66a0000 0 0x60>;
677 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
688 reg = <0 0xe66b0000 0 0x60>;
694 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
704 reg = <0 0xe6590000 0 0x200>;
707 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
708 <&usb_dmac1 0>, <&usb_dmac1 1>;
721 reg = <0 0xe65a0000 0 0x100>;
735 reg = <0 0xe65b0000 0 0x100>;
749 reg = <0x0 0xe6601000 0 0x1000>;
758 reg = <0 0xe6700000 0 0x10000>;
787 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
800 reg = <0 0xe7300000 0 0x10000>;
829 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
842 reg = <0 0xe7310000 0 0x10000>;
883 reg = <0 0xe6740000 0 0x1000>;
884 renesas,ipmmu-main = <&ipmmu_mm 0>;
891 reg = <0 0xe7740000 0 0x1000>;
899 reg = <0 0xe6570000 0 0x1000>;
907 reg = <0 0xe67b0000 0 0x1000>;
916 reg = <0 0xec670000 0 0x1000>;
924 reg = <0 0xfd800000 0 0x1000>;
932 reg = <0 0xffc80000 0 0x1000>;
940 reg = <0 0xfe6b0000 0 0x1000>;
948 reg = <0 0xfebd0000 0 0x1000>;
956 reg = <0 0xfe990000 0 0x1000>;
965 reg = <0 0xe6800000 0 0x800>;
1003 rx-internal-delay-ps = <0>;
1006 #size-cells = <0>;
1013 reg = <0 0xe6c30000 0 0x1000>;
1029 reg = <0 0xe6c38000 0 0x1000>;
1045 reg = <0 0xe66c0000 0 0x8000>;
1070 reg = <0 0xe6e30000 0 0x8>;
1080 reg = <0 0xe6e31000 0 0x8>;
1090 reg = <0 0xe6e32000 0 0x8>;
1100 reg = <0 0xe6e33000 0 0x8>;
1110 reg = <0 0xe6e34000 0 0x8>;
1120 reg = <0 0xe6e35000 0 0x8>;
1130 reg = <0 0xe6e36000 0 0x8>;
1141 reg = <0 0xe6e60000 0 64>;
1147 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1148 <&dmac2 0x51>, <&dmac2 0x50>;
1158 reg = <0 0xe6e68000 0 64>;
1164 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1165 <&dmac2 0x53>, <&dmac2 0x52>;
1175 reg = <0 0xe6e88000 0 64>;
1181 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1182 <&dmac2 0x13>, <&dmac2 0x12>;
1192 reg = <0 0xe6c50000 0 64>;
1198 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1208 reg = <0 0xe6c40000 0 64>;
1214 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1224 reg = <0 0xe6f30000 0 64>;
1230 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1240 reg = <0 0xe6e90000 0 0x0064>;
1243 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1244 <&dmac2 0x41>, <&dmac2 0x40>;
1249 #size-cells = <0>;
1256 reg = <0 0xe6ea0000 0 0x0064>;
1259 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1264 #size-cells = <0>;
1271 reg = <0 0xe6c00000 0 0x0064>;
1274 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1279 #size-cells = <0>;
1286 reg = <0 0xe6c10000 0 0x0064>;
1289 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1294 #size-cells = <0>;
1300 reg = <0 0xe6ef4000 0 0x1000>;
1310 #size-cells = <0>;
1314 #size-cells = <0>;
1328 reg = <0 0xe6ef5000 0 0x1000>;
1338 #size-cells = <0>;
1342 #size-cells = <0>;
1357 reg = <0 0xe6f40000 0 0x84>;
1361 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1372 reg = <0 0xe6f50000 0 0x84>;
1376 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1387 reg = <0 0xe6f60000 0 0x84>;
1391 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1402 reg = <0 0xe6f70000 0 0x84>;
1406 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1417 reg = <0 0xe6f80000 0 0x84>;
1421 dmas = <&dmac0 0x28>;
1432 reg = <0 0xe6f90000 0 0x84>;
1436 dmas = <&dmac0 0x2a>;
1447 reg = <0 0xe6fa0000 0 0x84>;
1451 dmas = <&dmac0 0x2c>;
1462 reg = <0 0xe6fb0000 0 0x84>;
1466 dmas = <&dmac0 0x2e>;
1478 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1484 * clkout : #clock-cells = <0>; <&rcar_sound>;
1488 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1515 "ssi.1", "ssi.0",
1518 "src.1", "src.0",
1519 "mix.1", "mix.0",
1520 "ctu.1", "ctu.0",
1521 "dvc.0", "dvc.1",
1533 "ssi.1", "ssi.0";
1537 ctu00: ctu-0 { };
1548 dvc0: dvc-0 {
1549 dmas = <&audma0 0xbc>;
1553 dmas = <&audma0 0xbe>;
1559 mix0: mix-0 { };
1564 src0: src-0 {
1566 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1571 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1576 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1581 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1586 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1591 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1596 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1601 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1606 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1611 dmas = <&audma0 0x97>, <&audma0 0xba>;
1617 ssi0: ssi-0 {
1619 dmas = <&audma0 0x01>, <&audma0 0x02>,
1620 <&audma0 0x15>, <&audma0 0x16>;
1625 dmas = <&audma0 0x03>, <&audma0 0x04>,
1626 <&audma0 0x49>, <&audma0 0x4a>;
1631 dmas = <&audma0 0x05>, <&audma0 0x06>,
1632 <&audma0 0x63>, <&audma0 0x64>;
1637 dmas = <&audma0 0x07>, <&audma0 0x08>,
1638 <&audma0 0x6f>, <&audma0 0x70>;
1643 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1644 <&audma0 0x71>, <&audma0 0x72>;
1649 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1650 <&audma0 0x73>, <&audma0 0x74>;
1655 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1656 <&audma0 0x75>, <&audma0 0x76>;
1661 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1662 <&audma0 0x79>, <&audma0 0x7a>;
1667 dmas = <&audma0 0x11>, <&audma0 0x12>,
1668 <&audma0 0x7b>, <&audma0 0x7c>;
1673 dmas = <&audma0 0x13>, <&audma0 0x14>,
1674 <&audma0 0x7d>, <&audma0 0x7e>;
1683 reg = <0 0xec520000 0 0x800>;
1695 reg = <0 0xec700000 0 0x10000>;
1724 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1737 reg = <0 0xee000000 0 0xc00>;
1748 reg = <0 0xee020000 0 0x400>;
1758 reg = <0 0xee080000 0 0x100>;
1770 reg = <0 0xee080100 0 0x100>;
1784 reg = <0 0xee080200 0 0x700>;
1796 reg = <0 0xee100000 0 0x2000>;
1810 reg = <0 0xee120000 0 0x2000>;
1824 reg = <0 0xee160000 0 0x2000>;
1838 reg = <0 0xee200000 0 0x200>,
1839 <0 0x08000000 0 0x04000000>,
1840 <0 0xee208000 0 0x100>;
1847 #size-cells = <0>;
1854 #address-cells = <0>;
1856 reg = <0x0 0xf1010000 0 0x1000>,
1857 <0x0 0xf1020000 0 0x20000>,
1858 <0x0 0xf1040000 0 0x20000>,
1859 <0x0 0xf1060000 0 0x20000>;
1871 reg = <0 0xfe000000 0 0x80000>;
1874 bus-range = <0x00 0xff>;
1876 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1877 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1878 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1879 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1881 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1886 interrupt-map-mask = <0 0 0 0>;
1887 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1892 iommu-map = <0 &ipmmu_hc 0 1>;
1893 iommu-map-mask = <0>;
1899 reg = <0 0xfe960000 0 0x8000>;
1909 reg = <0 0xfe96f000 0 0x200>;
1918 reg = <0 0xfe9a0000 0 0x8000>;
1928 reg = <0 0xfe9af000 0 0x200>;
1937 reg = <0 0xfea20000 0 0x7000>;
1947 reg = <0 0xfea27000 0 0x200>;
1956 reg = <0 0xfea28000 0 0x7000>;
1966 reg = <0 0xfea2f000 0 0x200>;
1976 reg = <0 0xfea40000 0 0x1000>;
1985 reg = <0 0xfea50000 0 0x1000>;
1993 reg = <0 0xfeaa0000 0 0x10000>;
2002 #size-cells = <0>;
2004 port@0 {
2005 reg = <0>;
2010 #size-cells = <0>;
2014 csi40vin4: endpoint@0 {
2015 reg = <0>;
2028 reg = <0 0xfeb00000 0 0x40000>;
2032 clock-names = "du.0", "du.1";
2034 reset-names = "du.0";
2037 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2043 #size-cells = <0>;
2045 port@0 {
2046 reg = <0>;
2067 reg = <0 0xfeb90000 0 0x20>;
2077 #size-cells = <0>;
2079 port@0 {
2080 reg = <0>;
2094 reg = <0 0xfeb90100 0 0x20>;
2102 #size-cells = <0>;
2104 port@0 {
2105 reg = <0>;
2119 reg = <0 0xfff00044 0 4>;
2126 polling-delay = <0>;
2133 cooling-device = <&a53_0 0 2>;