Lines Matching +full:power +full:- +full:domains
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
19 /* External CAN clock - to be overridden by boards that provide it */
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <0>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 compatible = "arm,cortex-a53";
35 power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
36 next-level-cache = <&L2_CA53>;
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
45 power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
46 next-level-cache = <&L2_CA53>;
47 enable-method = "psci";
52 compatible = "arm,cortex-a53";
55 power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
56 next-level-cache = <&L2_CA53>;
57 enable-method = "psci";
62 compatible = "arm,cortex-a53";
65 power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
66 next-level-cache = <&L2_CA53>;
67 enable-method = "psci";
70 L2_CA53: cache-controller {
72 power-domains = <&sysc R8A77980_PD_CA53_SCU>;
73 cache-unified;
74 cache-level = <2>;
79 compatible = "fixed-clock";
80 #clock-cells = <0>;
82 clock-frequency = <0>;
83 bootph-all;
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
90 clock-frequency = <0>;
91 bootph-all;
94 /* External PCIe clock - can be overridden by the board */
96 compatible = "fixed-clock";
97 #clock-cells = <0>;
98 clock-frequency = <0>;
102 compatible = "arm,cortex-a53-pmu";
103 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
107 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
111 compatible = "arm,psci-1.0", "arm,psci-0.2";
115 /* External SCIF clock - to be overridden by boards that provide it */
117 compatible = "fixed-clock";
118 #clock-cells = <0>;
119 clock-frequency = <0>;
123 compatible = "simple-bus";
124 interrupt-parent = <&gic>;
125 bootph-all;
127 #address-cells = <2>;
128 #size-cells = <2>;
132 compatible = "renesas,r8a77980-wdt",
133 "renesas,rcar-gen3-wdt";
137 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
143 compatible = "renesas,gpio-r8a77980",
144 "renesas,rcar-gen3-gpio";
147 #gpio-cells = <2>;
148 gpio-controller;
149 gpio-ranges = <&pfc 0 0 22>;
150 #interrupt-cells = <2>;
151 interrupt-controller;
153 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
158 compatible = "renesas,gpio-r8a77980",
159 "renesas,rcar-gen3-gpio";
162 #gpio-cells = <2>;
163 gpio-controller;
164 gpio-ranges = <&pfc 0 32 28>;
165 #interrupt-cells = <2>;
166 interrupt-controller;
168 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
173 compatible = "renesas,gpio-r8a77980",
174 "renesas,rcar-gen3-gpio";
177 #gpio-cells = <2>;
178 gpio-controller;
179 gpio-ranges = <&pfc 0 64 30>;
180 #interrupt-cells = <2>;
181 interrupt-controller;
183 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
188 compatible = "renesas,gpio-r8a77980",
189 "renesas,rcar-gen3-gpio";
192 #gpio-cells = <2>;
193 gpio-controller;
194 gpio-ranges = <&pfc 0 96 17>;
195 #interrupt-cells = <2>;
196 interrupt-controller;
198 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
203 compatible = "renesas,gpio-r8a77980",
204 "renesas,rcar-gen3-gpio";
207 #gpio-cells = <2>;
208 gpio-controller;
209 gpio-ranges = <&pfc 0 128 25>;
210 #interrupt-cells = <2>;
211 interrupt-controller;
213 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
218 compatible = "renesas,gpio-r8a77980",
219 "renesas,rcar-gen3-gpio";
222 #gpio-cells = <2>;
223 gpio-controller;
224 gpio-ranges = <&pfc 0 160 15>;
225 #interrupt-cells = <2>;
226 interrupt-controller;
228 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
233 compatible = "renesas,pfc-r8a77980";
235 bootph-all;
239 compatible = "renesas,r8a77980-cmt0",
240 "renesas,rcar-gen3-cmt0";
245 clock-names = "fck";
246 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
252 compatible = "renesas,r8a77980-cmt1",
253 "renesas,rcar-gen3-cmt1";
264 clock-names = "fck";
265 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
271 compatible = "renesas,r8a77980-cmt1",
272 "renesas,rcar-gen3-cmt1";
283 clock-names = "fck";
284 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
290 compatible = "renesas,r8a77980-cmt1",
291 "renesas,rcar-gen3-cmt1";
302 clock-names = "fck";
303 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
308 cpg: clock-controller@e6150000 {
309 compatible = "renesas,r8a77980-cpg-mssr";
312 clock-names = "extal", "extalr";
313 #clock-cells = <2>;
314 #power-domain-cells = <0>;
315 #reset-cells = <1>;
316 bootph-all;
319 rst: reset-controller@e6160000 {
320 compatible = "renesas,r8a77980-rst";
322 bootph-all;
325 sysc: system-controller@e6180000 {
326 compatible = "renesas,r8a77980-sysc";
328 #power-domain-cells = <1>;
332 compatible = "renesas,r8a77980-thermal";
339 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
341 #thermal-sensor-cells = <1>;
344 intc_ex: interrupt-controller@e61c0000 {
345 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
346 #interrupt-cells = <2>;
347 interrupt-controller;
356 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
361 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
366 interrupt-names = "tuni0", "tuni1", "tuni2";
368 clock-names = "fck";
369 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
375 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
381 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
383 clock-names = "fck";
384 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
390 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
396 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
398 clock-names = "fck";
399 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
405 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
411 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
413 clock-names = "fck";
414 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
420 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
426 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
428 clock-names = "fck";
429 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
435 compatible = "renesas,i2c-r8a77980",
436 "renesas,rcar-gen3-i2c";
440 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
444 dma-names = "tx", "rx", "tx", "rx";
445 i2c-scl-internal-delay-ns = <6>;
446 #address-cells = <1>;
447 #size-cells = <0>;
452 compatible = "renesas,i2c-r8a77980",
453 "renesas,rcar-gen3-i2c";
457 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
461 dma-names = "tx", "rx", "tx", "rx";
462 i2c-scl-internal-delay-ns = <6>;
463 #address-cells = <1>;
464 #size-cells = <0>;
469 compatible = "renesas,i2c-r8a77980",
470 "renesas,rcar-gen3-i2c";
474 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
478 dma-names = "tx", "rx", "tx", "rx";
479 i2c-scl-internal-delay-ns = <6>;
480 #address-cells = <1>;
481 #size-cells = <0>;
486 compatible = "renesas,i2c-r8a77980",
487 "renesas,rcar-gen3-i2c";
491 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
493 i2c-scl-internal-delay-ns = <6>;
494 #address-cells = <1>;
495 #size-cells = <0>;
500 compatible = "renesas,i2c-r8a77980",
501 "renesas,rcar-gen3-i2c";
505 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
507 i2c-scl-internal-delay-ns = <6>;
508 #address-cells = <1>;
509 #size-cells = <0>;
514 compatible = "renesas,i2c-r8a77980",
515 "renesas,rcar-gen3-i2c";
519 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
523 dma-names = "tx", "rx", "tx", "rx";
524 i2c-scl-internal-delay-ns = <6>;
525 #address-cells = <1>;
526 #size-cells = <0>;
531 compatible = "renesas,hscif-r8a77980",
532 "renesas,rcar-gen3-hscif",
539 clock-names = "fck", "brg_int", "scif_clk";
542 dma-names = "tx", "rx", "tx", "rx";
543 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
549 compatible = "renesas,hscif-r8a77980",
550 "renesas,rcar-gen3-hscif",
557 clock-names = "fck", "brg_int", "scif_clk";
560 dma-names = "tx", "rx", "tx", "rx";
561 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
567 compatible = "renesas,hscif-r8a77980",
568 "renesas,rcar-gen3-hscif",
575 clock-names = "fck", "brg_int", "scif_clk";
578 dma-names = "tx", "rx", "tx", "rx";
579 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
585 compatible = "renesas,hscif-r8a77980",
586 "renesas,rcar-gen3-hscif",
593 clock-names = "fck", "brg_int", "scif_clk";
596 dma-names = "tx", "rx", "tx", "rx";
597 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
602 pcie_phy: pcie-phy@e65d0000 {
603 compatible = "renesas,r8a77980-pcie-phy";
605 #phy-cells = <0>;
607 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
613 compatible = "renesas,r8a77980-canfd",
614 "renesas,rcar-gen3-canfd";
618 interrupt-names = "ch_int", "g_int";
622 clock-names = "fck", "canfd", "can_clk";
623 assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
624 assigned-clock-rates = <40000000>;
625 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
639 compatible = "renesas,etheravb-r8a77980",
640 "renesas,etheravb-rcar-gen3";
667 interrupt-names = "ch0", "ch1", "ch2", "ch3",
675 clock-names = "fck";
676 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
678 phy-mode = "rgmii";
679 rx-internal-delay-ps = <0>;
680 tx-internal-delay-ps = <2000>;
682 #address-cells = <1>;
683 #size-cells = <0>;
688 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
690 #pwm-cells = <2>;
692 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
698 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
700 #pwm-cells = <2>;
702 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
708 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
710 #pwm-cells = <2>;
712 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
718 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
720 #pwm-cells = <2>;
722 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
728 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
730 #pwm-cells = <2>;
732 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
738 compatible = "renesas,scif-r8a77980",
739 "renesas,rcar-gen3-scif",
746 clock-names = "fck", "brg_int", "scif_clk";
749 dma-names = "tx", "rx", "tx", "rx";
750 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
756 compatible = "renesas,scif-r8a77980",
757 "renesas,rcar-gen3-scif",
764 clock-names = "fck", "brg_int", "scif_clk";
767 dma-names = "tx", "rx", "tx", "rx";
768 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
774 compatible = "renesas,scif-r8a77980",
775 "renesas,rcar-gen3-scif",
782 clock-names = "fck", "brg_int", "scif_clk";
785 dma-names = "tx", "rx", "tx", "rx";
786 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
792 compatible = "renesas,scif-r8a77980",
793 "renesas,rcar-gen3-scif",
800 clock-names = "fck", "brg_int", "scif_clk";
803 dma-names = "tx", "rx", "tx", "rx";
804 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
810 compatible = "renesas,tpu-r8a77980", "renesas,tpu";
814 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
816 #pwm-cells = <3>;
821 compatible = "renesas,msiof-r8a77980",
822 "renesas,rcar-gen3-msiof";
826 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
828 #address-cells = <1>;
829 #size-cells = <0>;
834 compatible = "renesas,msiof-r8a77980",
835 "renesas,rcar-gen3-msiof";
839 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
841 #address-cells = <1>;
842 #size-cells = <0>;
847 compatible = "renesas,msiof-r8a77980",
848 "renesas,rcar-gen3-msiof";
852 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
854 #address-cells = <1>;
855 #size-cells = <0>;
860 compatible = "renesas,msiof-r8a77980",
861 "renesas,rcar-gen3-msiof";
865 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
867 #address-cells = <1>;
868 #size-cells = <0>;
873 compatible = "renesas,vin-r8a77980";
877 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
883 #address-cells = <1>;
884 #size-cells = <0>;
887 #address-cells = <1>;
888 #size-cells = <0>;
894 remote-endpoint = <&csi40vin0>;
901 compatible = "renesas,vin-r8a77980";
905 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
911 #address-cells = <1>;
912 #size-cells = <0>;
915 #address-cells = <1>;
916 #size-cells = <0>;
922 remote-endpoint = <&csi40vin1>;
929 compatible = "renesas,vin-r8a77980";
933 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
939 #address-cells = <1>;
940 #size-cells = <0>;
943 #address-cells = <1>;
944 #size-cells = <0>;
950 remote-endpoint = <&csi40vin2>;
957 compatible = "renesas,vin-r8a77980";
961 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
967 #address-cells = <1>;
968 #size-cells = <0>;
971 #address-cells = <1>;
972 #size-cells = <0>;
978 remote-endpoint = <&csi40vin3>;
985 compatible = "renesas,vin-r8a77980";
989 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
995 #address-cells = <1>;
996 #size-cells = <0>;
999 #address-cells = <1>;
1000 #size-cells = <0>;
1006 remote-endpoint = <&csi41vin4>;
1013 compatible = "renesas,vin-r8a77980";
1017 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1023 #address-cells = <1>;
1024 #size-cells = <0>;
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1034 remote-endpoint = <&csi41vin5>;
1041 compatible = "renesas,vin-r8a77980";
1045 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1051 #address-cells = <1>;
1052 #size-cells = <0>;
1055 #address-cells = <1>;
1056 #size-cells = <0>;
1062 remote-endpoint = <&csi41vin6>;
1069 compatible = "renesas,vin-r8a77980";
1073 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1079 #address-cells = <1>;
1080 #size-cells = <0>;
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1090 remote-endpoint = <&csi41vin7>;
1097 compatible = "renesas,vin-r8a77980";
1101 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1108 compatible = "renesas,vin-r8a77980";
1112 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1119 compatible = "renesas,vin-r8a77980";
1123 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1130 compatible = "renesas,vin-r8a77980";
1134 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1141 compatible = "renesas,vin-r8a77980";
1145 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1152 compatible = "renesas,vin-r8a77980";
1156 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1163 compatible = "renesas,vin-r8a77980";
1167 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1174 compatible = "renesas,vin-r8a77980";
1178 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1184 dmac1: dma-controller@e7300000 {
1185 compatible = "renesas,dmac-r8a77980",
1186 "renesas,rcar-dmac";
1205 interrupt-names = "error",
1211 clock-names = "fck";
1212 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1214 #dma-cells = <1>;
1215 dma-channels = <16>;
1226 dmac2: dma-controller@e7310000 {
1227 compatible = "renesas,dmac-r8a77980",
1228 "renesas,rcar-dmac";
1247 interrupt-names = "error",
1253 clock-names = "fck";
1254 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1256 #dma-cells = <1>;
1257 dma-channels = <16>;
1269 compatible = "renesas,gether-r8a77980";
1273 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1276 #address-cells = <1>;
1277 #size-cells = <0>;
1282 compatible = "renesas,ipmmu-r8a77980";
1284 renesas,ipmmu-main = <&ipmmu_mm 0>;
1285 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1286 #iommu-cells = <1>;
1290 compatible = "renesas,ipmmu-r8a77980";
1292 renesas,ipmmu-main = <&ipmmu_mm 3>;
1293 power-domains = <&sysc R8A77980_PD_A3IR>;
1294 #iommu-cells = <1>;
1298 compatible = "renesas,ipmmu-r8a77980";
1302 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1303 #iommu-cells = <1>;
1307 compatible = "renesas,ipmmu-r8a77980";
1309 renesas,ipmmu-main = <&ipmmu_mm 10>;
1310 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1311 #iommu-cells = <1>;
1315 compatible = "renesas,ipmmu-r8a77980";
1317 renesas,ipmmu-main = <&ipmmu_mm 12>;
1318 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1319 #iommu-cells = <1>;
1323 compatible = "renesas,ipmmu-r8a77980";
1325 renesas,ipmmu-main = <&ipmmu_mm 14>;
1326 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1327 #iommu-cells = <1>;
1331 compatible = "renesas,ipmmu-r8a77980";
1333 renesas,ipmmu-main = <&ipmmu_mm 4>;
1334 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1335 #iommu-cells = <1>;
1339 compatible = "renesas,ipmmu-r8a77980";
1341 renesas,ipmmu-main = <&ipmmu_mm 11>;
1342 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1343 #iommu-cells = <1>;
1347 compatible = "renesas,sdhi-r8a77980",
1348 "renesas,rcar-gen3-sdhi";
1352 clock-names = "core", "clkh";
1353 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1355 max-frequency = <200000000>;
1361 compatible = "renesas,r8a77980-rpc-if",
1362 "renesas,rcar-gen3-rpc-if";
1366 reg-names = "regs", "dirmap", "wbuf";
1369 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1371 #address-cells = <1>;
1372 #size-cells = <0>;
1376 gic: interrupt-controller@f1010000 {
1377 compatible = "arm,gic-400";
1378 #interrupt-cells = <3>;
1379 #address-cells = <0>;
1380 interrupt-controller;
1388 clock-names = "clk";
1389 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1394 compatible = "renesas,pcie-r8a77980",
1395 "renesas,pcie-rcar-gen3";
1397 #address-cells = <3>;
1398 #size-cells = <2>;
1399 bus-range = <0x00 0xff>;
1406 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1410 #interrupt-cells = <1>;
1411 interrupt-map-mask = <0 0 0 0>;
1412 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1414 clock-names = "pcie", "pcie_bus";
1415 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1418 phy-names = "pcie";
1419 iommu-map = <0 &ipmmu_vi0 5 1>;
1420 iommu-map-mask = <0>;
1429 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1438 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1444 compatible = "renesas,r8a77980-csi2";
1448 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1453 #address-cells = <1>;
1454 #size-cells = <0>;
1461 #address-cells = <1>;
1462 #size-cells = <0>;
1468 remote-endpoint = <&vin0csi40>;
1472 remote-endpoint = <&vin1csi40>;
1476 remote-endpoint = <&vin2csi40>;
1480 remote-endpoint = <&vin3csi40>;
1487 compatible = "renesas,r8a77980-csi2";
1491 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1496 #address-cells = <1>;
1497 #size-cells = <0>;
1504 #address-cells = <1>;
1505 #size-cells = <0>;
1511 remote-endpoint = <&vin4csi41>;
1515 remote-endpoint = <&vin5csi41>;
1519 remote-endpoint = <&vin6csi41>;
1523 remote-endpoint = <&vin7csi41>;
1530 compatible = "renesas,du-r8a77980";
1534 clock-names = "du.0";
1535 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1537 reset-names = "du.0";
1543 #address-cells = <1>;
1544 #size-cells = <0>;
1553 remote-endpoint = <&lvds0_in>;
1559 lvds0: lvds-encoder@feb90000 {
1560 compatible = "renesas,r8a77980-lvds";
1563 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1568 #address-cells = <1>;
1569 #size-cells = <0>;
1574 remote-endpoint =
1588 bootph-all;
1592 thermal-zones {
1593 sensor1_thermal: sensor1-thermal {
1594 polling-delay-passive = <250>;
1595 polling-delay = <1000>;
1596 thermal-sensors = <&tsc 0>;
1599 sensor1-passive {
1604 sensor1-critical {
1612 sensor2_thermal: sensor2-thermal {
1613 polling-delay-passive = <250>;
1614 polling-delay = <1000>;
1615 thermal-sensors = <&tsc 1>;
1618 sensor2-passive {
1623 sensor2-critical {
1633 compatible = "arm,armv8-timer";
1634 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1642 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";