Lines Matching +full:0 +full:xfead0000
23 * The external audio clocks are configured as 0 Hz fixed frequency
29 #clock-cells = <0>;
30 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
41 #clock-cells = <0>;
42 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
52 cluster0_opp: opp-table-0 {
108 #size-cells = <0>;
142 a57_0: cpu@0 {
144 reg = <0x0>;
159 reg = <0x1>;
173 reg = <0x2>;
187 reg = <0x3>;
201 reg = <0x100>;
216 reg = <0x101>;
229 reg = <0x102>;
242 reg = <0x103>;
253 L2_CA57: cache-controller-0 {
270 CPU_SLEEP_0: cpu-sleep-0 {
272 arm,psci-suspend-param = <0x0010000>;
281 arm,psci-suspend-param = <0x0010000>;
292 #clock-cells = <0>;
294 clock-frequency = <0>;
299 #clock-cells = <0>;
301 clock-frequency = <0>;
307 #clock-cells = <0>;
308 clock-frequency = <0>;
343 #clock-cells = <0>;
344 clock-frequency = <0>;
357 reg = <0 0xe6020000 0 0x0c>;
368 reg = <0 0xe6050000 0 0x50>;
372 gpio-ranges = <&pfc 0 0 16>;
383 reg = <0 0xe6051000 0 0x50>;
387 gpio-ranges = <&pfc 0 32 29>;
398 reg = <0 0xe6052000 0 0x50>;
402 gpio-ranges = <&pfc 0 64 15>;
413 reg = <0 0xe6053000 0 0x50>;
417 gpio-ranges = <&pfc 0 96 16>;
428 reg = <0 0xe6054000 0 0x50>;
432 gpio-ranges = <&pfc 0 128 18>;
443 reg = <0 0xe6055000 0 0x50>;
447 gpio-ranges = <&pfc 0 160 26>;
458 reg = <0 0xe6055400 0 0x50>;
462 gpio-ranges = <&pfc 0 192 32>;
473 reg = <0 0xe6055800 0 0x50>;
477 gpio-ranges = <&pfc 0 224 4>;
487 reg = <0 0xe6060000 0 0x50c>;
493 reg = <0 0xe60f0000 0 0x1004>;
506 reg = <0 0xe6130000 0 0x1004>;
525 reg = <0 0xe6140000 0 0x1004>;
544 reg = <0 0xe6148000 0 0x1004>;
562 reg = <0 0xe6150000 0 0x1000>;
566 #power-domain-cells = <0>;
572 reg = <0 0xe6160000 0 0x0200>;
577 reg = <0 0xe6180000 0 0x0400>;
583 reg = <0 0xe6198000 0 0x100>,
584 <0 0xe61a0000 0 0x100>,
585 <0 0xe61a8000 0 0x100>;
599 reg = <0 0xe61c0000 0 0x200>;
600 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
613 reg = <0 0xe61e0000 0 0x30>;
627 reg = <0 0xe6fc0000 0 0x30>;
642 reg = <0 0xe6fd0000 0 0x30>;
657 reg = <0 0xe6fe0000 0 0x30>;
671 reg = <0 0xffc00000 0 0x30>;
685 #size-cells = <0>;
688 reg = <0 0xe6500000 0 0x40>;
693 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
694 <&dmac2 0x91>, <&dmac2 0x90>;
702 #size-cells = <0>;
705 reg = <0 0xe6508000 0 0x40>;
710 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
711 <&dmac2 0x93>, <&dmac2 0x92>;
719 #size-cells = <0>;
722 reg = <0 0xe6510000 0 0x40>;
727 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
728 <&dmac2 0x95>, <&dmac2 0x94>;
736 #size-cells = <0>;
739 reg = <0 0xe66d0000 0 0x40>;
744 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
752 #size-cells = <0>;
755 reg = <0 0xe66d8000 0 0x40>;
760 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
768 #size-cells = <0>;
771 reg = <0 0xe66e0000 0 0x40>;
776 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
784 #size-cells = <0>;
787 reg = <0 0xe66e8000 0 0x40>;
792 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
800 #size-cells = <0>;
804 reg = <0 0xe60b0000 0 0x425>;
809 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
818 reg = <0 0xe6540000 0 96>;
824 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
825 <&dmac2 0x31>, <&dmac2 0x30>;
836 reg = <0 0xe6550000 0 96>;
842 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
843 <&dmac2 0x33>, <&dmac2 0x32>;
854 reg = <0 0xe6560000 0 96>;
860 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
861 <&dmac2 0x35>, <&dmac2 0x34>;
872 reg = <0 0xe66a0000 0 96>;
878 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
889 reg = <0 0xe66b0000 0 96>;
895 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
905 reg = <0 0xe6590000 0 0x200>;
908 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
909 <&usb_dmac1 0>, <&usb_dmac1 1>;
922 reg = <0 0xe659c000 0 0x200>;
925 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
926 <&usb_dmac3 0>, <&usb_dmac3 1>;
939 reg = <0 0xe65a0000 0 0x100>;
953 reg = <0 0xe65b0000 0 0x100>;
967 reg = <0 0xe6460000 0 0x100>;
981 reg = <0 0xe6470000 0 0x100>;
995 reg = <0 0xe65ee000 0 0x90>;
1001 #phy-cells = <0>;
1008 reg = <0x0 0xe6601000 0 0x1000>;
1017 reg = <0 0xe6700000 0 0x10000>;
1046 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1059 reg = <0 0xe7300000 0 0x10000>;
1088 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1101 reg = <0 0xe7310000 0 0x10000>;
1142 reg = <0 0xe6740000 0 0x1000>;
1143 renesas,ipmmu-main = <&ipmmu_mm 0>;
1150 reg = <0 0xe7740000 0 0x1000>;
1158 reg = <0 0xe6570000 0 0x1000>;
1166 reg = <0 0xff8b0000 0 0x1000>;
1174 reg = <0 0xe67b0000 0 0x1000>;
1183 reg = <0 0xec670000 0 0x1000>;
1191 reg = <0 0xfd800000 0 0x1000>;
1199 reg = <0 0xfd950000 0 0x1000>;
1207 reg = <0 0xfd960000 0 0x1000>;
1215 reg = <0 0xfd970000 0 0x1000>;
1223 reg = <0 0xffc80000 0 0x1000>;
1231 reg = <0 0xfe6b0000 0 0x1000>;
1239 reg = <0 0xfe6f0000 0 0x1000>;
1247 reg = <0 0xfebd0000 0 0x1000>;
1255 reg = <0 0xfebe0000 0 0x1000>;
1263 reg = <0 0xfe990000 0 0x1000>;
1271 reg = <0 0xfe980000 0 0x1000>;
1280 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1318 rx-internal-delay-ps = <0>;
1319 tx-internal-delay-ps = <0>;
1322 #size-cells = <0>;
1329 reg = <0 0xe6c30000 0 0x1000>;
1345 reg = <0 0xe6c38000 0 0x1000>;
1361 reg = <0 0xe66c0000 0 0x8000>;
1386 reg = <0 0xe6e30000 0 0x8>;
1396 reg = <0 0xe6e31000 0 0x8>;
1406 reg = <0 0xe6e32000 0 0x8>;
1416 reg = <0 0xe6e33000 0 0x8>;
1426 reg = <0 0xe6e34000 0 0x8>;
1436 reg = <0 0xe6e35000 0 0x8>;
1446 reg = <0 0xe6e36000 0 0x8>;
1457 reg = <0 0xe6e60000 0 64>;
1463 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1464 <&dmac2 0x51>, <&dmac2 0x50>;
1474 reg = <0 0xe6e68000 0 64>;
1480 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1481 <&dmac2 0x53>, <&dmac2 0x52>;
1491 reg = <0 0xe6e88000 0 64>;
1497 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1498 <&dmac2 0x13>, <&dmac2 0x12>;
1508 reg = <0 0xe6c50000 0 64>;
1514 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1524 reg = <0 0xe6c40000 0 64>;
1530 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1540 reg = <0 0xe6f30000 0 64>;
1546 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1547 <&dmac2 0x5b>, <&dmac2 0x5a>;
1556 reg = <0 0xe6e80000 0 0x148>;
1568 reg = <0 0xe6e90000 0 0x0064>;
1571 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1572 <&dmac2 0x41>, <&dmac2 0x40>;
1577 #size-cells = <0>;
1584 reg = <0 0xe6ea0000 0 0x0064>;
1587 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1588 <&dmac2 0x43>, <&dmac2 0x42>;
1593 #size-cells = <0>;
1600 reg = <0 0xe6c00000 0 0x0064>;
1603 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1608 #size-cells = <0>;
1615 reg = <0 0xe6c10000 0 0x0064>;
1618 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1623 #size-cells = <0>;
1629 reg = <0 0xe6ef0000 0 0x1000>;
1634 renesas,id = <0>;
1639 #size-cells = <0>;
1643 #size-cells = <0>;
1647 vin0csi20: endpoint@0 {
1648 reg = <0>;
1661 reg = <0 0xe6ef1000 0 0x1000>;
1671 #size-cells = <0>;
1675 #size-cells = <0>;
1679 vin1csi20: endpoint@0 {
1680 reg = <0>;
1693 reg = <0 0xe6ef2000 0 0x1000>;
1703 #size-cells = <0>;
1707 #size-cells = <0>;
1711 vin2csi20: endpoint@0 {
1712 reg = <0>;
1725 reg = <0 0xe6ef3000 0 0x1000>;
1735 #size-cells = <0>;
1739 #size-cells = <0>;
1743 vin3csi20: endpoint@0 {
1744 reg = <0>;
1757 reg = <0 0xe6ef4000 0 0x1000>;
1767 #size-cells = <0>;
1771 #size-cells = <0>;
1775 vin4csi20: endpoint@0 {
1776 reg = <0>;
1789 reg = <0 0xe6ef5000 0 0x1000>;
1799 #size-cells = <0>;
1803 #size-cells = <0>;
1807 vin5csi20: endpoint@0 {
1808 reg = <0>;
1821 reg = <0 0xe6ef6000 0 0x1000>;
1831 #size-cells = <0>;
1835 #size-cells = <0>;
1839 vin6csi20: endpoint@0 {
1840 reg = <0>;
1853 reg = <0 0xe6ef7000 0 0x1000>;
1863 #size-cells = <0>;
1867 #size-cells = <0>;
1871 vin7csi20: endpoint@0 {
1872 reg = <0>;
1886 reg = <0 0xe6f40000 0 0x64>;
1890 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1901 reg = <0 0xe6f50000 0 0x64>;
1905 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1916 reg = <0 0xe6f60000 0 0x64>;
1920 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1931 reg = <0 0xe6f70000 0 0x64>;
1935 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1946 reg = <0 0xe6f80000 0 0x64>;
1950 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1961 reg = <0 0xe6f90000 0 0x64>;
1965 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1976 reg = <0 0xe6fa0000 0 0x64>;
1980 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1991 reg = <0 0xe6fb0000 0 0x64>;
1995 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
2007 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2013 * clkout : #clock-cells = <0>; <&rcar_sound>;
2017 reg = <0 0xec500000 0 0x1000>, /* SCU */
2018 <0 0xec5a0000 0 0x100>, /* ADG */
2019 <0 0xec540000 0 0x1000>, /* SSIU */
2020 <0 0xec541000 0 0x280>, /* SSI */
2021 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
2044 "ssi.1", "ssi.0",
2047 "src.1", "src.0",
2048 "mix.1", "mix.0",
2049 "ctu.1", "ctu.0",
2050 "dvc.0", "dvc.1",
2062 "ssi.1", "ssi.0";
2066 dvc0: dvc-0 {
2067 dmas = <&audma1 0xbc>;
2071 dmas = <&audma1 0xbe>;
2077 mix0: mix-0 { };
2082 ctu00: ctu-0 { };
2093 src0: src-0 {
2095 dmas = <&audma0 0x85>, <&audma1 0x9a>;
2100 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2105 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2110 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2115 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2120 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2125 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2130 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2135 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2140 dmas = <&audma0 0x97>, <&audma1 0xba>;
2146 ssiu00: ssiu-0 {
2147 dmas = <&audma0 0x15>, <&audma1 0x16>;
2151 dmas = <&audma0 0x35>, <&audma1 0x36>;
2155 dmas = <&audma0 0x37>, <&audma1 0x38>;
2159 dmas = <&audma0 0x47>, <&audma1 0x48>;
2163 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2167 dmas = <&audma0 0x43>, <&audma1 0x44>;
2171 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2175 dmas = <&audma0 0x53>, <&audma1 0x54>;
2179 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2183 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2187 dmas = <&audma0 0x57>, <&audma1 0x58>;
2191 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2195 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2199 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2203 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2207 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2211 dmas = <&audma0 0x63>, <&audma1 0x64>;
2215 dmas = <&audma0 0x67>, <&audma1 0x68>;
2219 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2223 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2227 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2231 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2235 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2239 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2243 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2247 dmas = <&audma0 0x21>, <&audma1 0x22>;
2251 dmas = <&audma0 0x23>, <&audma1 0x24>;
2255 dmas = <&audma0 0x25>, <&audma1 0x26>;
2259 dmas = <&audma0 0x27>, <&audma1 0x28>;
2263 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2267 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2271 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2275 dmas = <&audma0 0x71>, <&audma1 0x72>;
2279 dmas = <&audma0 0x17>, <&audma1 0x18>;
2283 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2287 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2291 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2295 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2299 dmas = <&audma0 0x31>, <&audma1 0x32>;
2303 dmas = <&audma0 0x33>, <&audma1 0x34>;
2307 dmas = <&audma0 0x73>, <&audma1 0x74>;
2311 dmas = <&audma0 0x75>, <&audma1 0x76>;
2315 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2319 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2323 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2327 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2331 dmas = <&audma0 0x81>, <&audma1 0x82>;
2335 dmas = <&audma0 0x83>, <&audma1 0x84>;
2339 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2343 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2347 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2351 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2357 ssi0: ssi-0 {
2359 dmas = <&audma0 0x01>, <&audma1 0x02>;
2364 dmas = <&audma0 0x03>, <&audma1 0x04>;
2369 dmas = <&audma0 0x05>, <&audma1 0x06>;
2374 dmas = <&audma0 0x07>, <&audma1 0x08>;
2379 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2384 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2389 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2394 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2399 dmas = <&audma0 0x11>, <&audma1 0x12>;
2404 dmas = <&audma0 0x13>, <&audma1 0x14>;
2413 reg = <0 0xec520000 0 0x800>;
2425 reg = <0 0xec700000 0 0x10000>;
2454 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2467 reg = <0 0xec720000 0 0x10000>;
2508 reg = <0 0xee000000 0 0xc00>;
2519 reg = <0 0xee020000 0 0x400>;
2529 reg = <0 0xee080000 0 0x100>;
2541 reg = <0 0xee0a0000 0 0x100>;
2553 reg = <0 0xee0c0000 0 0x100>;
2565 reg = <0 0xee0e0000 0 0x100>;
2577 reg = <0 0xee080100 0 0x100>;
2590 reg = <0 0xee0a0100 0 0x100>;
2603 reg = <0 0xee0c0100 0 0x100>;
2616 reg = <0 0xee0e0100 0 0x100>;
2630 reg = <0 0xee080200 0 0x700>;
2642 reg = <0 0xee0a0200 0 0x700>;
2653 reg = <0 0xee0c0200 0 0x700>;
2664 reg = <0 0xee0e0200 0 0x700>;
2676 reg = <0 0xee100000 0 0x2000>;
2690 reg = <0 0xee120000 0 0x2000>;
2704 reg = <0 0xee140000 0 0x2000>;
2718 reg = <0 0xee160000 0 0x2000>;
2732 reg = <0 0xee200000 0 0x200>,
2733 <0 0x08000000 0 0x04000000>,
2734 <0 0xee208000 0 0x100>;
2741 #size-cells = <0>;
2748 reg = <0 0xee300000 0 0x200000>;
2760 #address-cells = <0>;
2762 reg = <0x0 0xf1010000 0 0x1000>,
2763 <0x0 0xf1020000 0 0x20000>,
2764 <0x0 0xf1040000 0 0x20000>,
2765 <0x0 0xf1060000 0 0x20000>;
2777 reg = <0 0xfe000000 0 0x80000>;
2780 bus-range = <0x00 0xff>;
2782 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2783 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2784 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2785 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2787 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2792 interrupt-map-mask = <0 0 0 0>;
2793 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2798 iommu-map = <0 &ipmmu_hc 0 1>;
2799 iommu-map-mask = <0>;
2806 reg = <0 0xee800000 0 0x80000>;
2809 bus-range = <0x00 0xff>;
2811 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2812 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2813 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2814 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2816 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2821 interrupt-map-mask = <0 0 0 0>;
2822 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2827 iommu-map = <0 &ipmmu_hc 1 1>;
2828 iommu-map-mask = <0>;
2835 reg = <0x0 0xfe000000 0 0x80000>,
2836 <0x0 0xfe100000 0 0x100000>,
2837 <0x0 0xfe200000 0 0x200000>,
2838 <0x0 0x30000000 0 0x8000000>,
2839 <0x0 0x38000000 0 0x8000000>;
2854 reg = <0x0 0xee800000 0 0x80000>,
2855 <0x0 0xee900000 0 0x100000>,
2856 <0x0 0xeea00000 0 0x200000>,
2857 <0x0 0xc0000000 0 0x8000000>,
2858 <0x0 0xc8000000 0 0x8000000>;
2873 reg = <0 0xfe860000 0 0x2000>;
2883 reg = <0 0xfe870000 0 0x2000>;
2893 reg = <0 0xfe880000 0 0x2000>;
2903 reg = <0 0xfe890000 0 0x2000>;
2912 reg = <0 0xfe920000 0 0x8000>;
2923 reg = <0 0xfe960000 0 0x8000>;
2934 reg = <0 0xfea20000 0 0x5000>;
2945 reg = <0 0xfea28000 0 0x5000>;
2956 reg = <0 0xfea30000 0 0x5000>;
2967 reg = <0 0xfe9a0000 0 0x8000>;
2978 reg = <0 0xfe9b0000 0 0x8000>;
2989 reg = <0 0xfe940000 0 0x2400>;
2999 reg = <0 0xfe944000 0 0x2400>;
3009 reg = <0 0xfe950000 0 0x200>;
3013 iommus = <&ipmmu_vp0 0>;
3018 reg = <0 0xfe951000 0 0x200>;
3027 reg = <0 0xfe96f000 0 0x200>;
3036 reg = <0 0xfe92f000 0 0x200>;
3045 reg = <0 0xfe9af000 0 0x200>;
3054 reg = <0 0xfe9bf000 0 0x200>;
3063 reg = <0 0xfea27000 0 0x200>;
3072 reg = <0 0xfea2f000 0 0x200>;
3081 reg = <0 0xfea37000 0 0x200>;
3091 reg = <0 0xfea40000 0 0x1000>;
3100 reg = <0 0xfea50000 0 0x1000>;
3109 reg = <0 0xfea60000 0 0x1000>;
3118 reg = <0 0xfea70000 0 0x1000>;
3126 reg = <0 0xfea80000 0 0x10000>;
3135 #size-cells = <0>;
3137 port@0 {
3138 reg = <0>;
3143 #size-cells = <0>;
3147 csi20vin0: endpoint@0 {
3148 reg = <0>;
3185 reg = <0 0xfeaa0000 0 0x10000>;
3194 #size-cells = <0>;
3196 port@0 {
3197 reg = <0>;
3202 #size-cells = <0>;
3206 csi40vin0: endpoint@0 {
3207 reg = <0>;
3228 reg = <0 0xfeab0000 0 0x10000>;
3237 #size-cells = <0>;
3239 port@0 {
3240 reg = <0>;
3245 #size-cells = <0>;
3249 csi41vin4: endpoint@0 {
3250 reg = <0>;
3271 reg = <0 0xfead0000 0 0x10000>;
3281 #size-cells = <0>;
3282 port@0 {
3283 reg = <0>;
3300 reg = <0 0xfeae0000 0 0x10000>;
3310 #size-cells = <0>;
3311 port@0 {
3312 reg = <0>;
3329 reg = <0 0xfeb00000 0 0x80000>;
3336 clock-names = "du.0", "du.1", "du.2", "du.3";
3338 reset-names = "du.0", "du.2";
3341 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3348 #size-cells = <0>;
3350 port@0 {
3351 reg = <0>;
3376 reg = <0 0xfeb90000 0 0x14>;
3384 #size-cells = <0>;
3386 port@0 {
3387 reg = <0>;
3400 reg = <0 0xfff00044 0 4>;
3408 thermal-sensors = <&tsc 0>;
3463 cooling-device = <&a53_0 0 2>;
3482 #clock-cells = <0>;
3483 clock-frequency = <0>;
3488 #clock-cells = <0>;
3489 clock-frequency = <0>;