Lines Matching +full:0 +full:xec5a0000
23 * The external audio clocks are configured as 0 Hz fixed frequency
29 #clock-cells = <0>;
30 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
41 #clock-cells = <0>;
42 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
52 cluster0_opp: opp-table-0 {
108 #size-cells = <0>;
142 a57_0: cpu@0 {
144 reg = <0x0>;
159 reg = <0x1>;
173 reg = <0x2>;
187 reg = <0x3>;
201 reg = <0x100>;
216 reg = <0x101>;
229 reg = <0x102>;
242 reg = <0x103>;
253 L2_CA57: cache-controller-0 {
270 CPU_SLEEP_0: cpu-sleep-0 {
272 arm,psci-suspend-param = <0x0010000>;
281 arm,psci-suspend-param = <0x0010000>;
292 #clock-cells = <0>;
294 clock-frequency = <0>;
300 #clock-cells = <0>;
302 clock-frequency = <0>;
309 #clock-cells = <0>;
310 clock-frequency = <0>;
345 #clock-cells = <0>;
346 clock-frequency = <0>;
360 reg = <0 0xe6020000 0 0x0c>;
371 reg = <0 0xe6050000 0 0x50>;
375 gpio-ranges = <&pfc 0 0 16>;
386 reg = <0 0xe6051000 0 0x50>;
390 gpio-ranges = <&pfc 0 32 29>;
401 reg = <0 0xe6052000 0 0x50>;
405 gpio-ranges = <&pfc 0 64 15>;
416 reg = <0 0xe6053000 0 0x50>;
420 gpio-ranges = <&pfc 0 96 16>;
431 reg = <0 0xe6054000 0 0x50>;
435 gpio-ranges = <&pfc 0 128 18>;
446 reg = <0 0xe6055000 0 0x50>;
450 gpio-ranges = <&pfc 0 160 26>;
461 reg = <0 0xe6055400 0 0x50>;
465 gpio-ranges = <&pfc 0 192 32>;
476 reg = <0 0xe6055800 0 0x50>;
480 gpio-ranges = <&pfc 0 224 4>;
490 reg = <0 0xe6060000 0 0x50c>;
497 reg = <0 0xe60f0000 0 0x1004>;
510 reg = <0 0xe6130000 0 0x1004>;
529 reg = <0 0xe6140000 0 0x1004>;
548 reg = <0 0xe6148000 0 0x1004>;
566 reg = <0 0xe6150000 0 0x1000>;
570 #power-domain-cells = <0>;
577 reg = <0 0xe6160000 0 0x0200>;
583 reg = <0 0xe6180000 0 0x0400>;
589 reg = <0 0xe6198000 0 0x100>,
590 <0 0xe61a0000 0 0x100>,
591 <0 0xe61a8000 0 0x100>;
605 reg = <0 0xe61c0000 0 0x200>;
606 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
619 reg = <0 0xe61e0000 0 0x30>;
633 reg = <0 0xe6fc0000 0 0x30>;
648 reg = <0 0xe6fd0000 0 0x30>;
663 reg = <0 0xe6fe0000 0 0x30>;
677 reg = <0 0xffc00000 0 0x30>;
691 #size-cells = <0>;
694 reg = <0 0xe6500000 0 0x40>;
699 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
700 <&dmac2 0x91>, <&dmac2 0x90>;
708 #size-cells = <0>;
711 reg = <0 0xe6508000 0 0x40>;
716 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
717 <&dmac2 0x93>, <&dmac2 0x92>;
725 #size-cells = <0>;
728 reg = <0 0xe6510000 0 0x40>;
733 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
734 <&dmac2 0x95>, <&dmac2 0x94>;
742 #size-cells = <0>;
745 reg = <0 0xe66d0000 0 0x40>;
750 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
758 #size-cells = <0>;
761 reg = <0 0xe66d8000 0 0x40>;
766 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
774 #size-cells = <0>;
777 reg = <0 0xe66e0000 0 0x40>;
782 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
790 #size-cells = <0>;
793 reg = <0 0xe66e8000 0 0x40>;
798 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
806 #size-cells = <0>;
810 reg = <0 0xe60b0000 0 0x425>;
815 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
824 reg = <0 0xe6540000 0 96>;
830 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
831 <&dmac2 0x31>, <&dmac2 0x30>;
842 reg = <0 0xe6550000 0 96>;
848 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
849 <&dmac2 0x33>, <&dmac2 0x32>;
860 reg = <0 0xe6560000 0 96>;
866 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
867 <&dmac2 0x35>, <&dmac2 0x34>;
878 reg = <0 0xe66a0000 0 96>;
884 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
895 reg = <0 0xe66b0000 0 96>;
901 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
911 reg = <0 0xe6590000 0 0x200>;
914 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
915 <&usb_dmac1 0>, <&usb_dmac1 1>;
928 reg = <0 0xe659c000 0 0x200>;
931 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
932 <&usb_dmac3 0>, <&usb_dmac3 1>;
945 reg = <0 0xe65a0000 0 0x100>;
959 reg = <0 0xe65b0000 0 0x100>;
973 reg = <0 0xe6460000 0 0x100>;
987 reg = <0 0xe6470000 0 0x100>;
1001 reg = <0 0xe65ee000 0 0x90>;
1007 #phy-cells = <0>;
1014 reg = <0x0 0xe6601000 0 0x1000>;
1023 reg = <0 0xe6700000 0 0x10000>;
1052 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1065 reg = <0 0xe7300000 0 0x10000>;
1094 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1107 reg = <0 0xe7310000 0 0x10000>;
1148 reg = <0 0xe6740000 0 0x1000>;
1149 renesas,ipmmu-main = <&ipmmu_mm 0>;
1156 reg = <0 0xe7740000 0 0x1000>;
1164 reg = <0 0xe6570000 0 0x1000>;
1172 reg = <0 0xff8b0000 0 0x1000>;
1180 reg = <0 0xe67b0000 0 0x1000>;
1189 reg = <0 0xec670000 0 0x1000>;
1197 reg = <0 0xfd800000 0 0x1000>;
1205 reg = <0 0xfd950000 0 0x1000>;
1213 reg = <0 0xfd960000 0 0x1000>;
1221 reg = <0 0xfd970000 0 0x1000>;
1229 reg = <0 0xffc80000 0 0x1000>;
1237 reg = <0 0xfe6b0000 0 0x1000>;
1245 reg = <0 0xfe6f0000 0 0x1000>;
1253 reg = <0 0xfebd0000 0 0x1000>;
1261 reg = <0 0xfebe0000 0 0x1000>;
1269 reg = <0 0xfe990000 0 0x1000>;
1277 reg = <0 0xfe980000 0 0x1000>;
1286 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1324 rx-internal-delay-ps = <0>;
1325 tx-internal-delay-ps = <0>;
1328 #size-cells = <0>;
1335 reg = <0 0xe6c30000 0 0x1000>;
1351 reg = <0 0xe6c38000 0 0x1000>;
1367 reg = <0 0xe66c0000 0 0x8000>;
1392 reg = <0 0xe6e30000 0 0x8>;
1402 reg = <0 0xe6e31000 0 0x8>;
1412 reg = <0 0xe6e32000 0 0x8>;
1422 reg = <0 0xe6e33000 0 0x8>;
1432 reg = <0 0xe6e34000 0 0x8>;
1442 reg = <0 0xe6e35000 0 0x8>;
1452 reg = <0 0xe6e36000 0 0x8>;
1463 reg = <0 0xe6e60000 0 64>;
1469 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1470 <&dmac2 0x51>, <&dmac2 0x50>;
1480 reg = <0 0xe6e68000 0 64>;
1486 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1487 <&dmac2 0x53>, <&dmac2 0x52>;
1497 reg = <0 0xe6e88000 0 64>;
1503 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1504 <&dmac2 0x13>, <&dmac2 0x12>;
1514 reg = <0 0xe6c50000 0 64>;
1520 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1530 reg = <0 0xe6c40000 0 64>;
1536 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1546 reg = <0 0xe6f30000 0 64>;
1552 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1553 <&dmac2 0x5b>, <&dmac2 0x5a>;
1562 reg = <0 0xe6e80000 0 0x148>;
1574 reg = <0 0xe6e90000 0 0x0064>;
1577 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1578 <&dmac2 0x41>, <&dmac2 0x40>;
1583 #size-cells = <0>;
1590 reg = <0 0xe6ea0000 0 0x0064>;
1593 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1594 <&dmac2 0x43>, <&dmac2 0x42>;
1599 #size-cells = <0>;
1606 reg = <0 0xe6c00000 0 0x0064>;
1609 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1614 #size-cells = <0>;
1621 reg = <0 0xe6c10000 0 0x0064>;
1624 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1629 #size-cells = <0>;
1635 reg = <0 0xe6ef0000 0 0x1000>;
1640 renesas,id = <0>;
1645 #size-cells = <0>;
1649 #size-cells = <0>;
1653 vin0csi20: endpoint@0 {
1654 reg = <0>;
1667 reg = <0 0xe6ef1000 0 0x1000>;
1677 #size-cells = <0>;
1681 #size-cells = <0>;
1685 vin1csi20: endpoint@0 {
1686 reg = <0>;
1699 reg = <0 0xe6ef2000 0 0x1000>;
1709 #size-cells = <0>;
1713 #size-cells = <0>;
1717 vin2csi20: endpoint@0 {
1718 reg = <0>;
1731 reg = <0 0xe6ef3000 0 0x1000>;
1741 #size-cells = <0>;
1745 #size-cells = <0>;
1749 vin3csi20: endpoint@0 {
1750 reg = <0>;
1763 reg = <0 0xe6ef4000 0 0x1000>;
1773 #size-cells = <0>;
1777 #size-cells = <0>;
1781 vin4csi20: endpoint@0 {
1782 reg = <0>;
1795 reg = <0 0xe6ef5000 0 0x1000>;
1805 #size-cells = <0>;
1809 #size-cells = <0>;
1813 vin5csi20: endpoint@0 {
1814 reg = <0>;
1827 reg = <0 0xe6ef6000 0 0x1000>;
1837 #size-cells = <0>;
1841 #size-cells = <0>;
1845 vin6csi20: endpoint@0 {
1846 reg = <0>;
1859 reg = <0 0xe6ef7000 0 0x1000>;
1869 #size-cells = <0>;
1873 #size-cells = <0>;
1877 vin7csi20: endpoint@0 {
1878 reg = <0>;
1892 reg = <0 0xe6f40000 0 0x64>;
1896 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1907 reg = <0 0xe6f50000 0 0x64>;
1911 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1922 reg = <0 0xe6f60000 0 0x64>;
1926 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1937 reg = <0 0xe6f70000 0 0x64>;
1941 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1952 reg = <0 0xe6f80000 0 0x64>;
1956 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1967 reg = <0 0xe6f90000 0 0x64>;
1971 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1982 reg = <0 0xe6fa0000 0 0x64>;
1986 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1997 reg = <0 0xe6fb0000 0 0x64>;
2001 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
2013 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2019 * clkout : #clock-cells = <0>; <&rcar_sound>;
2023 reg = <0 0xec500000 0 0x1000>, /* SCU */
2024 <0 0xec5a0000 0 0x100>, /* ADG */
2025 <0 0xec540000 0 0x1000>, /* SSIU */
2026 <0 0xec541000 0 0x280>, /* SSI */
2027 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
2050 "ssi.1", "ssi.0",
2053 "src.1", "src.0",
2054 "mix.1", "mix.0",
2055 "ctu.1", "ctu.0",
2056 "dvc.0", "dvc.1",
2068 "ssi.1", "ssi.0";
2072 dvc0: dvc-0 {
2073 dmas = <&audma1 0xbc>;
2077 dmas = <&audma1 0xbe>;
2083 mix0: mix-0 { };
2088 ctu00: ctu-0 { };
2099 src0: src-0 {
2101 dmas = <&audma0 0x85>, <&audma1 0x9a>;
2106 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2111 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2116 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2121 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2126 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2131 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2136 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2141 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2146 dmas = <&audma0 0x97>, <&audma1 0xba>;
2152 ssiu00: ssiu-0 {
2153 dmas = <&audma0 0x15>, <&audma1 0x16>;
2157 dmas = <&audma0 0x35>, <&audma1 0x36>;
2161 dmas = <&audma0 0x37>, <&audma1 0x38>;
2165 dmas = <&audma0 0x47>, <&audma1 0x48>;
2169 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2173 dmas = <&audma0 0x43>, <&audma1 0x44>;
2177 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2181 dmas = <&audma0 0x53>, <&audma1 0x54>;
2185 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2189 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2193 dmas = <&audma0 0x57>, <&audma1 0x58>;
2197 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2201 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2205 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2209 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2213 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2217 dmas = <&audma0 0x63>, <&audma1 0x64>;
2221 dmas = <&audma0 0x67>, <&audma1 0x68>;
2225 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2229 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2233 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2237 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2241 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2245 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2249 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2253 dmas = <&audma0 0x21>, <&audma1 0x22>;
2257 dmas = <&audma0 0x23>, <&audma1 0x24>;
2261 dmas = <&audma0 0x25>, <&audma1 0x26>;
2265 dmas = <&audma0 0x27>, <&audma1 0x28>;
2269 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2273 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2277 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2281 dmas = <&audma0 0x71>, <&audma1 0x72>;
2285 dmas = <&audma0 0x17>, <&audma1 0x18>;
2289 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2293 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2297 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2301 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2305 dmas = <&audma0 0x31>, <&audma1 0x32>;
2309 dmas = <&audma0 0x33>, <&audma1 0x34>;
2313 dmas = <&audma0 0x73>, <&audma1 0x74>;
2317 dmas = <&audma0 0x75>, <&audma1 0x76>;
2321 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2325 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2329 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2333 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2337 dmas = <&audma0 0x81>, <&audma1 0x82>;
2341 dmas = <&audma0 0x83>, <&audma1 0x84>;
2345 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2349 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2353 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2357 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2363 ssi0: ssi-0 {
2365 dmas = <&audma0 0x01>, <&audma1 0x02>;
2370 dmas = <&audma0 0x03>, <&audma1 0x04>;
2375 dmas = <&audma0 0x05>, <&audma1 0x06>;
2380 dmas = <&audma0 0x07>, <&audma1 0x08>;
2385 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2390 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2395 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2400 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2405 dmas = <&audma0 0x11>, <&audma1 0x12>;
2410 dmas = <&audma0 0x13>, <&audma1 0x14>;
2419 reg = <0 0xec520000 0 0x800>;
2431 reg = <0 0xec700000 0 0x10000>;
2460 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2473 reg = <0 0xec720000 0 0x10000>;
2514 reg = <0 0xee000000 0 0xc00>;
2525 reg = <0 0xee020000 0 0x400>;
2535 reg = <0 0xee080000 0 0x100>;
2547 reg = <0 0xee0a0000 0 0x100>;
2559 reg = <0 0xee0c0000 0 0x100>;
2571 reg = <0 0xee0e0000 0 0x100>;
2583 reg = <0 0xee080100 0 0x100>;
2596 reg = <0 0xee0a0100 0 0x100>;
2609 reg = <0 0xee0c0100 0 0x100>;
2622 reg = <0 0xee0e0100 0 0x100>;
2636 reg = <0 0xee080200 0 0x700>;
2648 reg = <0 0xee0a0200 0 0x700>;
2659 reg = <0 0xee0c0200 0 0x700>;
2670 reg = <0 0xee0e0200 0 0x700>;
2682 reg = <0 0xee100000 0 0x2000>;
2696 reg = <0 0xee120000 0 0x2000>;
2710 reg = <0 0xee140000 0 0x2000>;
2724 reg = <0 0xee160000 0 0x2000>;
2738 reg = <0 0xee200000 0 0x200>,
2739 <0 0x08000000 0 0x04000000>,
2740 <0 0xee208000 0 0x100>;
2747 #size-cells = <0>;
2754 reg = <0 0xee300000 0 0x200000>;
2766 #address-cells = <0>;
2768 reg = <0x0 0xf1010000 0 0x1000>,
2769 <0x0 0xf1020000 0 0x20000>,
2770 <0x0 0xf1040000 0 0x20000>,
2771 <0x0 0xf1060000 0 0x20000>;
2783 reg = <0 0xfe000000 0 0x80000>;
2786 bus-range = <0x00 0xff>;
2788 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2789 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2790 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2791 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2793 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2798 interrupt-map-mask = <0 0 0 0>;
2799 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2804 iommu-map = <0 &ipmmu_hc 0 1>;
2805 iommu-map-mask = <0>;
2812 reg = <0 0xee800000 0 0x80000>;
2815 bus-range = <0x00 0xff>;
2817 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2818 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2819 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2820 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2822 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2827 interrupt-map-mask = <0 0 0 0>;
2828 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2833 iommu-map = <0 &ipmmu_hc 1 1>;
2834 iommu-map-mask = <0>;
2841 reg = <0x0 0xfe000000 0 0x80000>,
2842 <0x0 0xfe100000 0 0x100000>,
2843 <0x0 0xfe200000 0 0x200000>,
2844 <0x0 0x30000000 0 0x8000000>,
2845 <0x0 0x38000000 0 0x8000000>;
2860 reg = <0x0 0xee800000 0 0x80000>,
2861 <0x0 0xee900000 0 0x100000>,
2862 <0x0 0xeea00000 0 0x200000>,
2863 <0x0 0xc0000000 0 0x8000000>,
2864 <0x0 0xc8000000 0 0x8000000>;
2879 reg = <0 0xfe860000 0 0x2000>;
2889 reg = <0 0xfe870000 0 0x2000>;
2899 reg = <0 0xfe880000 0 0x2000>;
2909 reg = <0 0xfe890000 0 0x2000>;
2918 reg = <0 0xfe920000 0 0x8000>;
2929 reg = <0 0xfe960000 0 0x8000>;
2940 reg = <0 0xfea20000 0 0x5000>;
2951 reg = <0 0xfea28000 0 0x5000>;
2962 reg = <0 0xfea30000 0 0x5000>;
2973 reg = <0 0xfe9a0000 0 0x8000>;
2984 reg = <0 0xfe9b0000 0 0x8000>;
2995 reg = <0 0xfe940000 0 0x2400>;
3005 reg = <0 0xfe944000 0 0x2400>;
3015 reg = <0 0xfe950000 0 0x200>;
3019 iommus = <&ipmmu_vp0 0>;
3024 reg = <0 0xfe951000 0 0x200>;
3033 reg = <0 0xfe96f000 0 0x200>;
3042 reg = <0 0xfe92f000 0 0x200>;
3051 reg = <0 0xfe9af000 0 0x200>;
3060 reg = <0 0xfe9bf000 0 0x200>;
3069 reg = <0 0xfea27000 0 0x200>;
3078 reg = <0 0xfea2f000 0 0x200>;
3087 reg = <0 0xfea37000 0 0x200>;
3097 reg = <0 0xfea40000 0 0x1000>;
3106 reg = <0 0xfea50000 0 0x1000>;
3115 reg = <0 0xfea60000 0 0x1000>;
3124 reg = <0 0xfea70000 0 0x1000>;
3132 reg = <0 0xfea80000 0 0x10000>;
3141 #size-cells = <0>;
3143 port@0 {
3144 reg = <0>;
3149 #size-cells = <0>;
3153 csi20vin0: endpoint@0 {
3154 reg = <0>;
3191 reg = <0 0xfeaa0000 0 0x10000>;
3200 #size-cells = <0>;
3202 port@0 {
3203 reg = <0>;
3208 #size-cells = <0>;
3212 csi40vin0: endpoint@0 {
3213 reg = <0>;
3234 reg = <0 0xfeab0000 0 0x10000>;
3243 #size-cells = <0>;
3245 port@0 {
3246 reg = <0>;
3251 #size-cells = <0>;
3255 csi41vin4: endpoint@0 {
3256 reg = <0>;
3277 reg = <0 0xfead0000 0 0x10000>;
3287 #size-cells = <0>;
3288 port@0 {
3289 reg = <0>;
3306 reg = <0 0xfeae0000 0 0x10000>;
3316 #size-cells = <0>;
3317 port@0 {
3318 reg = <0>;
3335 reg = <0 0xfeb00000 0 0x80000>;
3342 clock-names = "du.0", "du.1", "du.2", "du.3";
3344 reset-names = "du.0", "du.2";
3347 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3354 #size-cells = <0>;
3356 port@0 {
3357 reg = <0>;
3382 reg = <0 0xfeb90000 0 0x14>;
3390 #size-cells = <0>;
3392 port@0 {
3393 reg = <0>;
3406 reg = <0 0xfff00044 0 4>;
3415 thermal-sensors = <&tsc 0>;
3470 cooling-device = <&a53_0 0 2>;
3489 #clock-cells = <0>;
3490 clock-frequency = <0>;
3495 #clock-cells = <0>;
3496 clock-frequency = <0>;