Lines Matching +full:power +full:- +full:domains
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774e1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
41 /* External CAN clock - to be overridden by boards that provide it */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
49 compatible = "operating-points-v2";
50 opp-shared;
52 opp-500000000 {
53 opp-hz = /bits/ 64 <500000000>;
54 opp-microvolt = <820000>;
55 clock-latency-ns = <300000>;
57 opp-1000000000 {
58 opp-hz = /bits/ 64 <1000000000>;
59 opp-microvolt = <820000>;
60 clock-latency-ns = <300000>;
62 opp-1500000000 {
63 opp-hz = /bits/ 64 <1500000000>;
64 opp-microvolt = <820000>;
65 clock-latency-ns = <300000>;
66 opp-suspend;
70 cluster1_opp: opp-table-1 {
71 compatible = "operating-points-v2";
72 opp-shared;
74 opp-800000000 {
75 opp-hz = /bits/ 64 <800000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
79 opp-1000000000 {
80 opp-hz = /bits/ 64 <1000000000>;
81 opp-microvolt = <820000>;
82 clock-latency-ns = <300000>;
84 opp-1200000000 {
85 opp-hz = /bits/ 64 <1200000000>;
86 opp-microvolt = <820000>;
87 clock-latency-ns = <300000>;
92 #address-cells = <1>;
93 #size-cells = <0>;
95 cpu-map {
128 compatible = "arm,cortex-a57";
131 power-domains = <&sysc R8A774E1_PD_CA57_CPU0>;
132 next-level-cache = <&L2_CA57>;
133 enable-method = "psci";
134 cpu-idle-states = <&CPU_SLEEP_0>;
135 dynamic-power-coefficient = <854>;
137 operating-points-v2 = <&cluster0_opp>;
138 capacity-dmips-mhz = <1024>;
139 #cooling-cells = <2>;
143 compatible = "arm,cortex-a57";
146 power-domains = <&sysc R8A774E1_PD_CA57_CPU1>;
147 next-level-cache = <&L2_CA57>;
148 enable-method = "psci";
149 cpu-idle-states = <&CPU_SLEEP_0>;
151 operating-points-v2 = <&cluster0_opp>;
152 capacity-dmips-mhz = <1024>;
153 #cooling-cells = <2>;
157 compatible = "arm,cortex-a57";
160 power-domains = <&sysc R8A774E1_PD_CA57_CPU2>;
161 next-level-cache = <&L2_CA57>;
162 enable-method = "psci";
163 cpu-idle-states = <&CPU_SLEEP_0>;
165 operating-points-v2 = <&cluster0_opp>;
166 capacity-dmips-mhz = <1024>;
167 #cooling-cells = <2>;
171 compatible = "arm,cortex-a57";
174 power-domains = <&sysc R8A774E1_PD_CA57_CPU3>;
175 next-level-cache = <&L2_CA57>;
176 enable-method = "psci";
177 cpu-idle-states = <&CPU_SLEEP_0>;
179 operating-points-v2 = <&cluster0_opp>;
180 capacity-dmips-mhz = <1024>;
181 #cooling-cells = <2>;
185 compatible = "arm,cortex-a53";
188 power-domains = <&sysc R8A774E1_PD_CA53_CPU0>;
189 next-level-cache = <&L2_CA53>;
190 enable-method = "psci";
191 cpu-idle-states = <&CPU_SLEEP_1>;
192 #cooling-cells = <2>;
193 dynamic-power-coefficient = <277>;
195 operating-points-v2 = <&cluster1_opp>;
196 capacity-dmips-mhz = <535>;
200 compatible = "arm,cortex-a53";
203 power-domains = <&sysc R8A774E1_PD_CA53_CPU1>;
204 next-level-cache = <&L2_CA53>;
205 enable-method = "psci";
206 cpu-idle-states = <&CPU_SLEEP_1>;
208 operating-points-v2 = <&cluster1_opp>;
209 capacity-dmips-mhz = <535>;
213 compatible = "arm,cortex-a53";
216 power-domains = <&sysc R8A774E1_PD_CA53_CPU2>;
217 next-level-cache = <&L2_CA53>;
218 enable-method = "psci";
219 cpu-idle-states = <&CPU_SLEEP_1>;
221 operating-points-v2 = <&cluster1_opp>;
222 capacity-dmips-mhz = <535>;
226 compatible = "arm,cortex-a53";
229 power-domains = <&sysc R8A774E1_PD_CA53_CPU3>;
230 next-level-cache = <&L2_CA53>;
231 enable-method = "psci";
232 cpu-idle-states = <&CPU_SLEEP_1>;
234 operating-points-v2 = <&cluster1_opp>;
235 capacity-dmips-mhz = <535>;
238 L2_CA57: cache-controller-0 {
240 power-domains = <&sysc R8A774E1_PD_CA57_SCU>;
241 cache-unified;
242 cache-level = <2>;
245 L2_CA53: cache-controller-1 {
247 power-domains = <&sysc R8A774E1_PD_CA53_SCU>;
248 cache-unified;
249 cache-level = <2>;
252 idle-states {
253 entry-method = "psci";
255 CPU_SLEEP_0: cpu-sleep-0 {
256 compatible = "arm,idle-state";
257 arm,psci-suspend-param = <0x0010000>;
258 local-timer-stop;
259 entry-latency-us = <400>;
260 exit-latency-us = <500>;
261 min-residency-us = <4000>;
264 CPU_SLEEP_1: cpu-sleep-1 {
265 compatible = "arm,idle-state";
266 arm,psci-suspend-param = <0x0010000>;
267 local-timer-stop;
268 entry-latency-us = <700>;
269 exit-latency-us = <700>;
270 min-residency-us = <5000>;
276 compatible = "fixed-clock";
277 #clock-cells = <0>;
279 clock-frequency = <0>;
280 bootph-all;
284 compatible = "fixed-clock";
285 #clock-cells = <0>;
287 clock-frequency = <0>;
288 bootph-all;
291 /* External PCIe clock - can be overridden by the board */
293 compatible = "fixed-clock";
294 #clock-cells = <0>;
295 clock-frequency = <0>;
299 compatible = "arm,cortex-a53-pmu";
300 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
304 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
308 compatible = "arm,cortex-a57-pmu";
309 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
313 interrupt-affinity = <&a57_0>, <&a57_1>, <&a57_2>, <&a57_3>;
317 compatible = "arm,psci-1.0", "arm,psci-0.2";
321 /* External SCIF clock - to be overridden by boards that provide it */
323 compatible = "fixed-clock";
324 #clock-cells = <0>;
325 clock-frequency = <0>;
329 compatible = "simple-bus";
330 interrupt-parent = <&gic>;
331 bootph-all;
333 #address-cells = <2>;
334 #size-cells = <2>;
338 compatible = "renesas,r8a774e1-wdt",
339 "renesas,rcar-gen3-wdt";
343 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
349 compatible = "renesas,gpio-r8a774e1",
350 "renesas,rcar-gen3-gpio";
353 #gpio-cells = <2>;
354 gpio-controller;
355 gpio-ranges = <&pfc 0 0 16>;
356 #interrupt-cells = <2>;
357 interrupt-controller;
359 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
364 compatible = "renesas,gpio-r8a774e1",
365 "renesas,rcar-gen3-gpio";
368 #gpio-cells = <2>;
369 gpio-controller;
370 gpio-ranges = <&pfc 0 32 29>;
371 #interrupt-cells = <2>;
372 interrupt-controller;
374 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
379 compatible = "renesas,gpio-r8a774e1",
380 "renesas,rcar-gen3-gpio";
383 #gpio-cells = <2>;
384 gpio-controller;
385 gpio-ranges = <&pfc 0 64 15>;
386 #interrupt-cells = <2>;
387 interrupt-controller;
389 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
394 compatible = "renesas,gpio-r8a774e1",
395 "renesas,rcar-gen3-gpio";
398 #gpio-cells = <2>;
399 gpio-controller;
400 gpio-ranges = <&pfc 0 96 16>;
401 #interrupt-cells = <2>;
402 interrupt-controller;
404 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
409 compatible = "renesas,gpio-r8a774e1",
410 "renesas,rcar-gen3-gpio";
413 #gpio-cells = <2>;
414 gpio-controller;
415 gpio-ranges = <&pfc 0 128 18>;
416 #interrupt-cells = <2>;
417 interrupt-controller;
419 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
424 compatible = "renesas,gpio-r8a774e1",
425 "renesas,rcar-gen3-gpio";
428 #gpio-cells = <2>;
429 gpio-controller;
430 gpio-ranges = <&pfc 0 160 26>;
431 #interrupt-cells = <2>;
432 interrupt-controller;
434 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
439 compatible = "renesas,gpio-r8a774e1",
440 "renesas,rcar-gen3-gpio";
443 #gpio-cells = <2>;
444 gpio-controller;
445 gpio-ranges = <&pfc 0 192 32>;
446 #interrupt-cells = <2>;
447 interrupt-controller;
449 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
454 compatible = "renesas,gpio-r8a774e1",
455 "renesas,rcar-gen3-gpio";
458 #gpio-cells = <2>;
459 gpio-controller;
460 gpio-ranges = <&pfc 0 224 4>;
461 #interrupt-cells = <2>;
462 interrupt-controller;
464 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
469 compatible = "renesas,pfc-r8a774e1";
471 bootph-all;
475 compatible = "renesas,r8a774e1-cmt0",
476 "renesas,rcar-gen3-cmt0";
481 clock-names = "fck";
482 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
488 compatible = "renesas,r8a774e1-cmt1",
489 "renesas,rcar-gen3-cmt1";
500 clock-names = "fck";
501 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
507 compatible = "renesas,r8a774e1-cmt1",
508 "renesas,rcar-gen3-cmt1";
519 clock-names = "fck";
520 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
526 compatible = "renesas,r8a774e1-cmt1",
527 "renesas,rcar-gen3-cmt1";
538 clock-names = "fck";
539 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
544 cpg: clock-controller@e6150000 {
545 compatible = "renesas,r8a774e1-cpg-mssr";
548 clock-names = "extal", "extalr";
549 #clock-cells = <2>;
550 #power-domain-cells = <0>;
551 #reset-cells = <1>;
552 bootph-all;
555 rst: reset-controller@e6160000 {
556 compatible = "renesas,r8a774e1-rst";
558 bootph-all;
561 sysc: system-controller@e6180000 {
562 compatible = "renesas,r8a774e1-sysc";
564 #power-domain-cells = <1>;
568 compatible = "renesas,r8a774e1-thermal";
576 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
578 #thermal-sensor-cells = <1>;
581 intc_ex: interrupt-controller@e61c0000 {
582 compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc";
583 #interrupt-cells = <2>;
584 interrupt-controller;
593 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
598 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
603 interrupt-names = "tuni0", "tuni1", "tuni2";
605 clock-names = "fck";
606 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
612 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
618 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
620 clock-names = "fck";
621 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
627 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
633 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
635 clock-names = "fck";
636 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
642 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
647 interrupt-names = "tuni0", "tuni1", "tuni2";
649 clock-names = "fck";
650 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
656 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
661 interrupt-names = "tuni0", "tuni1", "tuni2";
663 clock-names = "fck";
664 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
670 #address-cells = <1>;
671 #size-cells = <0>;
672 compatible = "renesas,i2c-r8a774e1",
673 "renesas,rcar-gen3-i2c";
677 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
681 dma-names = "tx", "rx", "tx", "rx";
682 i2c-scl-internal-delay-ns = <110>;
687 #address-cells = <1>;
688 #size-cells = <0>;
689 compatible = "renesas,i2c-r8a774e1",
690 "renesas,rcar-gen3-i2c";
694 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
698 dma-names = "tx", "rx", "tx", "rx";
699 i2c-scl-internal-delay-ns = <6>;
704 #address-cells = <1>;
705 #size-cells = <0>;
706 compatible = "renesas,i2c-r8a774e1",
707 "renesas,rcar-gen3-i2c";
711 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
715 dma-names = "tx", "rx", "tx", "rx";
716 i2c-scl-internal-delay-ns = <6>;
721 #address-cells = <1>;
722 #size-cells = <0>;
723 compatible = "renesas,i2c-r8a774e1",
724 "renesas,rcar-gen3-i2c";
728 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
731 dma-names = "tx", "rx";
732 i2c-scl-internal-delay-ns = <110>;
737 #address-cells = <1>;
738 #size-cells = <0>;
739 compatible = "renesas,i2c-r8a774e1",
740 "renesas,rcar-gen3-i2c";
744 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
747 dma-names = "tx", "rx";
748 i2c-scl-internal-delay-ns = <110>;
753 #address-cells = <1>;
754 #size-cells = <0>;
755 compatible = "renesas,i2c-r8a774e1",
756 "renesas,rcar-gen3-i2c";
760 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
763 dma-names = "tx", "rx";
764 i2c-scl-internal-delay-ns = <110>;
769 #address-cells = <1>;
770 #size-cells = <0>;
771 compatible = "renesas,i2c-r8a774e1",
772 "renesas,rcar-gen3-i2c";
776 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
779 dma-names = "tx", "rx";
780 i2c-scl-internal-delay-ns = <6>;
785 #address-cells = <1>;
786 #size-cells = <0>;
787 compatible = "renesas,iic-r8a774e1",
788 "renesas,rcar-gen3-iic",
789 "renesas,rmobile-iic";
793 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
796 dma-names = "tx", "rx";
801 compatible = "renesas,hscif-r8a774e1",
802 "renesas,rcar-gen3-hscif",
809 clock-names = "fck", "brg_int", "scif_clk";
812 dma-names = "tx", "rx", "tx", "rx";
813 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
819 compatible = "renesas,hscif-r8a774e1",
820 "renesas,rcar-gen3-hscif",
827 clock-names = "fck", "brg_int", "scif_clk";
830 dma-names = "tx", "rx", "tx", "rx";
831 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
837 compatible = "renesas,hscif-r8a774e1",
838 "renesas,rcar-gen3-hscif",
845 clock-names = "fck", "brg_int", "scif_clk";
848 dma-names = "tx", "rx", "tx", "rx";
849 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
855 compatible = "renesas,hscif-r8a774e1",
856 "renesas,rcar-gen3-hscif",
863 clock-names = "fck", "brg_int", "scif_clk";
865 dma-names = "tx", "rx";
866 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
872 compatible = "renesas,hscif-r8a774e1",
873 "renesas,rcar-gen3-hscif",
880 clock-names = "fck", "brg_int", "scif_clk";
882 dma-names = "tx", "rx";
883 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
889 compatible = "renesas,usbhs-r8a774e1",
890 "renesas,rcar-gen3-usbhs";
896 dma-names = "ch0", "ch1", "ch2", "ch3";
899 phy-names = "usb";
900 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
905 usb2_clksel: clock-controller@e6590630 {
906 compatible = "renesas,r8a774e1-rcar-usb2-clock-sel",
907 "renesas,rcar-gen3-usb2-clock-sel";
911 clock-names = "ehci_ohci", "hs-usb-if",
913 #clock-cells = <0>;
914 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
916 reset-names = "ehci_ohci", "hs-usb-if";
920 usb_dmac0: dma-controller@e65a0000 {
921 compatible = "renesas,r8a774e1-usb-dmac",
922 "renesas,usb-dmac";
926 interrupt-names = "ch0", "ch1";
928 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
930 #dma-cells = <1>;
931 dma-channels = <2>;
934 usb_dmac1: dma-controller@e65b0000 {
935 compatible = "renesas,r8a774e1-usb-dmac",
936 "renesas,usb-dmac";
940 interrupt-names = "ch0", "ch1";
942 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
944 #dma-cells = <1>;
945 dma-channels = <2>;
948 usb3_phy0: usb-phy@e65ee000 {
949 compatible = "renesas,r8a774e1-usb3-phy",
950 "renesas,rcar-gen3-usb3-phy";
954 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
955 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
957 #phy-cells = <0>;
961 dmac0: dma-controller@e6700000 {
962 compatible = "renesas,dmac-r8a774e1",
963 "renesas,rcar-dmac";
982 interrupt-names = "error",
988 clock-names = "fck";
989 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
991 #dma-cells = <1>;
992 dma-channels = <16>;
1003 dmac1: dma-controller@e7300000 {
1004 compatible = "renesas,dmac-r8a774e1",
1005 "renesas,rcar-dmac";
1024 interrupt-names = "error",
1030 clock-names = "fck";
1031 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1033 #dma-cells = <1>;
1034 dma-channels = <16>;
1045 dmac2: dma-controller@e7310000 {
1046 compatible = "renesas,dmac-r8a774e1",
1047 "renesas,rcar-dmac";
1066 interrupt-names = "error",
1072 clock-names = "fck";
1073 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1075 #dma-cells = <1>;
1076 dma-channels = <16>;
1088 compatible = "renesas,ipmmu-r8a774e1";
1090 renesas,ipmmu-main = <&ipmmu_mm 0>;
1091 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1092 #iommu-cells = <1>;
1096 compatible = "renesas,ipmmu-r8a774e1";
1098 renesas,ipmmu-main = <&ipmmu_mm 1>;
1099 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1100 #iommu-cells = <1>;
1104 compatible = "renesas,ipmmu-r8a774e1";
1106 renesas,ipmmu-main = <&ipmmu_mm 2>;
1107 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1108 #iommu-cells = <1>;
1112 compatible = "renesas,ipmmu-r8a774e1";
1116 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1117 #iommu-cells = <1>;
1121 compatible = "renesas,ipmmu-r8a774e1";
1123 renesas,ipmmu-main = <&ipmmu_mm 4>;
1124 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1125 #iommu-cells = <1>;
1129 compatible = "renesas,ipmmu-r8a774e1";
1131 renesas,ipmmu-main = <&ipmmu_mm 6>;
1132 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1133 #iommu-cells = <1>;
1137 compatible = "renesas,ipmmu-r8a774e1";
1139 renesas,ipmmu-main = <&ipmmu_mm 7>;
1140 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1141 #iommu-cells = <1>;
1145 compatible = "renesas,ipmmu-r8a774e1";
1147 renesas,ipmmu-main = <&ipmmu_mm 8>;
1148 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1149 #iommu-cells = <1>;
1153 compatible = "renesas,ipmmu-r8a774e1";
1155 renesas,ipmmu-main = <&ipmmu_mm 9>;
1156 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1157 #iommu-cells = <1>;
1161 compatible = "renesas,ipmmu-r8a774e1";
1163 renesas,ipmmu-main = <&ipmmu_mm 12>;
1164 power-domains = <&sysc R8A774E1_PD_A3VC>;
1165 #iommu-cells = <1>;
1169 compatible = "renesas,ipmmu-r8a774e1";
1171 renesas,ipmmu-main = <&ipmmu_mm 13>;
1172 power-domains = <&sysc R8A774E1_PD_A3VC>;
1173 #iommu-cells = <1>;
1177 compatible = "renesas,ipmmu-r8a774e1";
1179 renesas,ipmmu-main = <&ipmmu_mm 14>;
1180 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1181 #iommu-cells = <1>;
1185 compatible = "renesas,ipmmu-r8a774e1";
1187 renesas,ipmmu-main = <&ipmmu_mm 15>;
1188 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1189 #iommu-cells = <1>;
1193 compatible = "renesas,ipmmu-r8a774e1";
1195 renesas,ipmmu-main = <&ipmmu_mm 16>;
1196 power-domains = <&sysc R8A774E1_PD_A3VP>;
1197 #iommu-cells = <1>;
1201 compatible = "renesas,ipmmu-r8a774e1";
1203 renesas,ipmmu-main = <&ipmmu_mm 17>;
1204 power-domains = <&sysc R8A774E1_PD_A3VP>;
1205 #iommu-cells = <1>;
1209 compatible = "renesas,etheravb-r8a774e1",
1210 "renesas,etheravb-rcar-gen3";
1237 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1245 clock-names = "fck";
1246 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1248 phy-mode = "rgmii";
1249 rx-internal-delay-ps = <0>;
1250 tx-internal-delay-ps = <0>;
1252 #address-cells = <1>;
1253 #size-cells = <0>;
1258 compatible = "renesas,can-r8a774e1",
1259 "renesas,rcar-gen3-can";
1265 clock-names = "clkp1", "clkp2", "can_clk";
1266 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1267 assigned-clock-rates = <40000000>;
1268 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1274 compatible = "renesas,can-r8a774e1",
1275 "renesas,rcar-gen3-can";
1281 clock-names = "clkp1", "clkp2", "can_clk";
1282 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1283 assigned-clock-rates = <40000000>;
1284 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1290 compatible = "renesas,r8a774e1-canfd",
1291 "renesas,rcar-gen3-canfd";
1295 interrupt-names = "ch_int", "g_int";
1299 clock-names = "fck", "canfd", "can_clk";
1300 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1301 assigned-clock-rates = <40000000>;
1302 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1316 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1319 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1321 #pwm-cells = <2>;
1326 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1329 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1331 #pwm-cells = <2>;
1336 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1339 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1341 #pwm-cells = <2>;
1346 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1349 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1351 #pwm-cells = <2>;
1356 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1359 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1361 #pwm-cells = <2>;
1366 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1369 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1371 #pwm-cells = <2>;
1376 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1379 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1381 #pwm-cells = <2>;
1386 compatible = "renesas,scif-r8a774e1",
1387 "renesas,rcar-gen3-scif", "renesas,scif";
1393 clock-names = "fck", "brg_int", "scif_clk";
1396 dma-names = "tx", "rx", "tx", "rx";
1397 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1403 compatible = "renesas,scif-r8a774e1",
1404 "renesas,rcar-gen3-scif", "renesas,scif";
1410 clock-names = "fck", "brg_int", "scif_clk";
1413 dma-names = "tx", "rx", "tx", "rx";
1414 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1420 compatible = "renesas,scif-r8a774e1",
1421 "renesas,rcar-gen3-scif", "renesas,scif";
1427 clock-names = "fck", "brg_int", "scif_clk";
1430 dma-names = "tx", "rx", "tx", "rx";
1431 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1437 compatible = "renesas,scif-r8a774e1",
1438 "renesas,rcar-gen3-scif", "renesas,scif";
1444 clock-names = "fck", "brg_int", "scif_clk";
1446 dma-names = "tx", "rx";
1447 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1453 compatible = "renesas,scif-r8a774e1",
1454 "renesas,rcar-gen3-scif", "renesas,scif";
1460 clock-names = "fck", "brg_int", "scif_clk";
1462 dma-names = "tx", "rx";
1463 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1469 compatible = "renesas,scif-r8a774e1",
1470 "renesas,rcar-gen3-scif", "renesas,scif";
1476 clock-names = "fck", "brg_int", "scif_clk";
1479 dma-names = "tx", "rx", "tx", "rx";
1480 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1486 compatible = "renesas,msiof-r8a774e1",
1487 "renesas,rcar-gen3-msiof";
1493 dma-names = "tx", "rx", "tx", "rx";
1494 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1496 #address-cells = <1>;
1497 #size-cells = <0>;
1502 compatible = "renesas,msiof-r8a774e1",
1503 "renesas,rcar-gen3-msiof";
1509 dma-names = "tx", "rx", "tx", "rx";
1510 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1512 #address-cells = <1>;
1513 #size-cells = <0>;
1518 compatible = "renesas,msiof-r8a774e1",
1519 "renesas,rcar-gen3-msiof";
1524 dma-names = "tx", "rx";
1525 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1527 #address-cells = <1>;
1528 #size-cells = <0>;
1533 compatible = "renesas,msiof-r8a774e1",
1534 "renesas,rcar-gen3-msiof";
1539 dma-names = "tx", "rx";
1540 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1542 #address-cells = <1>;
1543 #size-cells = <0>;
1548 compatible = "renesas,vin-r8a774e1";
1552 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1558 #address-cells = <1>;
1559 #size-cells = <0>;
1562 #address-cells = <1>;
1563 #size-cells = <0>;
1569 remote-endpoint = <&csi20vin0>;
1573 remote-endpoint = <&csi40vin0>;
1580 compatible = "renesas,vin-r8a774e1";
1584 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1590 #address-cells = <1>;
1591 #size-cells = <0>;
1594 #address-cells = <1>;
1595 #size-cells = <0>;
1601 remote-endpoint = <&csi20vin1>;
1605 remote-endpoint = <&csi40vin1>;
1612 compatible = "renesas,vin-r8a774e1";
1616 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1622 #address-cells = <1>;
1623 #size-cells = <0>;
1626 #address-cells = <1>;
1627 #size-cells = <0>;
1633 remote-endpoint = <&csi20vin2>;
1637 remote-endpoint = <&csi40vin2>;
1644 compatible = "renesas,vin-r8a774e1";
1648 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1654 #address-cells = <1>;
1655 #size-cells = <0>;
1658 #address-cells = <1>;
1659 #size-cells = <0>;
1665 remote-endpoint = <&csi20vin3>;
1669 remote-endpoint = <&csi40vin3>;
1676 compatible = "renesas,vin-r8a774e1";
1680 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1686 #address-cells = <1>;
1687 #size-cells = <0>;
1690 #address-cells = <1>;
1691 #size-cells = <0>;
1697 remote-endpoint = <&csi20vin4>;
1704 compatible = "renesas,vin-r8a774e1";
1708 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1714 #address-cells = <1>;
1715 #size-cells = <0>;
1718 #address-cells = <1>;
1719 #size-cells = <0>;
1725 remote-endpoint = <&csi20vin5>;
1732 compatible = "renesas,vin-r8a774e1";
1736 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1742 #address-cells = <1>;
1743 #size-cells = <0>;
1746 #address-cells = <1>;
1747 #size-cells = <0>;
1753 remote-endpoint = <&csi20vin6>;
1760 compatible = "renesas,vin-r8a774e1";
1764 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1770 #address-cells = <1>;
1771 #size-cells = <0>;
1774 #address-cells = <1>;
1775 #size-cells = <0>;
1781 remote-endpoint = <&csi20vin7>;
1789 * #sound-dai-cells is required if simple-card
1791 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1792 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1795 * #clock-cells is required for audio_clkout0/1/2/3
1797 * clkout : #clock-cells = <0>; <&rcar_sound>;
1798 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1800 compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
1806 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1825 clock-names = "ssi-all",
1836 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1843 reset-names = "ssi-all",
1850 dvc0: dvc-0 {
1852 dma-names = "tx";
1854 dvc1: dvc-1 {
1856 dma-names = "tx";
1861 mix0: mix-0 { };
1862 mix1: mix-1 { };
1866 ctu00: ctu-0 { };
1867 ctu01: ctu-1 { };
1868 ctu02: ctu-2 { };
1869 ctu03: ctu-3 { };
1870 ctu10: ctu-4 { };
1871 ctu11: ctu-5 { };
1872 ctu12: ctu-6 { };
1873 ctu13: ctu-7 { };
1877 src0: src-0 {
1880 dma-names = "rx", "tx";
1882 src1: src-1 {
1885 dma-names = "rx", "tx";
1887 src2: src-2 {
1890 dma-names = "rx", "tx";
1892 src3: src-3 {
1895 dma-names = "rx", "tx";
1897 src4: src-4 {
1900 dma-names = "rx", "tx";
1902 src5: src-5 {
1905 dma-names = "rx", "tx";
1907 src6: src-6 {
1910 dma-names = "rx", "tx";
1912 src7: src-7 {
1915 dma-names = "rx", "tx";
1917 src8: src-8 {
1920 dma-names = "rx", "tx";
1922 src9: src-9 {
1925 dma-names = "rx", "tx";
1930 ssiu00: ssiu-0 {
1932 dma-names = "rx", "tx";
1934 ssiu01: ssiu-1 {
1936 dma-names = "rx", "tx";
1938 ssiu02: ssiu-2 {
1940 dma-names = "rx", "tx";
1942 ssiu03: ssiu-3 {
1944 dma-names = "rx", "tx";
1946 ssiu04: ssiu-4 {
1948 dma-names = "rx", "tx";
1950 ssiu05: ssiu-5 {
1952 dma-names = "rx", "tx";
1954 ssiu06: ssiu-6 {
1956 dma-names = "rx", "tx";
1958 ssiu07: ssiu-7 {
1960 dma-names = "rx", "tx";
1962 ssiu10: ssiu-8 {
1964 dma-names = "rx", "tx";
1966 ssiu11: ssiu-9 {
1968 dma-names = "rx", "tx";
1970 ssiu12: ssiu-10 {
1972 dma-names = "rx", "tx";
1974 ssiu13: ssiu-11 {
1976 dma-names = "rx", "tx";
1978 ssiu14: ssiu-12 {
1980 dma-names = "rx", "tx";
1982 ssiu15: ssiu-13 {
1984 dma-names = "rx", "tx";
1986 ssiu16: ssiu-14 {
1988 dma-names = "rx", "tx";
1990 ssiu17: ssiu-15 {
1992 dma-names = "rx", "tx";
1994 ssiu20: ssiu-16 {
1996 dma-names = "rx", "tx";
1998 ssiu21: ssiu-17 {
2000 dma-names = "rx", "tx";
2002 ssiu22: ssiu-18 {
2004 dma-names = "rx", "tx";
2006 ssiu23: ssiu-19 {
2008 dma-names = "rx", "tx";
2010 ssiu24: ssiu-20 {
2012 dma-names = "rx", "tx";
2014 ssiu25: ssiu-21 {
2016 dma-names = "rx", "tx";
2018 ssiu26: ssiu-22 {
2020 dma-names = "rx", "tx";
2022 ssiu27: ssiu-23 {
2024 dma-names = "rx", "tx";
2026 ssiu30: ssiu-24 {
2028 dma-names = "rx", "tx";
2030 ssiu31: ssiu-25 {
2032 dma-names = "rx", "tx";
2034 ssiu32: ssiu-26 {
2036 dma-names = "rx", "tx";
2038 ssiu33: ssiu-27 {
2040 dma-names = "rx", "tx";
2042 ssiu34: ssiu-28 {
2044 dma-names = "rx", "tx";
2046 ssiu35: ssiu-29 {
2048 dma-names = "rx", "tx";
2050 ssiu36: ssiu-30 {
2052 dma-names = "rx", "tx";
2054 ssiu37: ssiu-31 {
2056 dma-names = "rx", "tx";
2058 ssiu40: ssiu-32 {
2060 dma-names = "rx", "tx";
2062 ssiu41: ssiu-33 {
2064 dma-names = "rx", "tx";
2066 ssiu42: ssiu-34 {
2068 dma-names = "rx", "tx";
2070 ssiu43: ssiu-35 {
2072 dma-names = "rx", "tx";
2074 ssiu44: ssiu-36 {
2076 dma-names = "rx", "tx";
2078 ssiu45: ssiu-37 {
2080 dma-names = "rx", "tx";
2082 ssiu46: ssiu-38 {
2084 dma-names = "rx", "tx";
2086 ssiu47: ssiu-39 {
2088 dma-names = "rx", "tx";
2090 ssiu50: ssiu-40 {
2092 dma-names = "rx", "tx";
2094 ssiu60: ssiu-41 {
2096 dma-names = "rx", "tx";
2098 ssiu70: ssiu-42 {
2100 dma-names = "rx", "tx";
2102 ssiu80: ssiu-43 {
2104 dma-names = "rx", "tx";
2106 ssiu90: ssiu-44 {
2108 dma-names = "rx", "tx";
2110 ssiu91: ssiu-45 {
2112 dma-names = "rx", "tx";
2114 ssiu92: ssiu-46 {
2116 dma-names = "rx", "tx";
2118 ssiu93: ssiu-47 {
2120 dma-names = "rx", "tx";
2122 ssiu94: ssiu-48 {
2124 dma-names = "rx", "tx";
2126 ssiu95: ssiu-49 {
2128 dma-names = "rx", "tx";
2130 ssiu96: ssiu-50 {
2132 dma-names = "rx", "tx";
2134 ssiu97: ssiu-51 {
2136 dma-names = "rx", "tx";
2141 ssi0: ssi-0 {
2144 dma-names = "rx", "tx";
2146 ssi1: ssi-1 {
2149 dma-names = "rx", "tx";
2151 ssi2: ssi-2 {
2154 dma-names = "rx", "tx";
2156 ssi3: ssi-3 {
2159 dma-names = "rx", "tx";
2161 ssi4: ssi-4 {
2164 dma-names = "rx", "tx";
2166 ssi5: ssi-5 {
2169 dma-names = "rx", "tx";
2171 ssi6: ssi-6 {
2174 dma-names = "rx", "tx";
2176 ssi7: ssi-7 {
2179 dma-names = "rx", "tx";
2181 ssi8: ssi-8 {
2184 dma-names = "rx", "tx";
2186 ssi9: ssi-9 {
2189 dma-names = "rx", "tx";
2194 audma0: dma-controller@ec700000 {
2195 compatible = "renesas,dmac-r8a774e1",
2196 "renesas,rcar-dmac";
2215 interrupt-names = "error",
2221 clock-names = "fck";
2222 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2224 #dma-cells = <1>;
2225 dma-channels = <16>;
2236 audma1: dma-controller@ec720000 {
2237 compatible = "renesas,dmac-r8a774e1",
2238 "renesas,rcar-dmac";
2257 interrupt-names = "error",
2263 clock-names = "fck";
2264 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2266 #dma-cells = <1>;
2267 dma-channels = <16>;
2279 compatible = "renesas,xhci-r8a774e1",
2280 "renesas,rcar-gen3-xhci";
2284 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2290 compatible = "renesas,r8a774e1-usb3-peri",
2291 "renesas,rcar-gen3-usb3-peri";
2295 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2301 compatible = "generic-ohci";
2306 phy-names = "usb";
2307 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2313 compatible = "generic-ohci";
2318 phy-names = "usb";
2319 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2325 compatible = "generic-ehci";
2330 phy-names = "usb";
2332 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2338 compatible = "generic-ehci";
2343 phy-names = "usb";
2345 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2350 usb2_phy0: usb-phy@ee080200 {
2351 compatible = "renesas,usb2-phy-r8a774e1",
2352 "renesas,rcar-gen3-usb2-phy";
2356 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2358 #phy-cells = <1>;
2362 usb2_phy1: usb-phy@ee0a0200 {
2363 compatible = "renesas,usb2-phy-r8a774e1",
2364 "renesas,rcar-gen3-usb2-phy";
2367 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2369 #phy-cells = <1>;
2374 compatible = "renesas,sdhi-r8a774e1",
2375 "renesas,rcar-gen3-sdhi";
2379 clock-names = "core", "clkh";
2380 max-frequency = <200000000>;
2381 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2388 compatible = "renesas,sdhi-r8a774e1",
2389 "renesas,rcar-gen3-sdhi";
2393 clock-names = "core", "clkh";
2394 max-frequency = <200000000>;
2395 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2402 compatible = "renesas,sdhi-r8a774e1",
2403 "renesas,rcar-gen3-sdhi";
2407 clock-names = "core", "clkh";
2408 max-frequency = <200000000>;
2409 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2416 compatible = "renesas,sdhi-r8a774e1",
2417 "renesas,rcar-gen3-sdhi";
2421 clock-names = "core", "clkh";
2422 max-frequency = <200000000>;
2423 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2430 compatible = "renesas,r8a774e1-rpc-if",
2431 "renesas,rcar-gen3-rpc-if";
2435 reg-names = "regs", "dirmap", "wbuf";
2438 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2440 #address-cells = <1>;
2441 #size-cells = <0>;
2446 compatible = "renesas,sata-r8a774e1",
2447 "renesas,rcar-gen3-sata";
2451 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2457 gic: interrupt-controller@f1010000 {
2458 compatible = "arm,gic-400";
2459 #interrupt-cells = <3>;
2460 #address-cells = <0>;
2461 interrupt-controller;
2469 clock-names = "clk";
2470 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2475 compatible = "renesas,pcie-r8a774e1",
2476 "renesas,pcie-rcar-gen3";
2478 #address-cells = <3>;
2479 #size-cells = <2>;
2480 bus-range = <0x00 0xff>;
2487 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2491 #interrupt-cells = <1>;
2492 interrupt-map-mask = <0 0 0 0>;
2493 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2495 clock-names = "pcie", "pcie_bus";
2496 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2498 iommu-map = <0 &ipmmu_hc 0 1>;
2499 iommu-map-mask = <0>;
2504 compatible = "renesas,pcie-r8a774e1",
2505 "renesas,pcie-rcar-gen3";
2507 #address-cells = <3>;
2508 #size-cells = <2>;
2509 bus-range = <0x00 0xff>;
2516 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2520 #interrupt-cells = <1>;
2521 interrupt-map-mask = <0 0 0 0>;
2522 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2524 clock-names = "pcie", "pcie_bus";
2525 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2527 iommu-map = <0 &ipmmu_hc 1 1>;
2528 iommu-map-mask = <0>;
2532 pciec0_ep: pcie-ep@fe000000 {
2533 compatible = "renesas,r8a774e1-pcie-ep",
2534 "renesas,rcar-gen3-pcie-ep";
2540 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2545 clock-names = "pcie";
2547 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2551 pciec1_ep: pcie-ep@ee800000 {
2552 compatible = "renesas,r8a774e1-pcie-ep",
2553 "renesas,rcar-gen3-pcie-ep";
2559 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2564 clock-names = "pcie";
2566 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2575 power-domains = <&sysc R8A774E1_PD_A3VP>;
2586 power-domains = <&sysc R8A774E1_PD_A3VP>;
2597 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2608 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2619 power-domains = <&sysc R8A774E1_PD_A3VP>;
2630 power-domains = <&sysc R8A774E1_PD_A3VP>;
2641 power-domains = <&sysc R8A774E1_PD_A3VP>;
2651 power-domains = <&sysc R8A774E1_PD_A3VP>;
2660 power-domains = <&sysc R8A774E1_PD_A3VP>;
2669 power-domains = <&sysc R8A774E1_PD_A3VP>;
2678 power-domains = <&sysc R8A774E1_PD_A3VP>;
2687 power-domains = <&sysc R8A774E1_PD_A3VP>;
2696 power-domains = <&sysc R8A774E1_PD_A3VP>;
2705 power-domains = <&sysc R8A774E1_PD_A3VP>;
2714 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2723 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2729 compatible = "renesas,r8a774e1-csi2";
2733 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2738 #address-cells = <1>;
2739 #size-cells = <0>;
2746 #address-cells = <1>;
2747 #size-cells = <0>;
2753 remote-endpoint = <&vin0csi20>;
2757 remote-endpoint = <&vin1csi20>;
2761 remote-endpoint = <&vin2csi20>;
2765 remote-endpoint = <&vin3csi20>;
2769 remote-endpoint = <&vin4csi20>;
2773 remote-endpoint = <&vin5csi20>;
2777 remote-endpoint = <&vin6csi20>;
2781 remote-endpoint = <&vin7csi20>;
2788 compatible = "renesas,r8a774e1-csi2";
2792 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2797 #address-cells = <1>;
2798 #size-cells = <0>;
2805 #address-cells = <1>;
2806 #size-cells = <0>;
2812 remote-endpoint = <&vin0csi40>;
2816 remote-endpoint = <&vin1csi40>;
2820 remote-endpoint = <&vin2csi40>;
2824 remote-endpoint = <&vin3csi40>;
2831 compatible = "renesas,r8a774e1-hdmi",
2832 "renesas,rcar-gen3-hdmi";
2837 clock-names = "iahb", "isfr";
2838 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2843 #address-cells = <1>;
2844 #size-cells = <0>;
2849 remote-endpoint = <&du_out_hdmi0>;
2863 compatible = "renesas,du-r8a774e1";
2871 clock-names = "du.0", "du.1", "du.3";
2873 reset-names = "du.0", "du.3";
2879 #address-cells = <1>;
2880 #size-cells = <0>;
2888 remote-endpoint = <&dw_hdmi0_in>;
2894 remote-endpoint = <&lvds0_in>;
2901 compatible = "renesas,r8a774e1-lvds";
2904 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2909 #address-cells = <1>;
2910 #size-cells = <0>;
2915 remote-endpoint = <&du_out_lvds0>;
2927 bootph-all;
2931 thermal-zones {
2932 sensor1_thermal: sensor1-thermal {
2933 polling-delay-passive = <250>;
2934 polling-delay = <1000>;
2935 thermal-sensors = <&tsc 0>;
2936 sustainable-power = <6313>;
2939 sensor1_crit: sensor1-crit {
2947 sensor2_thermal: sensor2-thermal {
2948 polling-delay-passive = <250>;
2949 polling-delay = <1000>;
2950 thermal-sensors = <&tsc 1>;
2951 sustainable-power = <6313>;
2954 sensor2_crit: sensor2-crit {
2962 sensor3_thermal: sensor3-thermal {
2963 polling-delay-passive = <250>;
2964 polling-delay = <1000>;
2965 thermal-sensors = <&tsc 2>;
2966 sustainable-power = <6313>;
2969 target: trip-point1 {
2975 sensor3_crit: sensor3-crit {
2982 cooling-maps {
2985 cooling-device = <&a57_0 0 2>;
2991 cooling-device = <&a53_0 0 2>;
2999 compatible = "arm,armv8-timer";
3000 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3004 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
3007 /* External USB clocks - can be overridden by the board */
3009 compatible = "fixed-clock";
3010 #clock-cells = <0>;
3011 clock-frequency = <0>;
3015 compatible = "fixed-clock";
3016 #clock-cells = <0>;
3017 clock-frequency = <0>;