Lines Matching +full:- +full:resets
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774b1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
41 /* External CAN clock - to be overridden by boards that provide it */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
49 compatible = "operating-points-v2";
50 opp-shared;
52 opp-500000000 {
53 opp-hz = /bits/ 64 <500000000>;
54 opp-microvolt = <830000>;
55 clock-latency-ns = <300000>;
57 opp-1000000000 {
58 opp-hz = /bits/ 64 <1000000000>;
59 opp-microvolt = <830000>;
60 clock-latency-ns = <300000>;
62 opp-1500000000 {
63 opp-hz = /bits/ 64 <1500000000>;
64 opp-microvolt = <830000>;
65 clock-latency-ns = <300000>;
66 opp-suspend;
71 #address-cells = <1>;
72 #size-cells = <0>;
75 compatible = "arm,cortex-a57";
78 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>;
79 next-level-cache = <&L2_CA57>;
80 enable-method = "psci";
81 #cooling-cells = <2>;
82 dynamic-power-coefficient = <854>;
84 operating-points-v2 = <&cluster0_opp>;
88 compatible = "arm,cortex-a57";
91 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>;
92 next-level-cache = <&L2_CA57>;
93 enable-method = "psci";
95 operating-points-v2 = <&cluster0_opp>;
98 L2_CA57: cache-controller-0 {
100 power-domains = <&sysc R8A774B1_PD_CA57_SCU>;
101 cache-unified;
102 cache-level = <2>;
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
110 clock-frequency = <0>;
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
117 clock-frequency = <0>;
120 /* External PCIe clock - can be overridden by the board */
122 compatible = "fixed-clock";
123 #clock-cells = <0>;
124 clock-frequency = <0>;
128 compatible = "arm,cortex-a57-pmu";
129 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
131 interrupt-affinity = <&a57_0>, <&a57_1>;
135 compatible = "arm,psci-1.0", "arm,psci-0.2";
139 /* External SCIF clock - to be overridden by boards that provide it */
141 compatible = "fixed-clock";
142 #clock-cells = <0>;
143 clock-frequency = <0>;
147 compatible = "simple-bus";
148 interrupt-parent = <&gic>;
149 #address-cells = <2>;
150 #size-cells = <2>;
154 compatible = "renesas,r8a774b1-wdt",
155 "renesas,rcar-gen3-wdt";
159 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
160 resets = <&cpg 402>;
165 compatible = "renesas,gpio-r8a774b1",
166 "renesas,rcar-gen3-gpio";
169 #gpio-cells = <2>;
170 gpio-controller;
171 gpio-ranges = <&pfc 0 0 16>;
172 #interrupt-cells = <2>;
173 interrupt-controller;
175 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
176 resets = <&cpg 912>;
180 compatible = "renesas,gpio-r8a774b1",
181 "renesas,rcar-gen3-gpio";
184 #gpio-cells = <2>;
185 gpio-controller;
186 gpio-ranges = <&pfc 0 32 29>;
187 #interrupt-cells = <2>;
188 interrupt-controller;
190 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
191 resets = <&cpg 911>;
195 compatible = "renesas,gpio-r8a774b1",
196 "renesas,rcar-gen3-gpio";
199 #gpio-cells = <2>;
200 gpio-controller;
201 gpio-ranges = <&pfc 0 64 15>;
202 #interrupt-cells = <2>;
203 interrupt-controller;
205 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
206 resets = <&cpg 910>;
210 compatible = "renesas,gpio-r8a774b1",
211 "renesas,rcar-gen3-gpio";
214 #gpio-cells = <2>;
215 gpio-controller;
216 gpio-ranges = <&pfc 0 96 16>;
217 #interrupt-cells = <2>;
218 interrupt-controller;
220 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
221 resets = <&cpg 909>;
225 compatible = "renesas,gpio-r8a774b1",
226 "renesas,rcar-gen3-gpio";
229 #gpio-cells = <2>;
230 gpio-controller;
231 gpio-ranges = <&pfc 0 128 18>;
232 #interrupt-cells = <2>;
233 interrupt-controller;
235 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
236 resets = <&cpg 908>;
240 compatible = "renesas,gpio-r8a774b1",
241 "renesas,rcar-gen3-gpio";
244 #gpio-cells = <2>;
245 gpio-controller;
246 gpio-ranges = <&pfc 0 160 26>;
247 #interrupt-cells = <2>;
248 interrupt-controller;
250 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
251 resets = <&cpg 907>;
255 compatible = "renesas,gpio-r8a774b1",
256 "renesas,rcar-gen3-gpio";
259 #gpio-cells = <2>;
260 gpio-controller;
261 gpio-ranges = <&pfc 0 192 32>;
262 #interrupt-cells = <2>;
263 interrupt-controller;
265 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
266 resets = <&cpg 906>;
270 compatible = "renesas,gpio-r8a774b1",
271 "renesas,rcar-gen3-gpio";
274 #gpio-cells = <2>;
275 gpio-controller;
276 gpio-ranges = <&pfc 0 224 4>;
277 #interrupt-cells = <2>;
278 interrupt-controller;
280 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
281 resets = <&cpg 905>;
285 compatible = "renesas,pfc-r8a774b1";
290 compatible = "renesas,r8a774b1-cmt0",
291 "renesas,rcar-gen3-cmt0";
296 clock-names = "fck";
297 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
298 resets = <&cpg 303>;
303 compatible = "renesas,r8a774b1-cmt1",
304 "renesas,rcar-gen3-cmt1";
315 clock-names = "fck";
316 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
317 resets = <&cpg 302>;
322 compatible = "renesas,r8a774b1-cmt1",
323 "renesas,rcar-gen3-cmt1";
334 clock-names = "fck";
335 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
336 resets = <&cpg 301>;
341 compatible = "renesas,r8a774b1-cmt1",
342 "renesas,rcar-gen3-cmt1";
353 clock-names = "fck";
354 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
355 resets = <&cpg 300>;
359 cpg: clock-controller@e6150000 {
360 compatible = "renesas,r8a774b1-cpg-mssr";
363 clock-names = "extal", "extalr";
364 #clock-cells = <2>;
365 #power-domain-cells = <0>;
366 #reset-cells = <1>;
369 rst: reset-controller@e6160000 {
370 compatible = "renesas,r8a774b1-rst";
374 sysc: system-controller@e6180000 {
375 compatible = "renesas,r8a774b1-sysc";
377 #power-domain-cells = <1>;
381 compatible = "renesas,r8a774b1-thermal";
389 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
390 resets = <&cpg 522>;
391 #thermal-sensor-cells = <1>;
394 intc_ex: interrupt-controller@e61c0000 {
395 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc";
396 #interrupt-cells = <2>;
397 interrupt-controller;
406 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
407 resets = <&cpg 407>;
411 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
416 interrupt-names = "tuni0", "tuni1", "tuni2";
418 clock-names = "fck";
419 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
420 resets = <&cpg 125>;
425 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
431 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
433 clock-names = "fck";
434 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
435 resets = <&cpg 124>;
440 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
446 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
448 clock-names = "fck";
449 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
450 resets = <&cpg 123>;
455 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
460 interrupt-names = "tuni0", "tuni1", "tuni2";
462 clock-names = "fck";
463 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
464 resets = <&cpg 122>;
469 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
474 interrupt-names = "tuni0", "tuni1", "tuni2";
476 clock-names = "fck";
477 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
478 resets = <&cpg 121>;
483 #address-cells = <1>;
484 #size-cells = <0>;
485 compatible = "renesas,i2c-r8a774b1",
486 "renesas,rcar-gen3-i2c";
490 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
491 resets = <&cpg 931>;
494 dma-names = "tx", "rx", "tx", "rx";
495 i2c-scl-internal-delay-ns = <110>;
500 #address-cells = <1>;
501 #size-cells = <0>;
502 compatible = "renesas,i2c-r8a774b1",
503 "renesas,rcar-gen3-i2c";
507 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
508 resets = <&cpg 930>;
511 dma-names = "tx", "rx", "tx", "rx";
512 i2c-scl-internal-delay-ns = <6>;
517 #address-cells = <1>;
518 #size-cells = <0>;
519 compatible = "renesas,i2c-r8a774b1",
520 "renesas,rcar-gen3-i2c";
524 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
525 resets = <&cpg 929>;
528 dma-names = "tx", "rx", "tx", "rx";
529 i2c-scl-internal-delay-ns = <6>;
534 #address-cells = <1>;
535 #size-cells = <0>;
536 compatible = "renesas,i2c-r8a774b1",
537 "renesas,rcar-gen3-i2c";
541 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
542 resets = <&cpg 928>;
544 dma-names = "tx", "rx";
545 i2c-scl-internal-delay-ns = <110>;
550 #address-cells = <1>;
551 #size-cells = <0>;
552 compatible = "renesas,i2c-r8a774b1",
553 "renesas,rcar-gen3-i2c";
557 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
558 resets = <&cpg 927>;
560 dma-names = "tx", "rx";
561 i2c-scl-internal-delay-ns = <110>;
566 #address-cells = <1>;
567 #size-cells = <0>;
568 compatible = "renesas,i2c-r8a774b1",
569 "renesas,rcar-gen3-i2c";
573 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
574 resets = <&cpg 919>;
576 dma-names = "tx", "rx";
577 i2c-scl-internal-delay-ns = <110>;
582 #address-cells = <1>;
583 #size-cells = <0>;
584 compatible = "renesas,i2c-r8a774b1",
585 "renesas,rcar-gen3-i2c";
589 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
590 resets = <&cpg 918>;
592 dma-names = "tx", "rx";
593 i2c-scl-internal-delay-ns = <6>;
598 #address-cells = <1>;
599 #size-cells = <0>;
600 compatible = "renesas,iic-r8a774b1",
601 "renesas,rcar-gen3-iic",
602 "renesas,rmobile-iic";
606 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
607 resets = <&cpg 926>;
609 dma-names = "tx", "rx";
614 compatible = "renesas,hscif-r8a774b1",
615 "renesas,rcar-gen3-hscif",
622 clock-names = "fck", "brg_int", "scif_clk";
625 dma-names = "tx", "rx", "tx", "rx";
626 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
627 resets = <&cpg 520>;
632 compatible = "renesas,hscif-r8a774b1",
633 "renesas,rcar-gen3-hscif",
640 clock-names = "fck", "brg_int", "scif_clk";
643 dma-names = "tx", "rx", "tx", "rx";
644 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
645 resets = <&cpg 519>;
650 compatible = "renesas,hscif-r8a774b1",
651 "renesas,rcar-gen3-hscif",
658 clock-names = "fck", "brg_int", "scif_clk";
661 dma-names = "tx", "rx", "tx", "rx";
662 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
663 resets = <&cpg 518>;
668 compatible = "renesas,hscif-r8a774b1",
669 "renesas,rcar-gen3-hscif",
676 clock-names = "fck", "brg_int", "scif_clk";
678 dma-names = "tx", "rx";
679 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
680 resets = <&cpg 517>;
685 compatible = "renesas,hscif-r8a774b1",
686 "renesas,rcar-gen3-hscif",
693 clock-names = "fck", "brg_int", "scif_clk";
695 dma-names = "tx", "rx";
696 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
697 resets = <&cpg 516>;
702 compatible = "renesas,usbhs-r8a774b1",
703 "renesas,rcar-gen3-usbhs";
709 dma-names = "ch0", "ch1", "ch2", "ch3";
712 phy-names = "usb";
713 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
714 resets = <&cpg 704>, <&cpg 703>;
718 usb2_clksel: clock-controller@e6590630 {
719 compatible = "renesas,r8a774b1-rcar-usb2-clock-sel",
720 "renesas,rcar-gen3-usb2-clock-sel";
724 clock-names = "ehci_ohci", "hs-usb-if",
726 #clock-cells = <0>;
727 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
728 resets = <&cpg 703>, <&cpg 704>;
729 reset-names = "ehci_ohci", "hs-usb-if";
733 usb_dmac0: dma-controller@e65a0000 {
734 compatible = "renesas,r8a774b1-usb-dmac",
735 "renesas,usb-dmac";
739 interrupt-names = "ch0", "ch1";
741 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
742 resets = <&cpg 330>;
743 #dma-cells = <1>;
744 dma-channels = <2>;
747 usb_dmac1: dma-controller@e65b0000 {
748 compatible = "renesas,r8a774b1-usb-dmac",
749 "renesas,usb-dmac";
753 interrupt-names = "ch0", "ch1";
755 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
756 resets = <&cpg 331>;
757 #dma-cells = <1>;
758 dma-channels = <2>;
761 usb3_phy0: usb-phy@e65ee000 {
762 compatible = "renesas,r8a774b1-usb3-phy",
763 "renesas,rcar-gen3-usb3-phy";
767 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
768 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
769 resets = <&cpg 328>;
770 #phy-cells = <0>;
774 dmac0: dma-controller@e6700000 {
775 compatible = "renesas,dmac-r8a774b1",
776 "renesas,rcar-dmac";
795 interrupt-names = "error",
801 clock-names = "fck";
802 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
803 resets = <&cpg 219>;
804 #dma-cells = <1>;
805 dma-channels = <16>;
816 dmac1: dma-controller@e7300000 {
817 compatible = "renesas,dmac-r8a774b1",
818 "renesas,rcar-dmac";
837 interrupt-names = "error",
843 clock-names = "fck";
844 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
845 resets = <&cpg 218>;
846 #dma-cells = <1>;
847 dma-channels = <16>;
858 dmac2: dma-controller@e7310000 {
859 compatible = "renesas,dmac-r8a774b1",
860 "renesas,rcar-dmac";
879 interrupt-names = "error",
885 clock-names = "fck";
886 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
887 resets = <&cpg 217>;
888 #dma-cells = <1>;
889 dma-channels = <16>;
901 compatible = "renesas,ipmmu-r8a774b1";
903 renesas,ipmmu-main = <&ipmmu_mm 0>;
904 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
905 #iommu-cells = <1>;
909 compatible = "renesas,ipmmu-r8a774b1";
911 renesas,ipmmu-main = <&ipmmu_mm 1>;
912 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
913 #iommu-cells = <1>;
917 compatible = "renesas,ipmmu-r8a774b1";
919 renesas,ipmmu-main = <&ipmmu_mm 2>;
920 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
921 #iommu-cells = <1>;
925 compatible = "renesas,ipmmu-r8a774b1";
929 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
930 #iommu-cells = <1>;
934 compatible = "renesas,ipmmu-r8a774b1";
936 renesas,ipmmu-main = <&ipmmu_mm 4>;
937 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
938 #iommu-cells = <1>;
942 compatible = "renesas,ipmmu-r8a774b1";
944 renesas,ipmmu-main = <&ipmmu_mm 6>;
945 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
946 #iommu-cells = <1>;
950 compatible = "renesas,ipmmu-r8a774b1";
952 renesas,ipmmu-main = <&ipmmu_mm 12>;
953 power-domains = <&sysc R8A774B1_PD_A3VC>;
954 #iommu-cells = <1>;
958 compatible = "renesas,ipmmu-r8a774b1";
960 renesas,ipmmu-main = <&ipmmu_mm 14>;
961 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
962 #iommu-cells = <1>;
966 compatible = "renesas,ipmmu-r8a774b1";
968 renesas,ipmmu-main = <&ipmmu_mm 16>;
969 power-domains = <&sysc R8A774B1_PD_A3VP>;
970 #iommu-cells = <1>;
974 compatible = "renesas,etheravb-r8a774b1",
975 "renesas,etheravb-rcar-gen3";
1002 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1010 clock-names = "fck";
1011 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1012 resets = <&cpg 812>;
1013 phy-mode = "rgmii";
1014 rx-internal-delay-ps = <0>;
1015 tx-internal-delay-ps = <0>;
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1023 compatible = "renesas,can-r8a774b1",
1024 "renesas,rcar-gen3-can";
1030 clock-names = "clkp1", "clkp2", "can_clk";
1031 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1032 assigned-clock-rates = <40000000>;
1033 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1034 resets = <&cpg 916>;
1039 compatible = "renesas,can-r8a774b1",
1040 "renesas,rcar-gen3-can";
1046 clock-names = "clkp1", "clkp2", "can_clk";
1047 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1048 assigned-clock-rates = <40000000>;
1049 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1050 resets = <&cpg 915>;
1055 compatible = "renesas,r8a774b1-canfd",
1056 "renesas,rcar-gen3-canfd";
1060 interrupt-names = "ch_int", "g_int";
1064 clock-names = "fck", "canfd", "can_clk";
1065 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1066 assigned-clock-rates = <40000000>;
1067 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1068 resets = <&cpg 914>;
1081 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1083 #pwm-cells = <2>;
1085 resets = <&cpg 523>;
1086 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1091 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1093 #pwm-cells = <2>;
1095 resets = <&cpg 523>;
1096 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1101 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1103 #pwm-cells = <2>;
1105 resets = <&cpg 523>;
1106 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1111 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1113 #pwm-cells = <2>;
1115 resets = <&cpg 523>;
1116 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1121 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1123 #pwm-cells = <2>;
1125 resets = <&cpg 523>;
1126 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1131 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1133 #pwm-cells = <2>;
1135 resets = <&cpg 523>;
1136 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1141 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1143 #pwm-cells = <2>;
1145 resets = <&cpg 523>;
1146 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1151 compatible = "renesas,scif-r8a774b1",
1152 "renesas,rcar-gen3-scif", "renesas,scif";
1158 clock-names = "fck", "brg_int", "scif_clk";
1161 dma-names = "tx", "rx", "tx", "rx";
1162 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1163 resets = <&cpg 207>;
1168 compatible = "renesas,scif-r8a774b1",
1169 "renesas,rcar-gen3-scif", "renesas,scif";
1175 clock-names = "fck", "brg_int", "scif_clk";
1178 dma-names = "tx", "rx", "tx", "rx";
1179 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1180 resets = <&cpg 206>;
1185 compatible = "renesas,scif-r8a774b1",
1186 "renesas,rcar-gen3-scif", "renesas,scif";
1192 clock-names = "fck", "brg_int", "scif_clk";
1195 dma-names = "tx", "rx", "tx", "rx";
1196 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1197 resets = <&cpg 310>;
1202 compatible = "renesas,scif-r8a774b1",
1203 "renesas,rcar-gen3-scif", "renesas,scif";
1209 clock-names = "fck", "brg_int", "scif_clk";
1211 dma-names = "tx", "rx";
1212 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1213 resets = <&cpg 204>;
1218 compatible = "renesas,scif-r8a774b1",
1219 "renesas,rcar-gen3-scif", "renesas,scif";
1225 clock-names = "fck", "brg_int", "scif_clk";
1227 dma-names = "tx", "rx";
1228 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1229 resets = <&cpg 203>;
1234 compatible = "renesas,scif-r8a774b1",
1235 "renesas,rcar-gen3-scif", "renesas,scif";
1241 clock-names = "fck", "brg_int", "scif_clk";
1244 dma-names = "tx", "rx", "tx", "rx";
1245 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1246 resets = <&cpg 202>;
1251 compatible = "renesas,msiof-r8a774b1",
1252 "renesas,rcar-gen3-msiof";
1258 dma-names = "tx", "rx", "tx", "rx";
1259 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1260 resets = <&cpg 211>;
1261 #address-cells = <1>;
1262 #size-cells = <0>;
1267 compatible = "renesas,msiof-r8a774b1",
1268 "renesas,rcar-gen3-msiof";
1274 dma-names = "tx", "rx", "tx", "rx";
1275 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1276 resets = <&cpg 210>;
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1283 compatible = "renesas,msiof-r8a774b1",
1284 "renesas,rcar-gen3-msiof";
1289 dma-names = "tx", "rx";
1290 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1291 resets = <&cpg 209>;
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1298 compatible = "renesas,msiof-r8a774b1",
1299 "renesas,rcar-gen3-msiof";
1304 dma-names = "tx", "rx";
1305 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1306 resets = <&cpg 208>;
1307 #address-cells = <1>;
1308 #size-cells = <0>;
1313 compatible = "renesas,vin-r8a774b1";
1317 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1318 resets = <&cpg 811>;
1323 #address-cells = <1>;
1324 #size-cells = <0>;
1327 #address-cells = <1>;
1328 #size-cells = <0>;
1334 remote-endpoint = <&csi20vin0>;
1338 remote-endpoint = <&csi40vin0>;
1345 compatible = "renesas,vin-r8a774b1";
1349 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1350 resets = <&cpg 810>;
1355 #address-cells = <1>;
1356 #size-cells = <0>;
1359 #address-cells = <1>;
1360 #size-cells = <0>;
1366 remote-endpoint = <&csi20vin1>;
1370 remote-endpoint = <&csi40vin1>;
1377 compatible = "renesas,vin-r8a774b1";
1381 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1382 resets = <&cpg 809>;
1387 #address-cells = <1>;
1388 #size-cells = <0>;
1391 #address-cells = <1>;
1392 #size-cells = <0>;
1398 remote-endpoint = <&csi20vin2>;
1402 remote-endpoint = <&csi40vin2>;
1409 compatible = "renesas,vin-r8a774b1";
1413 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1414 resets = <&cpg 808>;
1419 #address-cells = <1>;
1420 #size-cells = <0>;
1423 #address-cells = <1>;
1424 #size-cells = <0>;
1430 remote-endpoint = <&csi20vin3>;
1434 remote-endpoint = <&csi40vin3>;
1441 compatible = "renesas,vin-r8a774b1";
1445 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1446 resets = <&cpg 807>;
1451 #address-cells = <1>;
1452 #size-cells = <0>;
1455 #address-cells = <1>;
1456 #size-cells = <0>;
1462 remote-endpoint = <&csi20vin4>;
1466 remote-endpoint = <&csi40vin4>;
1473 compatible = "renesas,vin-r8a774b1";
1477 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1478 resets = <&cpg 806>;
1483 #address-cells = <1>;
1484 #size-cells = <0>;
1487 #address-cells = <1>;
1488 #size-cells = <0>;
1494 remote-endpoint = <&csi20vin5>;
1498 remote-endpoint = <&csi40vin5>;
1505 compatible = "renesas,vin-r8a774b1";
1509 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1510 resets = <&cpg 805>;
1515 #address-cells = <1>;
1516 #size-cells = <0>;
1519 #address-cells = <1>;
1520 #size-cells = <0>;
1526 remote-endpoint = <&csi20vin6>;
1530 remote-endpoint = <&csi40vin6>;
1537 compatible = "renesas,vin-r8a774b1";
1541 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1542 resets = <&cpg 804>;
1547 #address-cells = <1>;
1548 #size-cells = <0>;
1551 #address-cells = <1>;
1552 #size-cells = <0>;
1558 remote-endpoint = <&csi20vin7>;
1562 remote-endpoint = <&csi40vin7>;
1570 * #sound-dai-cells is required if simple-card
1572 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1573 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1576 * #clock-cells is required for audio_clkout0/1/2/3
1578 * clkout : #clock-cells = <0>; <&rcar_sound>;
1579 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1581 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
1587 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1606 clock-names = "ssi-all",
1617 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1618 resets = <&cpg 1005>,
1624 reset-names = "ssi-all",
1631 ctu00: ctu-0 { };
1632 ctu01: ctu-1 { };
1633 ctu02: ctu-2 { };
1634 ctu03: ctu-3 { };
1635 ctu10: ctu-4 { };
1636 ctu11: ctu-5 { };
1637 ctu12: ctu-6 { };
1638 ctu13: ctu-7 { };
1642 dvc0: dvc-0 {
1644 dma-names = "tx";
1646 dvc1: dvc-1 {
1648 dma-names = "tx";
1653 mix0: mix-0 { };
1654 mix1: mix-1 { };
1658 src0: src-0 {
1661 dma-names = "rx", "tx";
1663 src1: src-1 {
1666 dma-names = "rx", "tx";
1668 src2: src-2 {
1671 dma-names = "rx", "tx";
1673 src3: src-3 {
1676 dma-names = "rx", "tx";
1678 src4: src-4 {
1681 dma-names = "rx", "tx";
1683 src5: src-5 {
1686 dma-names = "rx", "tx";
1688 src6: src-6 {
1691 dma-names = "rx", "tx";
1693 src7: src-7 {
1696 dma-names = "rx", "tx";
1698 src8: src-8 {
1701 dma-names = "rx", "tx";
1703 src9: src-9 {
1706 dma-names = "rx", "tx";
1711 ssi0: ssi-0 {
1714 dma-names = "rx", "tx";
1716 ssi1: ssi-1 {
1719 dma-names = "rx", "tx";
1721 ssi2: ssi-2 {
1724 dma-names = "rx", "tx";
1726 ssi3: ssi-3 {
1729 dma-names = "rx", "tx";
1731 ssi4: ssi-4 {
1734 dma-names = "rx", "tx";
1736 ssi5: ssi-5 {
1739 dma-names = "rx", "tx";
1741 ssi6: ssi-6 {
1744 dma-names = "rx", "tx";
1746 ssi7: ssi-7 {
1749 dma-names = "rx", "tx";
1751 ssi8: ssi-8 {
1754 dma-names = "rx", "tx";
1756 ssi9: ssi-9 {
1759 dma-names = "rx", "tx";
1764 ssiu00: ssiu-0 {
1766 dma-names = "rx", "tx";
1768 ssiu01: ssiu-1 {
1770 dma-names = "rx", "tx";
1772 ssiu02: ssiu-2 {
1774 dma-names = "rx", "tx";
1776 ssiu03: ssiu-3 {
1778 dma-names = "rx", "tx";
1780 ssiu04: ssiu-4 {
1782 dma-names = "rx", "tx";
1784 ssiu05: ssiu-5 {
1786 dma-names = "rx", "tx";
1788 ssiu06: ssiu-6 {
1790 dma-names = "rx", "tx";
1792 ssiu07: ssiu-7 {
1794 dma-names = "rx", "tx";
1796 ssiu10: ssiu-8 {
1798 dma-names = "rx", "tx";
1800 ssiu11: ssiu-9 {
1802 dma-names = "rx", "tx";
1804 ssiu12: ssiu-10 {
1806 dma-names = "rx", "tx";
1808 ssiu13: ssiu-11 {
1810 dma-names = "rx", "tx";
1812 ssiu14: ssiu-12 {
1814 dma-names = "rx", "tx";
1816 ssiu15: ssiu-13 {
1818 dma-names = "rx", "tx";
1820 ssiu16: ssiu-14 {
1822 dma-names = "rx", "tx";
1824 ssiu17: ssiu-15 {
1826 dma-names = "rx", "tx";
1828 ssiu20: ssiu-16 {
1830 dma-names = "rx", "tx";
1832 ssiu21: ssiu-17 {
1834 dma-names = "rx", "tx";
1836 ssiu22: ssiu-18 {
1838 dma-names = "rx", "tx";
1840 ssiu23: ssiu-19 {
1842 dma-names = "rx", "tx";
1844 ssiu24: ssiu-20 {
1846 dma-names = "rx", "tx";
1848 ssiu25: ssiu-21 {
1850 dma-names = "rx", "tx";
1852 ssiu26: ssiu-22 {
1854 dma-names = "rx", "tx";
1856 ssiu27: ssiu-23 {
1858 dma-names = "rx", "tx";
1860 ssiu30: ssiu-24 {
1862 dma-names = "rx", "tx";
1864 ssiu31: ssiu-25 {
1866 dma-names = "rx", "tx";
1868 ssiu32: ssiu-26 {
1870 dma-names = "rx", "tx";
1872 ssiu33: ssiu-27 {
1874 dma-names = "rx", "tx";
1876 ssiu34: ssiu-28 {
1878 dma-names = "rx", "tx";
1880 ssiu35: ssiu-29 {
1882 dma-names = "rx", "tx";
1884 ssiu36: ssiu-30 {
1886 dma-names = "rx", "tx";
1888 ssiu37: ssiu-31 {
1890 dma-names = "rx", "tx";
1892 ssiu40: ssiu-32 {
1894 dma-names = "rx", "tx";
1896 ssiu41: ssiu-33 {
1898 dma-names = "rx", "tx";
1900 ssiu42: ssiu-34 {
1902 dma-names = "rx", "tx";
1904 ssiu43: ssiu-35 {
1906 dma-names = "rx", "tx";
1908 ssiu44: ssiu-36 {
1910 dma-names = "rx", "tx";
1912 ssiu45: ssiu-37 {
1914 dma-names = "rx", "tx";
1916 ssiu46: ssiu-38 {
1918 dma-names = "rx", "tx";
1920 ssiu47: ssiu-39 {
1922 dma-names = "rx", "tx";
1924 ssiu50: ssiu-40 {
1926 dma-names = "rx", "tx";
1928 ssiu60: ssiu-41 {
1930 dma-names = "rx", "tx";
1932 ssiu70: ssiu-42 {
1934 dma-names = "rx", "tx";
1936 ssiu80: ssiu-43 {
1938 dma-names = "rx", "tx";
1940 ssiu90: ssiu-44 {
1942 dma-names = "rx", "tx";
1944 ssiu91: ssiu-45 {
1946 dma-names = "rx", "tx";
1948 ssiu92: ssiu-46 {
1950 dma-names = "rx", "tx";
1952 ssiu93: ssiu-47 {
1954 dma-names = "rx", "tx";
1956 ssiu94: ssiu-48 {
1958 dma-names = "rx", "tx";
1960 ssiu95: ssiu-49 {
1962 dma-names = "rx", "tx";
1964 ssiu96: ssiu-50 {
1966 dma-names = "rx", "tx";
1968 ssiu97: ssiu-51 {
1970 dma-names = "rx", "tx";
1975 audma0: dma-controller@ec700000 {
1976 compatible = "renesas,dmac-r8a774b1",
1977 "renesas,rcar-dmac";
1996 interrupt-names = "error",
2002 clock-names = "fck";
2003 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2004 resets = <&cpg 502>;
2005 #dma-cells = <1>;
2006 dma-channels = <16>;
2017 audma1: dma-controller@ec720000 {
2018 compatible = "renesas,dmac-r8a774b1",
2019 "renesas,rcar-dmac";
2038 interrupt-names = "error",
2044 clock-names = "fck";
2045 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2046 resets = <&cpg 501>;
2047 #dma-cells = <1>;
2048 dma-channels = <16>;
2060 compatible = "renesas,xhci-r8a774b1",
2061 "renesas,rcar-gen3-xhci";
2065 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2066 resets = <&cpg 328>;
2071 compatible = "renesas,r8a774b1-usb3-peri",
2072 "renesas,rcar-gen3-usb3-peri";
2076 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2077 resets = <&cpg 328>;
2082 compatible = "generic-ohci";
2087 phy-names = "usb";
2088 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2089 resets = <&cpg 703>, <&cpg 704>;
2094 compatible = "generic-ohci";
2099 phy-names = "usb";
2100 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2101 resets = <&cpg 702>;
2106 compatible = "generic-ehci";
2111 phy-names = "usb";
2113 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2114 resets = <&cpg 703>, <&cpg 704>;
2119 compatible = "generic-ehci";
2124 phy-names = "usb";
2126 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2127 resets = <&cpg 702>;
2131 usb2_phy0: usb-phy@ee080200 {
2132 compatible = "renesas,usb2-phy-r8a774b1",
2133 "renesas,rcar-gen3-usb2-phy";
2137 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2138 resets = <&cpg 703>, <&cpg 704>;
2139 #phy-cells = <1>;
2143 usb2_phy1: usb-phy@ee0a0200 {
2144 compatible = "renesas,usb2-phy-r8a774b1",
2145 "renesas,rcar-gen3-usb2-phy";
2148 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2149 resets = <&cpg 702>;
2150 #phy-cells = <1>;
2155 compatible = "renesas,sdhi-r8a774b1",
2156 "renesas,rcar-gen3-sdhi";
2160 clock-names = "core", "clkh";
2161 max-frequency = <200000000>;
2162 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2163 resets = <&cpg 314>;
2169 compatible = "renesas,sdhi-r8a774b1",
2170 "renesas,rcar-gen3-sdhi";
2174 clock-names = "core", "clkh";
2175 max-frequency = <200000000>;
2176 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2177 resets = <&cpg 313>;
2183 compatible = "renesas,sdhi-r8a774b1",
2184 "renesas,rcar-gen3-sdhi";
2188 clock-names = "core", "clkh";
2189 max-frequency = <200000000>;
2190 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2191 resets = <&cpg 312>;
2197 compatible = "renesas,sdhi-r8a774b1",
2198 "renesas,rcar-gen3-sdhi";
2202 clock-names = "core", "clkh";
2203 max-frequency = <200000000>;
2204 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2205 resets = <&cpg 311>;
2211 compatible = "renesas,r8a774b1-rpc-if",
2212 "renesas,rcar-gen3-rpc-if";
2216 reg-names = "regs", "dirmap", "wbuf";
2219 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2220 resets = <&cpg 917>;
2221 #address-cells = <1>;
2222 #size-cells = <0>;
2227 compatible = "renesas,sata-r8a774b1",
2228 "renesas,rcar-gen3-sata";
2232 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2233 resets = <&cpg 815>;
2238 gic: interrupt-controller@f1010000 {
2239 compatible = "arm,gic-400";
2240 #interrupt-cells = <3>;
2241 #address-cells = <0>;
2242 interrupt-controller;
2250 clock-names = "clk";
2251 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2252 resets = <&cpg 408>;
2256 compatible = "renesas,pcie-r8a774b1",
2257 "renesas,pcie-rcar-gen3";
2259 #address-cells = <3>;
2260 #size-cells = <2>;
2261 bus-range = <0x00 0xff>;
2268 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2272 #interrupt-cells = <1>;
2273 interrupt-map-mask = <0 0 0 0>;
2274 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2276 clock-names = "pcie", "pcie_bus";
2277 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2278 resets = <&cpg 319>;
2279 iommu-map = <0 &ipmmu_hc 0 1>;
2280 iommu-map-mask = <0>;
2285 compatible = "renesas,pcie-r8a774b1",
2286 "renesas,pcie-rcar-gen3";
2288 #address-cells = <3>;
2289 #size-cells = <2>;
2290 bus-range = <0x00 0xff>;
2297 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2301 #interrupt-cells = <1>;
2302 interrupt-map-mask = <0 0 0 0>;
2303 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2305 clock-names = "pcie", "pcie_bus";
2306 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2307 resets = <&cpg 318>;
2308 iommu-map = <0 &ipmmu_hc 1 1>;
2309 iommu-map-mask = <0>;
2313 pciec0_ep: pcie-ep@fe000000 {
2314 compatible = "renesas,r8a774b1-pcie-ep",
2315 "renesas,rcar-gen3-pcie-ep";
2321 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2326 clock-names = "pcie";
2327 resets = <&cpg 319>;
2328 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2332 pciec1_ep: pcie-ep@ee800000 {
2333 compatible = "renesas,r8a774b1-pcie-ep",
2334 "renesas,rcar-gen3-pcie-ep";
2340 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2345 clock-names = "pcie";
2346 resets = <&cpg 318>;
2347 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2356 power-domains = <&sysc R8A774B1_PD_A3VP>;
2357 resets = <&cpg 119>;
2365 power-domains = <&sysc R8A774B1_PD_A3VP>;
2366 resets = <&cpg 615>;
2375 power-domains = <&sysc R8A774B1_PD_A3VP>;
2376 resets = <&cpg 626>;
2386 power-domains = <&sysc R8A774B1_PD_A3VP>;
2387 resets = <&cpg 631>;
2397 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2398 resets = <&cpg 623>;
2408 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2409 resets = <&cpg 622>;
2418 power-domains = <&sysc R8A774B1_PD_A3VP>;
2419 resets = <&cpg 607>;
2427 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2428 resets = <&cpg 603>;
2436 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2437 resets = <&cpg 602>;
2445 power-domains = <&sysc R8A774B1_PD_A3VP>;
2446 resets = <&cpg 611>;
2451 compatible = "renesas,r8a774b1-csi2";
2455 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2456 resets = <&cpg 714>;
2460 #address-cells = <1>;
2461 #size-cells = <0>;
2468 #address-cells = <1>;
2469 #size-cells = <0>;
2475 remote-endpoint = <&vin0csi20>;
2479 remote-endpoint = <&vin1csi20>;
2483 remote-endpoint = <&vin2csi20>;
2487 remote-endpoint = <&vin3csi20>;
2491 remote-endpoint = <&vin4csi20>;
2495 remote-endpoint = <&vin5csi20>;
2499 remote-endpoint = <&vin6csi20>;
2503 remote-endpoint = <&vin7csi20>;
2510 compatible = "renesas,r8a774b1-csi2";
2514 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2515 resets = <&cpg 716>;
2519 #address-cells = <1>;
2520 #size-cells = <0>;
2527 #address-cells = <1>;
2528 #size-cells = <0>;
2534 remote-endpoint = <&vin0csi40>;
2538 remote-endpoint = <&vin1csi40>;
2542 remote-endpoint = <&vin2csi40>;
2546 remote-endpoint = <&vin3csi40>;
2550 remote-endpoint = <&vin4csi40>;
2554 remote-endpoint = <&vin5csi40>;
2558 remote-endpoint = <&vin6csi40>;
2562 remote-endpoint = <&vin7csi40>;
2569 compatible = "renesas,r8a774b1-hdmi",
2570 "renesas,rcar-gen3-hdmi";
2575 clock-names = "iahb", "isfr";
2576 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2577 resets = <&cpg 729>;
2581 #address-cells = <1>;
2582 #size-cells = <0>;
2587 remote-endpoint = <&du_out_hdmi0>;
2601 compatible = "renesas,du-r8a774b1";
2608 clock-names = "du.0", "du.1", "du.3";
2609 resets = <&cpg 724>, <&cpg 722>;
2610 reset-names = "du.0", "du.3";
2616 #address-cells = <1>;
2617 #size-cells = <0>;
2625 remote-endpoint = <&dw_hdmi0_in>;
2631 remote-endpoint = <&lvds0_in>;
2638 compatible = "renesas,r8a774b1-lvds";
2641 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2642 resets = <&cpg 727>;
2646 #address-cells = <1>;
2647 #size-cells = <0>;
2652 remote-endpoint = <&du_out_lvds0>;
2667 thermal-zones {
2668 sensor1_thermal: sensor1-thermal {
2669 polling-delay-passive = <250>;
2670 polling-delay = <1000>;
2671 thermal-sensors = <&tsc 0>;
2672 sustainable-power = <2439>;
2675 sensor1_crit: sensor1-crit {
2683 sensor2_thermal: sensor2-thermal {
2684 polling-delay-passive = <250>;
2685 polling-delay = <1000>;
2686 thermal-sensors = <&tsc 1>;
2687 sustainable-power = <2439>;
2690 sensor2_crit: sensor2-crit {
2698 sensor3_thermal: sensor3-thermal {
2699 polling-delay-passive = <250>;
2700 polling-delay = <1000>;
2701 thermal-sensors = <&tsc 2>;
2702 sustainable-power = <2439>;
2704 cooling-maps {
2707 cooling-device = <&a57_0 0 2>;
2712 target: trip-point1 {
2718 sensor3_crit: sensor3-crit {
2728 compatible = "arm,armv8-timer";
2729 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2733 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
2736 /* External USB clocks - can be overridden by the board */
2738 compatible = "fixed-clock";
2739 #clock-cells = <0>;
2740 clock-frequency = <0>;
2744 compatible = "fixed-clock";
2745 #clock-cells = <0>;
2746 clock-frequency = <0>;