Lines Matching +full:power +full:- +full:domains
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
41 /* External CAN clock - to be overridden by boards that provide it */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
49 compatible = "operating-points-v2";
50 opp-shared;
52 opp-500000000 {
53 opp-hz = /bits/ 64 <500000000>;
54 opp-microvolt = <820000>;
55 clock-latency-ns = <300000>;
57 opp-1000000000 {
58 opp-hz = /bits/ 64 <1000000000>;
59 opp-microvolt = <820000>;
60 clock-latency-ns = <300000>;
62 opp-1500000000 {
63 opp-hz = /bits/ 64 <1500000000>;
64 opp-microvolt = <820000>;
65 clock-latency-ns = <300000>;
66 opp-suspend;
70 cluster1_opp: opp-table-1 {
71 compatible = "operating-points-v2";
72 opp-shared;
74 opp-800000000 {
75 opp-hz = /bits/ 64 <800000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
79 opp-1000000000 {
80 opp-hz = /bits/ 64 <1000000000>;
81 opp-microvolt = <820000>;
82 clock-latency-ns = <300000>;
84 opp-1200000000 {
85 opp-hz = /bits/ 64 <1200000000>;
86 opp-microvolt = <820000>;
87 clock-latency-ns = <300000>;
92 #address-cells = <1>;
93 #size-cells = <0>;
95 cpu-map {
122 compatible = "arm,cortex-a57";
125 power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
126 next-level-cache = <&L2_CA57>;
127 enable-method = "psci";
128 dynamic-power-coefficient = <854>;
130 operating-points-v2 = <&cluster0_opp>;
131 capacity-dmips-mhz = <1024>;
132 #cooling-cells = <2>;
136 compatible = "arm,cortex-a57";
139 power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
140 next-level-cache = <&L2_CA57>;
141 enable-method = "psci";
143 operating-points-v2 = <&cluster0_opp>;
144 capacity-dmips-mhz = <1024>;
145 #cooling-cells = <2>;
149 compatible = "arm,cortex-a53";
152 power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
153 next-level-cache = <&L2_CA53>;
154 enable-method = "psci";
155 #cooling-cells = <2>;
156 dynamic-power-coefficient = <277>;
158 operating-points-v2 = <&cluster1_opp>;
159 capacity-dmips-mhz = <560>;
163 compatible = "arm,cortex-a53";
166 power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
167 next-level-cache = <&L2_CA53>;
168 enable-method = "psci";
170 operating-points-v2 = <&cluster1_opp>;
171 capacity-dmips-mhz = <560>;
175 compatible = "arm,cortex-a53";
178 power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
179 next-level-cache = <&L2_CA53>;
180 enable-method = "psci";
182 operating-points-v2 = <&cluster1_opp>;
183 capacity-dmips-mhz = <560>;
187 compatible = "arm,cortex-a53";
190 power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
191 next-level-cache = <&L2_CA53>;
192 enable-method = "psci";
194 operating-points-v2 = <&cluster1_opp>;
195 capacity-dmips-mhz = <560>;
198 L2_CA57: cache-controller-0 {
200 power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
201 cache-unified;
202 cache-level = <2>;
205 L2_CA53: cache-controller-1 {
207 power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
208 cache-unified;
209 cache-level = <2>;
214 compatible = "fixed-clock";
215 #clock-cells = <0>;
217 clock-frequency = <0>;
218 bootph-all;
222 compatible = "fixed-clock";
223 #clock-cells = <0>;
225 clock-frequency = <0>;
226 bootph-all;
229 /* External PCIe clock - can be overridden by the board */
231 compatible = "fixed-clock";
232 #clock-cells = <0>;
233 clock-frequency = <0>;
237 compatible = "arm,cortex-a53-pmu";
238 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
242 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
246 compatible = "arm,cortex-a57-pmu";
247 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
249 interrupt-affinity = <&a57_0>, <&a57_1>;
253 compatible = "arm,psci-1.0", "arm,psci-0.2";
257 /* External SCIF clock - to be overridden by boards that provide it */
259 compatible = "fixed-clock";
260 #clock-cells = <0>;
261 clock-frequency = <0>;
265 compatible = "simple-bus";
266 interrupt-parent = <&gic>;
267 bootph-all;
269 #address-cells = <2>;
270 #size-cells = <2>;
274 compatible = "renesas,r8a774a1-wdt",
275 "renesas,rcar-gen3-wdt";
279 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
285 compatible = "renesas,gpio-r8a774a1",
286 "renesas,rcar-gen3-gpio";
289 #gpio-cells = <2>;
290 gpio-controller;
291 gpio-ranges = <&pfc 0 0 16>;
292 #interrupt-cells = <2>;
293 interrupt-controller;
295 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
300 compatible = "renesas,gpio-r8a774a1",
301 "renesas,rcar-gen3-gpio";
304 #gpio-cells = <2>;
305 gpio-controller;
306 gpio-ranges = <&pfc 0 32 29>;
307 #interrupt-cells = <2>;
308 interrupt-controller;
310 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
315 compatible = "renesas,gpio-r8a774a1",
316 "renesas,rcar-gen3-gpio";
319 #gpio-cells = <2>;
320 gpio-controller;
321 gpio-ranges = <&pfc 0 64 15>;
322 #interrupt-cells = <2>;
323 interrupt-controller;
325 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
330 compatible = "renesas,gpio-r8a774a1",
331 "renesas,rcar-gen3-gpio";
334 #gpio-cells = <2>;
335 gpio-controller;
336 gpio-ranges = <&pfc 0 96 16>;
337 #interrupt-cells = <2>;
338 interrupt-controller;
340 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
345 compatible = "renesas,gpio-r8a774a1",
346 "renesas,rcar-gen3-gpio";
349 #gpio-cells = <2>;
350 gpio-controller;
351 gpio-ranges = <&pfc 0 128 18>;
352 #interrupt-cells = <2>;
353 interrupt-controller;
355 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
360 compatible = "renesas,gpio-r8a774a1",
361 "renesas,rcar-gen3-gpio";
364 #gpio-cells = <2>;
365 gpio-controller;
366 gpio-ranges = <&pfc 0 160 26>;
367 #interrupt-cells = <2>;
368 interrupt-controller;
370 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
375 compatible = "renesas,gpio-r8a774a1",
376 "renesas,rcar-gen3-gpio";
379 #gpio-cells = <2>;
380 gpio-controller;
381 gpio-ranges = <&pfc 0 192 32>;
382 #interrupt-cells = <2>;
383 interrupt-controller;
385 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
390 compatible = "renesas,gpio-r8a774a1",
391 "renesas,rcar-gen3-gpio";
394 #gpio-cells = <2>;
395 gpio-controller;
396 gpio-ranges = <&pfc 0 224 4>;
397 #interrupt-cells = <2>;
398 interrupt-controller;
400 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
405 compatible = "renesas,pfc-r8a774a1";
407 bootph-all;
411 compatible = "renesas,r8a774a1-cmt0",
412 "renesas,rcar-gen3-cmt0";
417 clock-names = "fck";
418 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
424 compatible = "renesas,r8a774a1-cmt1",
425 "renesas,rcar-gen3-cmt1";
436 clock-names = "fck";
437 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
443 compatible = "renesas,r8a774a1-cmt1",
444 "renesas,rcar-gen3-cmt1";
455 clock-names = "fck";
456 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
462 compatible = "renesas,r8a774a1-cmt1",
463 "renesas,rcar-gen3-cmt1";
474 clock-names = "fck";
475 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
480 cpg: clock-controller@e6150000 {
481 compatible = "renesas,r8a774a1-cpg-mssr";
484 clock-names = "extal", "extalr";
485 #clock-cells = <2>;
486 #power-domain-cells = <0>;
487 #reset-cells = <1>;
488 bootph-all;
491 rst: reset-controller@e6160000 {
492 compatible = "renesas,r8a774a1-rst";
494 bootph-all;
497 sysc: system-controller@e6180000 {
498 compatible = "renesas,r8a774a1-sysc";
500 #power-domain-cells = <1>;
504 compatible = "renesas,r8a774a1-thermal";
512 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
514 #thermal-sensor-cells = <1>;
517 intc_ex: interrupt-controller@e61c0000 {
518 compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
519 #interrupt-cells = <2>;
520 interrupt-controller;
529 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
534 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
539 interrupt-names = "tuni0", "tuni1", "tuni2";
541 clock-names = "fck";
542 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
548 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
554 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
556 clock-names = "fck";
557 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
563 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
569 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
571 clock-names = "fck";
572 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
578 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
583 interrupt-names = "tuni0", "tuni1", "tuni2";
585 clock-names = "fck";
586 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
592 compatible = "renesas,tmu-r8a774a1", "renesas,tmu";
597 interrupt-names = "tuni0", "tuni1", "tuni2";
599 clock-names = "fck";
600 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
606 #address-cells = <1>;
607 #size-cells = <0>;
608 compatible = "renesas,i2c-r8a774a1",
609 "renesas,rcar-gen3-i2c";
613 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
617 dma-names = "tx", "rx", "tx", "rx";
618 i2c-scl-internal-delay-ns = <110>;
623 #address-cells = <1>;
624 #size-cells = <0>;
625 compatible = "renesas,i2c-r8a774a1",
626 "renesas,rcar-gen3-i2c";
630 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
634 dma-names = "tx", "rx", "tx", "rx";
635 i2c-scl-internal-delay-ns = <6>;
640 #address-cells = <1>;
641 #size-cells = <0>;
642 compatible = "renesas,i2c-r8a774a1",
643 "renesas,rcar-gen3-i2c";
647 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
651 dma-names = "tx", "rx", "tx", "rx";
652 i2c-scl-internal-delay-ns = <6>;
657 #address-cells = <1>;
658 #size-cells = <0>;
659 compatible = "renesas,i2c-r8a774a1",
660 "renesas,rcar-gen3-i2c";
664 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
667 dma-names = "tx", "rx";
668 i2c-scl-internal-delay-ns = <110>;
673 #address-cells = <1>;
674 #size-cells = <0>;
675 compatible = "renesas,i2c-r8a774a1",
676 "renesas,rcar-gen3-i2c";
680 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
683 dma-names = "tx", "rx";
684 i2c-scl-internal-delay-ns = <110>;
689 #address-cells = <1>;
690 #size-cells = <0>;
691 compatible = "renesas,i2c-r8a774a1",
692 "renesas,rcar-gen3-i2c";
696 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
699 dma-names = "tx", "rx";
700 i2c-scl-internal-delay-ns = <110>;
705 #address-cells = <1>;
706 #size-cells = <0>;
707 compatible = "renesas,i2c-r8a774a1",
708 "renesas,rcar-gen3-i2c";
712 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
715 dma-names = "tx", "rx";
716 i2c-scl-internal-delay-ns = <6>;
721 #address-cells = <1>;
722 #size-cells = <0>;
723 compatible = "renesas,iic-r8a774a1",
724 "renesas,rcar-gen3-iic",
725 "renesas,rmobile-iic";
729 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
732 dma-names = "tx", "rx";
737 compatible = "renesas,hscif-r8a774a1",
738 "renesas,rcar-gen3-hscif",
745 clock-names = "fck", "brg_int", "scif_clk";
748 dma-names = "tx", "rx", "tx", "rx";
749 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
755 compatible = "renesas,hscif-r8a774a1",
756 "renesas,rcar-gen3-hscif",
763 clock-names = "fck", "brg_int", "scif_clk";
766 dma-names = "tx", "rx", "tx", "rx";
767 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
773 compatible = "renesas,hscif-r8a774a1",
774 "renesas,rcar-gen3-hscif",
781 clock-names = "fck", "brg_int", "scif_clk";
784 dma-names = "tx", "rx", "tx", "rx";
785 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
791 compatible = "renesas,hscif-r8a774a1",
792 "renesas,rcar-gen3-hscif",
799 clock-names = "fck", "brg_int", "scif_clk";
801 dma-names = "tx", "rx";
802 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
808 compatible = "renesas,hscif-r8a774a1",
809 "renesas,rcar-gen3-hscif",
816 clock-names = "fck", "brg_int", "scif_clk";
818 dma-names = "tx", "rx";
819 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
825 compatible = "renesas,usbhs-r8a774a1",
826 "renesas,rcar-gen3-usbhs";
832 dma-names = "ch0", "ch1", "ch2", "ch3";
835 phy-names = "usb";
836 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
841 usb2_clksel: clock-controller@e6590630 {
842 compatible = "renesas,r8a774a1-rcar-usb2-clock-sel",
843 "renesas,rcar-gen3-usb2-clock-sel";
847 clock-names = "ehci_ohci", "hs-usb-if",
849 #clock-cells = <0>;
850 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
852 reset-names = "ehci_ohci", "hs-usb-if";
856 usb_dmac0: dma-controller@e65a0000 {
857 compatible = "renesas,r8a774a1-usb-dmac",
858 "renesas,usb-dmac";
862 interrupt-names = "ch0", "ch1";
864 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
866 #dma-cells = <1>;
867 dma-channels = <2>;
870 usb_dmac1: dma-controller@e65b0000 {
871 compatible = "renesas,r8a774a1-usb-dmac",
872 "renesas,usb-dmac";
876 interrupt-names = "ch0", "ch1";
878 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
880 #dma-cells = <1>;
881 dma-channels = <2>;
884 usb3_phy0: usb-phy@e65ee000 {
885 compatible = "renesas,r8a774a1-usb3-phy",
886 "renesas,rcar-gen3-usb3-phy";
890 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
891 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
893 #phy-cells = <0>;
897 dmac0: dma-controller@e6700000 {
898 compatible = "renesas,dmac-r8a774a1",
899 "renesas,rcar-dmac";
918 interrupt-names = "error",
924 clock-names = "fck";
925 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
927 #dma-cells = <1>;
928 dma-channels = <16>;
939 dmac1: dma-controller@e7300000 {
940 compatible = "renesas,dmac-r8a774a1",
941 "renesas,rcar-dmac";
960 interrupt-names = "error",
966 clock-names = "fck";
967 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
969 #dma-cells = <1>;
970 dma-channels = <16>;
981 dmac2: dma-controller@e7310000 {
982 compatible = "renesas,dmac-r8a774a1",
983 "renesas,rcar-dmac";
1002 interrupt-names = "error",
1008 clock-names = "fck";
1009 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1011 #dma-cells = <1>;
1012 dma-channels = <16>;
1024 compatible = "renesas,ipmmu-r8a774a1";
1026 renesas,ipmmu-main = <&ipmmu_mm 0>;
1027 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1028 #iommu-cells = <1>;
1032 compatible = "renesas,ipmmu-r8a774a1";
1034 renesas,ipmmu-main = <&ipmmu_mm 1>;
1035 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1036 #iommu-cells = <1>;
1040 compatible = "renesas,ipmmu-r8a774a1";
1042 renesas,ipmmu-main = <&ipmmu_mm 2>;
1043 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1044 #iommu-cells = <1>;
1048 compatible = "renesas,ipmmu-r8a774a1";
1052 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1053 #iommu-cells = <1>;
1057 compatible = "renesas,ipmmu-r8a774a1";
1059 renesas,ipmmu-main = <&ipmmu_mm 4>;
1060 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1061 #iommu-cells = <1>;
1065 compatible = "renesas,ipmmu-r8a774a1";
1067 renesas,ipmmu-main = <&ipmmu_mm 5>;
1068 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1069 #iommu-cells = <1>;
1073 compatible = "renesas,ipmmu-r8a774a1";
1075 renesas,ipmmu-main = <&ipmmu_mm 6>;
1076 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1077 #iommu-cells = <1>;
1081 compatible = "renesas,ipmmu-r8a774a1";
1083 renesas,ipmmu-main = <&ipmmu_mm 8>;
1084 power-domains = <&sysc R8A774A1_PD_A3VC>;
1085 #iommu-cells = <1>;
1089 compatible = "renesas,ipmmu-r8a774a1";
1091 renesas,ipmmu-main = <&ipmmu_mm 9>;
1092 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1093 #iommu-cells = <1>;
1097 compatible = "renesas,etheravb-r8a774a1",
1098 "renesas,etheravb-rcar-gen3";
1125 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1133 clock-names = "fck";
1134 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1136 phy-mode = "rgmii";
1137 rx-internal-delay-ps = <0>;
1138 tx-internal-delay-ps = <0>;
1140 #address-cells = <1>;
1141 #size-cells = <0>;
1146 compatible = "renesas,can-r8a774a1",
1147 "renesas,rcar-gen3-can";
1153 clock-names = "clkp1", "clkp2", "can_clk";
1154 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1155 assigned-clock-rates = <40000000>;
1156 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1162 compatible = "renesas,can-r8a774a1",
1163 "renesas,rcar-gen3-can";
1169 clock-names = "clkp1", "clkp2", "can_clk";
1170 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1171 assigned-clock-rates = <40000000>;
1172 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1178 compatible = "renesas,r8a774a1-canfd",
1179 "renesas,rcar-gen3-canfd";
1183 interrupt-names = "ch_int", "g_int";
1187 clock-names = "fck", "canfd", "can_clk";
1188 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1189 assigned-clock-rates = <40000000>;
1190 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1204 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1206 #pwm-cells = <2>;
1209 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1214 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1216 #pwm-cells = <2>;
1219 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1224 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1226 #pwm-cells = <2>;
1229 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1234 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1236 #pwm-cells = <2>;
1239 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1244 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1246 #pwm-cells = <2>;
1249 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1254 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1256 #pwm-cells = <2>;
1259 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1264 compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
1266 #pwm-cells = <2>;
1269 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1274 compatible = "renesas,scif-r8a774a1",
1275 "renesas,rcar-gen3-scif", "renesas,scif";
1281 clock-names = "fck", "brg_int", "scif_clk";
1284 dma-names = "tx", "rx", "tx", "rx";
1285 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1291 compatible = "renesas,scif-r8a774a1",
1292 "renesas,rcar-gen3-scif", "renesas,scif";
1298 clock-names = "fck", "brg_int", "scif_clk";
1301 dma-names = "tx", "rx", "tx", "rx";
1302 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1308 compatible = "renesas,scif-r8a774a1",
1309 "renesas,rcar-gen3-scif", "renesas,scif";
1315 clock-names = "fck", "brg_int", "scif_clk";
1318 dma-names = "tx", "rx", "tx", "rx";
1319 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1325 compatible = "renesas,scif-r8a774a1",
1326 "renesas,rcar-gen3-scif", "renesas,scif";
1332 clock-names = "fck", "brg_int", "scif_clk";
1334 dma-names = "tx", "rx";
1335 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1341 compatible = "renesas,scif-r8a774a1",
1342 "renesas,rcar-gen3-scif", "renesas,scif";
1348 clock-names = "fck", "brg_int", "scif_clk";
1350 dma-names = "tx", "rx";
1351 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1357 compatible = "renesas,scif-r8a774a1",
1358 "renesas,rcar-gen3-scif", "renesas,scif";
1364 clock-names = "fck", "brg_int", "scif_clk";
1367 dma-names = "tx", "rx", "tx", "rx";
1368 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1374 compatible = "renesas,msiof-r8a774a1",
1375 "renesas,rcar-gen3-msiof";
1381 dma-names = "tx", "rx", "tx", "rx";
1382 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1384 #address-cells = <1>;
1385 #size-cells = <0>;
1390 compatible = "renesas,msiof-r8a774a1",
1391 "renesas,rcar-gen3-msiof";
1397 dma-names = "tx", "rx", "tx", "rx";
1398 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1400 #address-cells = <1>;
1401 #size-cells = <0>;
1406 compatible = "renesas,msiof-r8a774a1",
1407 "renesas,rcar-gen3-msiof";
1412 dma-names = "tx", "rx";
1413 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1415 #address-cells = <1>;
1416 #size-cells = <0>;
1421 compatible = "renesas,msiof-r8a774a1",
1422 "renesas,rcar-gen3-msiof";
1427 dma-names = "tx", "rx";
1428 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1430 #address-cells = <1>;
1431 #size-cells = <0>;
1436 compatible = "renesas,vin-r8a774a1";
1440 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1446 #address-cells = <1>;
1447 #size-cells = <0>;
1450 #address-cells = <1>;
1451 #size-cells = <0>;
1457 remote-endpoint = <&csi20vin0>;
1461 remote-endpoint = <&csi40vin0>;
1468 compatible = "renesas,vin-r8a774a1";
1472 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1478 #address-cells = <1>;
1479 #size-cells = <0>;
1482 #address-cells = <1>;
1483 #size-cells = <0>;
1489 remote-endpoint = <&csi20vin1>;
1493 remote-endpoint = <&csi40vin1>;
1500 compatible = "renesas,vin-r8a774a1";
1504 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1510 #address-cells = <1>;
1511 #size-cells = <0>;
1514 #address-cells = <1>;
1515 #size-cells = <0>;
1521 remote-endpoint = <&csi20vin2>;
1525 remote-endpoint = <&csi40vin2>;
1532 compatible = "renesas,vin-r8a774a1";
1536 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1542 #address-cells = <1>;
1543 #size-cells = <0>;
1546 #address-cells = <1>;
1547 #size-cells = <0>;
1553 remote-endpoint = <&csi20vin3>;
1557 remote-endpoint = <&csi40vin3>;
1564 compatible = "renesas,vin-r8a774a1";
1568 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1574 #address-cells = <1>;
1575 #size-cells = <0>;
1578 #address-cells = <1>;
1579 #size-cells = <0>;
1585 remote-endpoint = <&csi20vin4>;
1589 remote-endpoint = <&csi40vin4>;
1596 compatible = "renesas,vin-r8a774a1";
1600 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1606 #address-cells = <1>;
1607 #size-cells = <0>;
1610 #address-cells = <1>;
1611 #size-cells = <0>;
1617 remote-endpoint = <&csi20vin5>;
1621 remote-endpoint = <&csi40vin5>;
1628 compatible = "renesas,vin-r8a774a1";
1632 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1638 #address-cells = <1>;
1639 #size-cells = <0>;
1642 #address-cells = <1>;
1643 #size-cells = <0>;
1649 remote-endpoint = <&csi20vin6>;
1653 remote-endpoint = <&csi40vin6>;
1660 compatible = "renesas,vin-r8a774a1";
1664 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1674 #address-cells = <1>;
1675 #size-cells = <0>;
1681 remote-endpoint = <&csi20vin7>;
1685 remote-endpoint = <&csi40vin7>;
1693 * #sound-dai-cells is required if simple-card
1695 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1696 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1699 * #clock-cells is required for audio_clkout0/1/2/3
1701 * clkout : #clock-cells = <0>; <&rcar_sound>;
1702 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1704 compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1710 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1729 clock-names = "ssi-all",
1740 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1747 reset-names = "ssi-all",
1754 ctu00: ctu-0 { };
1755 ctu01: ctu-1 { };
1756 ctu02: ctu-2 { };
1757 ctu03: ctu-3 { };
1758 ctu10: ctu-4 { };
1759 ctu11: ctu-5 { };
1760 ctu12: ctu-6 { };
1761 ctu13: ctu-7 { };
1765 dvc0: dvc-0 {
1767 dma-names = "tx";
1769 dvc1: dvc-1 {
1771 dma-names = "tx";
1776 mix0: mix-0 { };
1777 mix1: mix-1 { };
1781 src0: src-0 {
1784 dma-names = "rx", "tx";
1786 src1: src-1 {
1789 dma-names = "rx", "tx";
1791 src2: src-2 {
1794 dma-names = "rx", "tx";
1796 src3: src-3 {
1799 dma-names = "rx", "tx";
1801 src4: src-4 {
1804 dma-names = "rx", "tx";
1806 src5: src-5 {
1809 dma-names = "rx", "tx";
1811 src6: src-6 {
1814 dma-names = "rx", "tx";
1816 src7: src-7 {
1819 dma-names = "rx", "tx";
1821 src8: src-8 {
1824 dma-names = "rx", "tx";
1826 src9: src-9 {
1829 dma-names = "rx", "tx";
1834 ssi0: ssi-0 {
1837 dma-names = "rx", "tx";
1839 ssi1: ssi-1 {
1842 dma-names = "rx", "tx";
1844 ssi2: ssi-2 {
1847 dma-names = "rx", "tx";
1849 ssi3: ssi-3 {
1852 dma-names = "rx", "tx";
1854 ssi4: ssi-4 {
1857 dma-names = "rx", "tx";
1859 ssi5: ssi-5 {
1862 dma-names = "rx", "tx";
1864 ssi6: ssi-6 {
1867 dma-names = "rx", "tx";
1869 ssi7: ssi-7 {
1872 dma-names = "rx", "tx";
1874 ssi8: ssi-8 {
1877 dma-names = "rx", "tx";
1879 ssi9: ssi-9 {
1882 dma-names = "rx", "tx";
1887 ssiu00: ssiu-0 {
1889 dma-names = "rx", "tx";
1891 ssiu01: ssiu-1 {
1893 dma-names = "rx", "tx";
1895 ssiu02: ssiu-2 {
1897 dma-names = "rx", "tx";
1899 ssiu03: ssiu-3 {
1901 dma-names = "rx", "tx";
1903 ssiu04: ssiu-4 {
1905 dma-names = "rx", "tx";
1907 ssiu05: ssiu-5 {
1909 dma-names = "rx", "tx";
1911 ssiu06: ssiu-6 {
1913 dma-names = "rx", "tx";
1915 ssiu07: ssiu-7 {
1917 dma-names = "rx", "tx";
1919 ssiu10: ssiu-8 {
1921 dma-names = "rx", "tx";
1923 ssiu11: ssiu-9 {
1925 dma-names = "rx", "tx";
1927 ssiu12: ssiu-10 {
1929 dma-names = "rx", "tx";
1931 ssiu13: ssiu-11 {
1933 dma-names = "rx", "tx";
1935 ssiu14: ssiu-12 {
1937 dma-names = "rx", "tx";
1939 ssiu15: ssiu-13 {
1941 dma-names = "rx", "tx";
1943 ssiu16: ssiu-14 {
1945 dma-names = "rx", "tx";
1947 ssiu17: ssiu-15 {
1949 dma-names = "rx", "tx";
1951 ssiu20: ssiu-16 {
1953 dma-names = "rx", "tx";
1955 ssiu21: ssiu-17 {
1957 dma-names = "rx", "tx";
1959 ssiu22: ssiu-18 {
1961 dma-names = "rx", "tx";
1963 ssiu23: ssiu-19 {
1965 dma-names = "rx", "tx";
1967 ssiu24: ssiu-20 {
1969 dma-names = "rx", "tx";
1971 ssiu25: ssiu-21 {
1973 dma-names = "rx", "tx";
1975 ssiu26: ssiu-22 {
1977 dma-names = "rx", "tx";
1979 ssiu27: ssiu-23 {
1981 dma-names = "rx", "tx";
1983 ssiu30: ssiu-24 {
1985 dma-names = "rx", "tx";
1987 ssiu31: ssiu-25 {
1989 dma-names = "rx", "tx";
1991 ssiu32: ssiu-26 {
1993 dma-names = "rx", "tx";
1995 ssiu33: ssiu-27 {
1997 dma-names = "rx", "tx";
1999 ssiu34: ssiu-28 {
2001 dma-names = "rx", "tx";
2003 ssiu35: ssiu-29 {
2005 dma-names = "rx", "tx";
2007 ssiu36: ssiu-30 {
2009 dma-names = "rx", "tx";
2011 ssiu37: ssiu-31 {
2013 dma-names = "rx", "tx";
2015 ssiu40: ssiu-32 {
2017 dma-names = "rx", "tx";
2019 ssiu41: ssiu-33 {
2021 dma-names = "rx", "tx";
2023 ssiu42: ssiu-34 {
2025 dma-names = "rx", "tx";
2027 ssiu43: ssiu-35 {
2029 dma-names = "rx", "tx";
2031 ssiu44: ssiu-36 {
2033 dma-names = "rx", "tx";
2035 ssiu45: ssiu-37 {
2037 dma-names = "rx", "tx";
2039 ssiu46: ssiu-38 {
2041 dma-names = "rx", "tx";
2043 ssiu47: ssiu-39 {
2045 dma-names = "rx", "tx";
2047 ssiu50: ssiu-40 {
2049 dma-names = "rx", "tx";
2051 ssiu60: ssiu-41 {
2053 dma-names = "rx", "tx";
2055 ssiu70: ssiu-42 {
2057 dma-names = "rx", "tx";
2059 ssiu80: ssiu-43 {
2061 dma-names = "rx", "tx";
2063 ssiu90: ssiu-44 {
2065 dma-names = "rx", "tx";
2067 ssiu91: ssiu-45 {
2069 dma-names = "rx", "tx";
2071 ssiu92: ssiu-46 {
2073 dma-names = "rx", "tx";
2075 ssiu93: ssiu-47 {
2077 dma-names = "rx", "tx";
2079 ssiu94: ssiu-48 {
2081 dma-names = "rx", "tx";
2083 ssiu95: ssiu-49 {
2085 dma-names = "rx", "tx";
2087 ssiu96: ssiu-50 {
2089 dma-names = "rx", "tx";
2091 ssiu97: ssiu-51 {
2093 dma-names = "rx", "tx";
2098 audma0: dma-controller@ec700000 {
2099 compatible = "renesas,dmac-r8a774a1",
2100 "renesas,rcar-dmac";
2119 interrupt-names = "error",
2125 clock-names = "fck";
2126 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2128 #dma-cells = <1>;
2129 dma-channels = <16>;
2140 audma1: dma-controller@ec720000 {
2141 compatible = "renesas,dmac-r8a774a1",
2142 "renesas,rcar-dmac";
2161 interrupt-names = "error",
2167 clock-names = "fck";
2168 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2170 #dma-cells = <1>;
2171 dma-channels = <16>;
2183 compatible = "renesas,xhci-r8a774a1",
2184 "renesas,rcar-gen3-xhci";
2188 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2194 compatible = "renesas,r8a774a1-usb3-peri",
2195 "renesas,rcar-gen3-usb3-peri";
2199 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2205 compatible = "generic-ohci";
2210 phy-names = "usb";
2211 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2217 compatible = "generic-ohci";
2222 phy-names = "usb";
2223 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2229 compatible = "generic-ehci";
2234 phy-names = "usb";
2236 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2242 compatible = "generic-ehci";
2247 phy-names = "usb";
2249 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2254 usb2_phy0: usb-phy@ee080200 {
2255 compatible = "renesas,usb2-phy-r8a774a1",
2256 "renesas,rcar-gen3-usb2-phy";
2260 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2262 #phy-cells = <1>;
2266 usb2_phy1: usb-phy@ee0a0200 {
2267 compatible = "renesas,usb2-phy-r8a774a1",
2268 "renesas,rcar-gen3-usb2-phy";
2271 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2273 #phy-cells = <1>;
2278 compatible = "renesas,sdhi-r8a774a1",
2279 "renesas,rcar-gen3-sdhi";
2283 clock-names = "core", "clkh";
2284 max-frequency = <200000000>;
2285 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2292 compatible = "renesas,sdhi-r8a774a1",
2293 "renesas,rcar-gen3-sdhi";
2297 clock-names = "core", "clkh";
2298 max-frequency = <200000000>;
2299 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2306 compatible = "renesas,sdhi-r8a774a1",
2307 "renesas,rcar-gen3-sdhi";
2311 clock-names = "core", "clkh";
2312 max-frequency = <200000000>;
2313 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2320 compatible = "renesas,sdhi-r8a774a1",
2321 "renesas,rcar-gen3-sdhi";
2325 clock-names = "core", "clkh";
2326 max-frequency = <200000000>;
2327 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2334 compatible = "renesas,r8a774a1-rpc-if",
2335 "renesas,rcar-gen3-rpc-if";
2339 reg-names = "regs", "dirmap", "wbuf";
2342 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2344 #address-cells = <1>;
2345 #size-cells = <0>;
2349 gic: interrupt-controller@f1010000 {
2350 compatible = "arm,gic-400";
2351 #interrupt-cells = <3>;
2352 #address-cells = <0>;
2353 interrupt-controller;
2361 clock-names = "clk";
2362 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2367 compatible = "renesas,pcie-r8a774a1",
2368 "renesas,pcie-rcar-gen3";
2370 #address-cells = <3>;
2371 #size-cells = <2>;
2372 bus-range = <0x00 0xff>;
2379 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2383 #interrupt-cells = <1>;
2384 interrupt-map-mask = <0 0 0 0>;
2385 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2387 clock-names = "pcie", "pcie_bus";
2388 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2390 iommu-map = <0 &ipmmu_hc 0 1>;
2391 iommu-map-mask = <0>;
2396 compatible = "renesas,pcie-r8a774a1",
2397 "renesas,pcie-rcar-gen3";
2399 #address-cells = <3>;
2400 #size-cells = <2>;
2401 bus-range = <0x00 0xff>;
2408 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2412 #interrupt-cells = <1>;
2413 interrupt-map-mask = <0 0 0 0>;
2414 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2416 clock-names = "pcie", "pcie_bus";
2417 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2419 iommu-map = <0 &ipmmu_hc 1 1>;
2420 iommu-map-mask = <0>;
2424 pciec0_ep: pcie-ep@fe000000 {
2425 compatible = "renesas,r8a774a1-pcie-ep",
2426 "renesas,rcar-gen3-pcie-ep";
2432 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2437 clock-names = "pcie";
2439 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2443 pciec1_ep: pcie-ep@ee800000 {
2444 compatible = "renesas,r8a774a1-pcie-ep",
2445 "renesas,rcar-gen3-pcie-ep";
2451 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2456 clock-names = "pcie";
2458 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2467 power-domains = <&sysc R8A774A1_PD_A3VC>;
2476 power-domains = <&sysc R8A774A1_PD_A3VC>;
2485 power-domains = <&sysc R8A774A1_PD_A3VC>;
2494 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2503 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2512 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2521 power-domains = <&sysc R8A774A1_PD_A3VC>;
2531 power-domains = <&sysc R8A774A1_PD_A3VC>;
2542 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2553 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2564 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2575 power-domains = <&sysc R8A774A1_PD_A3VC>;
2582 compatible = "renesas,r8a774a1-csi2";
2586 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2591 #address-cells = <1>;
2592 #size-cells = <0>;
2599 #address-cells = <1>;
2600 #size-cells = <0>;
2606 remote-endpoint = <&vin0csi20>;
2610 remote-endpoint = <&vin1csi20>;
2614 remote-endpoint = <&vin2csi20>;
2618 remote-endpoint = <&vin3csi20>;
2622 remote-endpoint = <&vin4csi20>;
2626 remote-endpoint = <&vin5csi20>;
2630 remote-endpoint = <&vin6csi20>;
2634 remote-endpoint = <&vin7csi20>;
2641 compatible = "renesas,r8a774a1-csi2";
2645 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2650 #address-cells = <1>;
2651 #size-cells = <0>;
2658 #address-cells = <1>;
2659 #size-cells = <0>;
2665 remote-endpoint = <&vin0csi40>;
2669 remote-endpoint = <&vin1csi40>;
2673 remote-endpoint = <&vin2csi40>;
2677 remote-endpoint = <&vin3csi40>;
2681 remote-endpoint = <&vin4csi40>;
2685 remote-endpoint = <&vin5csi40>;
2689 remote-endpoint = <&vin6csi40>;
2693 remote-endpoint = <&vin7csi40>;
2701 compatible = "renesas,r8a774a1-hdmi",
2702 "renesas,rcar-gen3-hdmi";
2707 clock-names = "iahb", "isfr";
2708 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2713 #address-cells = <1>;
2714 #size-cells = <0>;
2718 remote-endpoint = <&du_out_hdmi0>;
2732 compatible = "renesas,du-r8a774a1";
2739 clock-names = "du.0", "du.1", "du.2";
2741 reset-names = "du.0", "du.2";
2747 #address-cells = <1>;
2748 #size-cells = <0>;
2756 remote-endpoint = <&dw_hdmi0_in>;
2762 remote-endpoint = <&lvds0_in>;
2769 compatible = "renesas,r8a774a1-lvds";
2772 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
2777 #address-cells = <1>;
2778 #size-cells = <0>;
2783 remote-endpoint = <&du_out_lvds0>;
2795 bootph-all;
2799 thermal-zones {
2800 sensor1_thermal: sensor1-thermal {
2801 polling-delay-passive = <250>;
2802 polling-delay = <1000>;
2803 thermal-sensors = <&tsc 0>;
2804 sustainable-power = <3874>;
2807 sensor1_crit: sensor1-crit {
2815 sensor2_thermal: sensor2-thermal {
2816 polling-delay-passive = <250>;
2817 polling-delay = <1000>;
2818 thermal-sensors = <&tsc 1>;
2819 sustainable-power = <3874>;
2822 sensor2_crit: sensor2-crit {
2830 sensor3_thermal: sensor3-thermal {
2831 polling-delay-passive = <250>;
2832 polling-delay = <1000>;
2833 thermal-sensors = <&tsc 2>;
2834 sustainable-power = <3874>;
2836 cooling-maps {
2839 cooling-device = <&a57_0 0 2>;
2844 cooling-device = <&a53_0 0 2>;
2849 target: trip-point1 {
2855 sensor3_crit: sensor3-crit {
2865 compatible = "arm,armv8-timer";
2866 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2870 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
2873 /* External USB clocks - can be overridden by the board */
2875 compatible = "fixed-clock";
2876 #clock-cells = <0>;
2877 clock-frequency = <0>;
2881 compatible = "fixed-clock";
2882 #clock-cells = <0>;
2883 clock-frequency = <0>;