Lines Matching +full:lvds +full:- +full:decoder

1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor board with R-Car V3H
8 #include <dt-bindings/gpio/gpio.h>
23 stdout-path = "serial0:115200n8";
27 d1_8v: regulator-2 {
28 compatible = "regulator-fixed";
29 regulator-name = "D1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-boot-on;
33 regulator-always-on;
36 d3_3v: regulator-0 {
37 compatible = "regulator-fixed";
38 regulator-name = "D3.3V";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 regulator-boot-on;
42 regulator-always-on;
45 hdmi-out {
46 compatible = "hdmi-connector";
51 remote-endpoint = <&adv7511_out>;
56 lvds-decoder {
58 vcc-supply = <&d3_3v>;
61 #address-cells = <1>;
62 #size-cells = <0>;
67 remote-endpoint = <&lvds0_out>;
74 remote-endpoint = <&adv7511_in>;
86 vddq_vin01: regulator-1 {
87 compatible = "regulator-fixed";
88 regulator-name = "VDDQ_VIN01";
89 regulator-min-microvolt = <1800000>;
90 regulator-max-microvolt = <1800000>;
91 regulator-boot-on;
92 regulator-always-on;
95 x1_clk: x1-clock {
96 compatible = "fixed-clock";
97 #clock-cells = <0>;
98 clock-frequency = <148500000>;
103 pinctrl-0 = <&canfd0_pins>;
104 pinctrl-names = "default";
118 clock-lanes = <0>;
119 data-lanes = <1 2 3 4>;
120 remote-endpoint = <&max9286_out0>;
132 clock-lanes = <0>;
133 data-lanes = <1 2 3 4>;
134 remote-endpoint = <&max9286_out1>;
143 clock-names = "du.0", "dclkin.0";
148 clock-frequency = <16666666>;
152 clock-frequency = <32768>;
156 pinctrl-0 = <&gether_pins>;
157 pinctrl-names = "default";
159 phy-mode = "rgmii-id";
160 phy-handle = <&phy0>;
161 renesas,no-ether-link;
164 phy0: ethernet-phy@0 {
165 compatible = "ethernet-phy-id0022.1622",
166 "ethernet-phy-ieee802.3-c22";
167 rxc-skew-ps = <1500>;
169 interrupt-parent = <&gpio4>;
171 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
176 pinctrl-0 = <&i2c0_pins>;
177 pinctrl-names = "default";
180 clock-frequency = <400000>;
185 gpio-controller;
186 #gpio-cells = <2>;
192 gpio-controller;
193 #gpio-cells = <2>;
199 interrupt-parent = <&gpio1>;
201 avdd-supply = <&d1_8v>;
202 dvdd-supply = <&d1_8v>;
203 pvdd-supply = <&d1_8v>;
204 bgvdd-supply = <&d1_8v>;
205 dvdd-3v-supply = <&d3_3v>;
207 adi,input-depth = <8>;
208 adi,input-colorspace = "rgb";
209 adi,input-clock = "1x";
212 #address-cells = <1>;
213 #size-cells = <0>;
218 remote-endpoint = <&thc63lvd1024_out>;
225 remote-endpoint = <&hdmi_con>;
239 pinctrl-0 = <&i2c1_pins>;
240 pinctrl-names = "default";
243 clock-frequency = <400000>;
245 gmsl0: gmsl-deserializer@48 {
249 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
250 enable-gpios = <&io_expander0 0 GPIO_ACTIVE_HIGH>;
253 #address-cells = <1>;
254 #size-cells = <0>;
275 clock-lanes = <0>;
276 data-lanes = <1 2 3 4>;
277 remote-endpoint = <&csi40_in>;
282 i2c-mux {
283 #address-cells = <1>;
284 #size-cells = <0>;
287 #address-cells = <1>;
288 #size-cells = <0>;
295 #address-cells = <1>;
296 #size-cells = <0>;
303 #address-cells = <1>;
304 #size-cells = <0>;
311 #address-cells = <1>;
312 #size-cells = <0>;
320 gmsl1: gmsl-deserializer@4a {
324 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
325 enable-gpios = <&io_expander1 0 GPIO_ACTIVE_HIGH>;
328 #address-cells = <1>;
329 #size-cells = <0>;
350 clock-lanes = <0>;
351 data-lanes = <1 2 3 4>;
352 remote-endpoint = <&csi41_in>;
357 i2c-mux {
358 #address-cells = <1>;
359 #size-cells = <0>;
362 #address-cells = <1>;
363 #size-cells = <0>;
370 #address-cells = <1>;
371 #size-cells = <0>;
378 #address-cells = <1>;
379 #size-cells = <0>;
386 #address-cells = <1>;
387 #size-cells = <0>;
402 remote-endpoint = <&thc63lvd1024_in>;
409 pinctrl-0 = <&mmc_pins>;
410 pinctrl-1 = <&mmc_pins>;
411 pinctrl-names = "default", "state_uhs";
413 vmmc-supply = <&d3_3v>;
414 vqmmc-supply = <&vddq_vin01>;
415 mmc-hs200-1_8v;
416 bus-width = <8>;
417 no-sd;
418 no-sdio;
419 non-removable;
428 clock-frequency = <100000000>;
460 power-source = <1800>;
480 pinctrl-0 = <&qspi0_pins>;
481 pinctrl-names = "default";
486 compatible = "spansion,s25fs512s", "jedec,spi-nor";
488 spi-max-frequency = <50000000>;
489 spi-rx-bus-width = <4>;
492 compatible = "fixed-partitions";
493 #address-cells = <1>;
494 #size-cells = <1>;
498 read-only;
502 read-only;
506 read-only;
510 read-only;
514 read-only;
518 read-only;
522 read-only;
524 uboot-env@700000 {
526 read-only;
542 timeout-sec = <60>;
547 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
548 pinctrl-names = "default";
554 clock-frequency = <14745600>;