Lines Matching +full:reg +full:- +full:io +full:- +full:width
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
25 reg = <0x2f000 0x1000>;
29 reg = <0x1ffe000 0x4000>;
33 reg = <0x10100000 0xf00000>;
34 no-map;
38 arm_pmu: arm-pmu {
39 compatible = "arm,cortex-a53-pmu";
44 compatible = "fixed-clock";
45 clock-frequency = <27000000>;
46 #clock-cells = <0>;
47 clock-output-names = "osc27M";
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
58 compatible = "simple-bus";
59 reg = <0x98000000 0x200000>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "syscon", "simple-mfd";
66 reg = <0x0 0x1000>;
67 reg-io-width = <4>;
68 #address-cells = <1>;
69 #size-cells = <1>;
74 compatible = "syscon", "simple-mfd";
75 reg = <0x7000 0x1000>;
76 reg-io-width = <4>;
77 #address-cells = <1>;
78 #size-cells = <1>;
83 compatible = "syscon", "simple-mfd";
84 reg = <0x1a000 0x1000>;
85 reg-io-width = <4>;
86 #address-cells = <1>;
87 #size-cells = <1>;
92 compatible = "syscon", "simple-mfd";
93 reg = <0x1b000 0x1000>;
94 reg-io-width = <4>;
95 #address-cells = <1>;
96 #size-cells = <1>;
101 compatible = "syscon", "simple-mfd";
102 reg = <0x1d000 0x2000>;
103 reg-io-width = <4>;
104 #address-cells = <1>;
105 #size-cells = <1>;
110 gic: interrupt-controller@ff011000 {
111 compatible = "arm,gic-400";
112 reg = <0xff011000 0x1000>,
117 interrupt-controller;
118 #interrupt-cells = <3>;
124 reset1: reset-controller@0 {
125 compatible = "snps,dw-low-reset";
126 reg = <0x0 0x4>;
127 #reset-cells = <1>;
130 reset2: reset-controller@4 {
131 compatible = "snps,dw-low-reset";
132 reg = <0x4 0x4>;
133 #reset-cells = <1>;
136 reset3: reset-controller@8 {
137 compatible = "snps,dw-low-reset";
138 reg = <0x8 0x4>;
139 #reset-cells = <1>;
142 reset4: reset-controller@50 {
143 compatible = "snps,dw-low-reset";
144 reg = <0x50 0x4>;
145 #reset-cells = <1>;
150 iso_reset: reset-controller@88 {
151 compatible = "snps,dw-low-reset";
152 reg = <0x88 0x4>;
153 #reset-cells = <1>;
157 compatible = "realtek,rtd1295-watchdog";
158 reg = <0x680 0x100>;
163 compatible = "snps,dw-apb-uart";
164 reg = <0x800 0x400>;
165 reg-shift = <2>;
166 reg-io-width = <4>;
167 clock-frequency = <27000000>;
175 compatible = "snps,dw-apb-uart";
176 reg = <0x200 0x100>;
177 reg-shift = <2>;
178 reg-io-width = <4>;
179 clock-frequency = <432000000>;
185 compatible = "snps,dw-apb-uart";
186 reg = <0x400 0x100>;
187 reg-shift = <2>;
188 reg-io-width = <4>;
189 clock-frequency = <432000000>;