Lines Matching +full:1 +full:d84000
144 qcom,freq-domain = <&cpufreq_hw 1>;
146 clocks = <&cpufreq_hw 1>;
163 qcom,freq-domain = <&cpufreq_hw 1>;
165 clocks = <&cpufreq_hw 1>;
182 qcom,freq-domain = <&cpufreq_hw 1>;
184 clocks = <&cpufreq_hw 1>;
261 big_cpu_sleep_0: cpu-sleep-1-0 {
281 cluster_sleep_1: cluster-sleep-1 {
304 ete-1 {
408 #address-cells = <1>;
419 port@1 {
420 reg = <1>;
482 #reset-cells = <1>;
492 mc_virt: interconnect-1 {
732 qcom,client-id = <1>;
835 #qcom,smem-state-cells = <1>;
859 #qcom,smem-state-cells = <1>;
879 qcom,remote-pid = <1>;
883 #qcom,smem-state-cells = <1>;
894 #qcom,smem-state-cells = <1>;
918 #qcom,smem-state-cells = <1>;
938 #clock-cells = <1>;
939 #reset-cells = <1>;
940 #power-domain-cells = <1>;
947 <&ufs_mem_phy 1>,
1003 #address-cells = <1>;
1010 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
1027 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
1029 #address-cells = <1>;
1042 #address-cells = <1>;
1048 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
1049 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
1065 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
1066 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
1068 #address-cells = <1>;
1081 #address-cells = <1>;
1088 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
1105 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
1107 #address-cells = <1>;
1120 #address-cells = <1>;
1127 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1144 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1146 #address-cells = <1>;
1159 #address-cells = <1>;
1166 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1183 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1185 #address-cells = <1>;
1198 #address-cells = <1>;
1205 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1239 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1241 #address-cells = <1>;
1254 #address-cells = <1>;
1261 <&gpi_dma2 1 6 QCOM_GPI_I2C>;
1278 <&gpi_dma2 1 6 QCOM_GPI_SPI>;
1280 #address-cells = <1>;
1330 #address-cells = <1>;
1337 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1357 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1359 #address-cells = <1>;
1372 #address-cells = <1>;
1378 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1379 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1396 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1397 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1399 #address-cells = <1>;
1412 #address-cells = <1>;
1419 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1437 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1439 #address-cells = <1>;
1453 #address-cells = <1>;
1460 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1478 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1480 #address-cells = <1>;
1493 #address-cells = <1>;
1500 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1520 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1522 #address-cells = <1>;
1535 #address-cells = <1>;
1542 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1560 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1562 #address-cells = <1>;
1576 #address-cells = <1>;
1583 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1601 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1603 #address-cells = <1>;
1670 #address-cells = <1>;
1677 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1695 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1697 #address-cells = <1>;
1710 #address-cells = <1>;
1716 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1717 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1734 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1735 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1737 #address-cells = <1>;
1750 #address-cells = <1>;
1757 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1775 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1777 #address-cells = <1>;
1790 #address-cells = <1>;
1797 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1815 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1817 #address-cells = <1>;
1830 #address-cells = <1>;
1837 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1855 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1857 #address-cells = <1>;
1875 <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1877 #address-cells = <1>;
1895 <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1897 #address-cells = <1>;
1915 <&gpi_dma1 1 6 QCOM_GPI_I2C>;
1917 #address-cells = <1>;
1935 <&gpi_dma1 1 6 QCOM_GPI_SPI>;
1937 #address-cells = <1>;
1948 pcie0: pcie@1c00000 {
1959 num-lanes = <1>;
1988 #interrupt-cells = <1>;
1990 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2050 /* GEN 1 x1 */
2054 opp-peak-kBps = <250000 1>;
2061 opp-peak-kBps = <500000 1>;
2068 opp-peak-kBps = <984500 1>;
2083 pcie0_phy: phy@1c06000 {
2112 pcie1: pcie@1c08000 {
2121 linux,pci-domain = <1>;
2152 #interrupt-cells = <1>;
2154 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2212 /* GEN 1 x1 */
2216 opp-peak-kBps = <250000 1>;
2219 /* GEN 1 x2 and GEN 2 x1 */
2223 opp-peak-kBps = <500000 1>;
2230 opp-peak-kBps = <1000000 1>;
2237 opp-peak-kBps = <984500 1>;
2244 opp-peak-kBps = <1969000 1>;
2251 opp-peak-kBps = <3938000 1>;
2266 pcie1_ep: pcie-ep@1c08000 {
2328 pcie1_phy: phy@1c0e000 {
2344 #clock-cells = <1>;
2405 tcsr_mutex: hwlock@1f40000 {
2408 #hwlock-cells = <1>;
2411 tcsr: syscon@1fc0000 {
2428 <&adreno_smmu 1 0x400>;
2564 #clock-cells = <1>;
2565 #reset-cells = <1>;
2566 #power-domain-cells = <1>;
2574 #global-interrupts = <1>;
2644 #clock-cells = <1>;
2645 #phy-cells = <1>;
2652 #address-cells = <1>;
2662 port@1 {
2663 reg = <1>;
2686 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
2723 #address-cells = <1>;
2726 compute-cb@1 {
2728 reg = <1>;
2754 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2791 #address-cells = <1>;
2794 q6apm: service@1 {
2808 #sound-dai-cells = <1>;
2830 #address-cells = <1>;
2866 #sound-dai-cells = <1>;
2895 #sound-dai-cells = <1>;
2911 #sound-dai-cells = <1>;
2939 #sound-dai-cells = <1>;
2955 #sound-dai-cells = <1>;
2970 #sound-dai-cells = <1>;
2999 #sound-dai-cells = <1>;
3031 #sound-dai-cells = <1>;
3046 #sound-dai-cells = <1>;
3056 <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
3093 #address-cells = <1>;
3096 compute-cb@1 {
3098 reg = <1>;
3163 <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
3193 qcom,remote-pid = <1>;
3204 #clock-cells = <1>;
3205 #reset-cells = <1>;
3206 #power-domain-cells = <1>;
3226 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
3230 #address-cells = <1>;
3236 #address-cells = <1>;
3240 cci0_i2c1: i2c-bus@1 {
3241 reg = <1>;
3243 #address-cells = <1>;
3265 pinctrl-1 = <&cci2_sleep &cci3_sleep>;
3269 #address-cells = <1>;
3275 #address-cells = <1>;
3279 cci1_i2c1: i2c-bus@1 {
3280 reg = <1>;
3282 #address-cells = <1>;
3296 #clock-cells = <1>;
3297 #reset-cells = <1>;
3298 #power-domain-cells = <1>;
3327 #interrupt-cells = <1>;
3366 #address-cells = <1>;
3376 port@1 {
3377 reg = <1>;
3457 #address-cells = <1>;
3467 port@1 {
3468 reg = <1>;
3533 #address-cells = <1>;
3539 #address-cells = <1>;
3549 port@1 {
3550 reg = <1>;
3585 #clock-cells = <1>;
3627 #address-cells = <1>;
3633 #address-cells = <1>;
3643 port@1 {
3644 reg = <1>;
3660 #clock-cells = <1>;
3692 #clock-cells = <1>;
3693 #reset-cells = <1>;
3694 #power-domain-cells = <1>;
3701 <94 609 31>, <125 63 1>, <126 716 12>;
3715 #thermal-sensor-cells = <1>;
3726 #thermal-sensor-cells = <1>;
3758 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
4303 slew-rate = <1>;
4311 slew-rate = <1>;
4321 slew-rate = <1>;
4329 slew-rate = <1>;
4369 slew-rate = <1>;
4377 slew-rate = <1>;
4387 slew-rate = <1>;
4395 slew-rate = <1>;
4428 #address-cells = <1>;
4459 #address-cells = <1>;
4497 #address-cells = <1>;
4508 port@1 {
4509 reg = <1>;
4612 #address-cells = <1>;
4706 #address-cells = <1>;
4831 #address-cells = <1>;
4834 port@1a {
4842 port@1b {
4946 #address-cells = <1>;
4947 #size-cells = <1>;
4959 #global-interrupts = <1>;
5064 #redistributor-regions = <1>;
5077 #msi-cells = <1>;
5083 #address-cells = <1>;
5084 #size-cells = <1>;
5098 frame-number = <1>;
5147 reg-names = "drv-0", "drv-1", "drv-2", "drv-3";
5163 #clock-cells = <1>;
5170 #power-domain-cells = <1>;
5246 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
5247 #freq-domain-cells = <1>;
5248 #clock-cells = <1>;
5269 ufs_mem_hc: ufshc@1d84000 {
5277 #reset-cells = <1>;
5321 ufs_mem_phy: phy@1d87000 {
5335 #clock-cells = <1>;
5341 ice: crypto@1d88000 {
5348 cryptobam: dma-controller@1dc4000 {
5352 #dma-cells = <1>;
5364 crypto: crypto@1dfa000 {
5478 #address-cells = <1>;
5488 port@1 {
5489 reg = <1>;
5537 thermal-sensors = <&tsens0 1>;
5909 thermal-sensors = <&tsens1 1>;