Lines Matching +full:1 +full:ac00000

156 			clocks = <&cpufreq_hw 1>;
161 qcom,freq-domain = <&cpufreq_hw 1>;
180 clocks = <&cpufreq_hw 1>;
185 qcom,freq-domain = <&cpufreq_hw 1>;
204 clocks = <&cpufreq_hw 1>;
209 qcom,freq-domain = <&cpufreq_hw 1>;
297 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
612 #reset-cells = <1>;
726 qcom,client-id = <1>;
815 #qcom,smem-state-cells = <1>;
839 #qcom,smem-state-cells = <1>;
859 qcom,remote-pid = <1>;
863 #qcom,smem-state-cells = <1>;
887 #qcom,smem-state-cells = <1>;
908 #clock-cells = <1>;
909 #reset-cells = <1>;
910 #power-domain-cells = <1>;
969 #address-cells = <1>;
970 #size-cells = <1>;
996 <&gpi_dma0 1 0 QCOM_GPI_I2C>;
1001 #address-cells = <1>;
1013 <&gpi_dma0 1 0 QCOM_GPI_SPI>;
1019 #address-cells = <1>;
1029 dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
1030 <&gpi_dma0 1 1 QCOM_GPI_I2C>;
1035 #address-cells = <1>;
1046 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
1047 <&gpi_dma0 1 1 QCOM_GPI_SPI>;
1053 #address-cells = <1>;
1064 <&gpi_dma0 1 2 QCOM_GPI_I2C>;
1069 #address-cells = <1>;
1081 <&gpi_dma0 1 2 QCOM_GPI_SPI>;
1087 #address-cells = <1>;
1098 <&gpi_dma0 1 3 QCOM_GPI_I2C>;
1103 #address-cells = <1>;
1115 <&gpi_dma0 1 3 QCOM_GPI_SPI>;
1121 #address-cells = <1>;
1132 <&gpi_dma0 1 4 QCOM_GPI_I2C>;
1137 #address-cells = <1>;
1149 <&gpi_dma0 1 4 QCOM_GPI_SPI>;
1155 #address-cells = <1>;
1166 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1171 #address-cells = <1>;
1183 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1189 #address-cells = <1>;
1200 <&gpi_dma0 1 6 QCOM_GPI_I2C>;
1205 #address-cells = <1>;
1217 <&gpi_dma0 1 6 QCOM_GPI_SPI>;
1223 #address-cells = <1>;
1234 <&gpi_dma0 1 7 QCOM_GPI_I2C>;
1239 #address-cells = <1>;
1251 <&gpi_dma0 1 7 QCOM_GPI_SPI>;
1257 #address-cells = <1>;
1304 <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1309 #address-cells = <1>;
1321 <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1327 #address-cells = <1>;
1337 dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1338 <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1343 #address-cells = <1>;
1354 dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1355 <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1361 #address-cells = <1>;
1383 <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1388 #address-cells = <1>;
1400 <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1406 #address-cells = <1>;
1417 <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1422 #address-cells = <1>;
1434 <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1440 #address-cells = <1>;
1460 <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1465 #address-cells = <1>;
1477 <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1483 #address-cells = <1>;
1494 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1499 #address-cells = <1>;
1511 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1517 #address-cells = <1>;
1565 <&gpi_dma2 1 0 QCOM_GPI_I2C>;
1570 #address-cells = <1>;
1582 <&gpi_dma2 1 0 QCOM_GPI_SPI>;
1588 #address-cells = <1>;
1598 dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
1599 <&gpi_dma2 1 1 QCOM_GPI_I2C>;
1604 #address-cells = <1>;
1615 dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
1616 <&gpi_dma2 1 1 QCOM_GPI_SPI>;
1622 #address-cells = <1>;
1633 <&gpi_dma2 1 2 QCOM_GPI_I2C>;
1638 #address-cells = <1>;
1650 <&gpi_dma2 1 2 QCOM_GPI_SPI>;
1656 #address-cells = <1>;
1667 <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1672 #address-cells = <1>;
1684 <&gpi_dma2 1 3 QCOM_GPI_SPI>;
1690 #address-cells = <1>;
1701 <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1706 #address-cells = <1>;
1718 <&gpi_dma2 1 4 QCOM_GPI_SPI>;
1724 #address-cells = <1>;
1735 <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1740 #address-cells = <1>;
1752 <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1758 #address-cells = <1>;
1829 pcie0: pcie@1c00000 {
1840 num-lanes = <1>;
1864 #interrupt-cells = <1>;
1866 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1918 pcie0_phy: phy@1c06000 {
1946 pcie1: pcie@1c08000 {
1955 linux,pci-domain = <1>;
1981 #interrupt-cells = <1>;
1983 interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2038 pcie1_phy: phy@1c0e000 {
2066 ufs_mem_hc: ufshc@1d84000 {
2076 #reset-cells = <1>;
2116 ufs_mem_phy: phy@1d87000 {
2137 cryptobam: dma-controller@1dc4000 {
2141 #dma-cells = <1>;
2153 crypto: crypto@1dfa000 {
2167 tcsr_mutex: hwlock@1f40000 {
2170 #hwlock-cells = <1>;
2173 tcsr_regs_1: syscon@1f60000 {
2184 <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2217 #address-cells = <1>;
2220 compute-cb@1 {
2222 reg = <1>;
2354 #clock-cells = <1>;
2355 #reset-cells = <1>;
2356 #power-domain-cells = <1>;
2364 #global-interrupts = <1>;
2737 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2763 qcom,remote-pid = <1>;
2802 #address-cells = <1>;
2830 #address-cells = <1>;
2858 #address-cells = <1>;
2886 #address-cells = <1>;
2896 port@1 {
2897 reg = <1>;
2920 #address-cells = <1>;
2930 port@1 {
2931 reg = <1>;
2997 #address-cells = <1>;
3000 port@1 {
3001 reg = <1>;
3034 #address-cells = <1>;
3271 #address-cells = <1>;
3281 port@1 {
3282 reg = <1>;
3362 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3393 #address-cells = <1>;
3396 compute-cb@1 {
3398 reg = <1>;
3492 #clock-cells = <1>;
3493 #phy-cells = <1>;
3498 #address-cells = <1>;
3508 port@1 {
3509 reg = <1>;
3665 #address-cells = <1>;
3675 port@1 {
3676 reg = <1>;
3751 #clock-cells = <1>;
3752 #reset-cells = <1>;
3753 #power-domain-cells = <1>;
3756 camnoc_virt: interconnect@ac00000 {
3770 #clock-cells = <1>;
3771 #reset-cells = <1>;
3772 #power-domain-cells = <1>;
3794 #interrupt-cells = <1>;
3826 #address-cells = <1>;
3836 port@1 {
3837 reg = <1>;
3913 #address-cells = <1>;
3923 port@1 {
3924 reg = <1>;
3981 <&mdss_dsi0_phy 1>;
3990 #address-cells = <1>;
3994 #address-cells = <1>;
4004 port@1 {
4005 reg = <1>;
4040 #clock-cells = <1>;
4074 <&mdss_dsi1_phy 1>;
4083 #address-cells = <1>;
4087 #address-cells = <1>;
4097 port@1 {
4098 reg = <1>;
4114 #clock-cells = <1>;
4130 <&mdss_dsi0_phy 1>,
4132 <&mdss_dsi1_phy 1>,
4144 #clock-cells = <1>;
4145 #reset-cells = <1>;
4146 #power-domain-cells = <1>;
4153 <125 63 1>;
4181 #thermal-sensor-cells = <1>;
4192 #thermal-sensor-cells = <1>;
4217 #global-interrupts = <1>;
4307 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
4338 #address-cells = <1>;
4375 #mbox-cells = <1>;
4386 #address-cells = <1>;
4387 #size-cells = <1>;
4402 frame-number = <1>;
4450 reg-names = "drv-0", "drv-1", "drv-2";
4459 <CONTROL_TCS 1>;
4464 #clock-cells = <1>;
4471 #power-domain-cells = <1>;
4535 #interconnect-cells = <1>;
4548 #freq-domain-cells = <1>;
4549 #clock-cells = <1>;
4561 #interrupt-cells = <1>;
4573 #interrupt-cells = <1>;
4602 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
4612 thermal-sensors = <&tsens0 1>;
5227 thermal-sensors = <&tsens1 1>;