Lines Matching +full:0 +full:x1f4200
29 #clock-cells = <0>;
35 #clock-cells = <0>;
39 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
55 clocks = <&cpufreq_hw 0>;
60 qcom,freq-domain = <&cpufreq_hw 0>;
80 reg = <0x0 0x100>;
81 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
100 reg = <0x0 0x200>;
101 clocks = <&cpufreq_hw 0>;
106 qcom,freq-domain = <&cpufreq_hw 0>;
120 reg = <0x0 0x300>;
121 clocks = <&cpufreq_hw 0>;
126 qcom,freq-domain = <&cpufreq_hw 0>;
140 reg = <0x0 0x400>;
141 clocks = <&cpufreq_hw 0>;
146 qcom,freq-domain = <&cpufreq_hw 0>;
160 reg = <0x0 0x500>;
161 clocks = <&cpufreq_hw 0>;
166 qcom,freq-domain = <&cpufreq_hw 0>;
180 reg = <0x0 0x600>;
200 reg = <0x0 0x700>;
256 little_cpu_sleep_0: cpu-sleep-0-0 {
258 arm,psci-suspend-param = <0x40000004>;
265 big_cpu_sleep_0: cpu-sleep-1-0 {
267 arm,psci-suspend-param = <0x40000004>;
276 cluster_sleep_0: cluster-sleep-0 {
278 arm,psci-suspend-param = <0x41000044>;
286 arm,psci-suspend-param = <0x41003344>;
297 reg = <0x0 0xa0000000 0x0 0x0>;
315 #power-domain-cells = <0>;
321 #power-domain-cells = <0>;
327 #power-domain-cells = <0>;
333 #power-domain-cells = <0>;
339 #power-domain-cells = <0>;
345 #power-domain-cells = <0>;
351 #power-domain-cells = <0>;
357 #power-domain-cells = <0>;
363 #power-domain-cells = <0>;
375 reg = <0x0 0x80860000 0x0 0x20000>;
380 soc: soc@0 {
383 ranges = <0 0 0 0 0x10 0>;
384 dma-ranges = <0 0 0 0 0x10 0>;
389 reg = <0x0 0x00100000 0x0 0x1f4200>;
395 <0>,
396 <0>,
397 <0>,
398 <0>;
403 reg = <0x0 0x00ac0000 0x0 0x2000>;
414 reg = <0x0 0x00a88000 0x0 0x4000>;
418 pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;
426 reg = <0x0 0x01f40000 0x0 0x40000>;
432 reg = <0x0 0x03d90000 0x0 0xa000>;
443 reg = <0x0 0x0ade0000 0x0 0x20000>;
453 reg = <0x0 0x0af00000 0x0 0x20000>;
458 <0>,
459 <0>;
467 reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
468 qcom,pdc-ranges = <0 480 94>, <94 494 31>,
477 reg = <0x0 0x0f100000 0x0 0x300000>;
483 gpio-ranges = <&tlmm 0 0 137>;
503 reg = <0x0 0x17200000 0x0 0x10000>, /* GICD */
504 <0x0 0x17260000 0x0 0x100000>; /* GICR * 8 */
509 redistributor-stride = <0x0 0x20000>;
514 reg = <0x0 0x17420000 0x0 0x1000>;
515 ranges = <0 0 0 0x20000000>;
520 reg = <0x17421000 0x1000>,
521 <0x17422000 0x1000>;
522 frame-number = <0>;
528 reg = <0x17423000 0x1000>;
535 reg = <0x17425000 0x1000>;
542 reg = <0x17427000 0x1000>;
549 reg = <0x17429000 0x1000>;
556 reg = <0x1742b000 0x1000>;
563 reg = <0x1742d000 0x1000>;
572 reg = <0x0 0x17a00000 0x0 0x10000>,
573 <0x0 0x17a10000 0x0 0x10000>,
574 <0x0 0x17a20000 0x0 0x10000>;
575 reg-names = "drv-0", "drv-1", "drv-2";
580 qcom,tcs-offset = <0xd00>;
583 <WAKE_TCS 3>, <CONTROL_TCS 0>;
666 reg = <0 0x17d91000 0 0x1000>,
667 <0 0x17d92000 0 0x1000>;
673 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";