Lines Matching refs:gcc
8 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
572 gcc: clock-controller@100000 { label
573 compatible = "qcom,gcc-sdm630";
609 clocks = <&gcc GCC_PRNG_AHB_CLK>;
687 <&gcc GCC_UFS_AXI_CLK>,
688 <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
689 <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
690 <&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
1036 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1037 <&gcc GCC_BIMC_MSS_Q6_AXI_CLK>,
1038 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1039 <&gcc GPLL0_OUT_MSSCC>,
1040 <&gcc GCC_MSS_SNOC_AXI_CLK>,
1041 <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>,
1056 resets = <&gcc GCC_MSS_RESTART>;
1085 clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,
1087 <&gcc GCC_BIMC_GFX_CLK>,
1088 <&gcc GCC_GPU_BIMC_GFX_CLK>,
1177 clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,
1178 <&gcc GCC_BIMC_GFX_CLK>,
1179 <&gcc GCC_GPU_BIMC_GFX_CLK>;
1208 <&gcc GCC_GPU_GPLL0_CLK>,
1209 <&gcc GCC_GPU_GPLL0_DIV_CLK>;
1275 clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>,
1276 <&gcc GCC_USB30_MASTER_CLK>,
1277 <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
1278 <&gcc GCC_USB30_SLEEP_CLK>,
1279 <&gcc GCC_USB30_MOCK_UTMI_CLK>;
1286 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1287 <&gcc GCC_USB30_MASTER_CLK>;
1299 power-domains = <&gcc USB_30_GDSC>;
1301 resets = <&gcc GCC_USB_30_BCR>;
1323 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
1324 <&gcc GCC_USB3_CLKREF_CLK>,
1325 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1326 <&gcc GCC_USB3_PHY_PIPE_CLK>;
1335 resets = <&gcc GCC_USB3_PHY_BCR>,
1336 <&gcc GCC_USB3PHY_PHY_BCR>;
1350 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1351 <&gcc GCC_RX0_USB2_CLKREF_CLK>;
1354 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
1364 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1365 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
1368 resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
1384 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1385 <&gcc GCC_SDCC2_APPS_CLK>,
1389 resets = <&gcc GCC_SDCC2_BCR>;
1438 clocks = <&gcc GCC_SDCC1_AHB_CLK>,
1439 <&gcc GCC_SDCC1_APPS_CLK>,
1441 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
1444 resets = <&gcc GCC_SDCC1_BCR>;
1492 clocks = <&gcc GCC_CFG_NOC_USB2_AXI_CLK>,
1493 <&gcc GCC_USB20_MASTER_CLK>,
1494 <&gcc GCC_USB20_SLEEP_CLK>,
1495 <&gcc GCC_USB20_MOCK_UTMI_CLK>;
1499 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
1500 <&gcc GCC_USB20_MASTER_CLK>;
1512 resets = <&gcc GCC_USB_20_BCR>;
1549 <&gcc GCC_MMSS_GPLL0_CLK>,
1550 <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
1741 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1754 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
1755 <&gcc GCC_BLSP1_AHB_CLK>;
1769 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
1770 <&gcc GCC_BLSP1_AHB_CLK>;
1784 clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
1785 <&gcc GCC_BLSP1_AHB_CLK>;
1804 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1805 <&gcc GCC_BLSP1_AHB_CLK>;
1824 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1825 <&gcc GCC_BLSP1_AHB_CLK>;
1844 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1845 <&gcc GCC_BLSP1_AHB_CLK>;
1863 clocks = <&gcc GCC_BLSP2_AHB_CLK>;
1876 clocks = <&gcc GCC_BLSP2_UART1_APPS_CLK>,
1877 <&gcc GCC_BLSP2_AHB_CLK>;
1892 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1893 <&gcc GCC_BLSP2_AHB_CLK>;
1912 clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
1913 <&gcc GCC_BLSP2_AHB_CLK>;
1932 clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
1933 <&gcc GCC_BLSP2_AHB_CLK>;
1952 clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>,
1953 <&gcc GCC_BLSP2_AHB_CLK>;