Lines Matching +full:1 +full:d84000
148 clocks = <&cpufreq_hw 1>;
155 qcom,freq-domain = <&cpufreq_hw 1>;
171 clocks = <&cpufreq_hw 1>;
178 qcom,freq-domain = <&cpufreq_hw 1>;
194 clocks = <&cpufreq_hw 1>;
201 qcom,freq-domain = <&cpufreq_hw 1>;
217 clocks = <&cpufreq_hw 1>;
224 qcom,freq-domain = <&cpufreq_hw 1>;
285 big_cpu_sleep_0: cpu-sleep-1-0 {
733 #qcom,smem-state-cells = <1>;
757 #qcom,smem-state-cells = <1>;
781 #qcom,smem-state-cells = <1>;
805 #qcom,smem-state-cells = <1>;
855 #clock-cells = <1>;
856 #reset-cells = <1>;
857 #power-domain-cells = <1>;
906 #address-cells = <1>;
907 #size-cells = <1>;
932 #address-cells = <1>;
948 #address-cells = <1>;
964 #address-cells = <1>;
980 #address-cells = <1>;
1010 #address-cells = <1>;
1026 #address-cells = <1>;
1060 #address-cells = <1>;
1076 #address-cells = <1>;
1092 #address-cells = <1>;
1108 #address-cells = <1>;
1127 #address-cells = <1>;
1140 #address-cells = <1>;
1156 #address-cells = <1>;
1172 #address-cells = <1>;
1188 #address-cells = <1>;
1204 #address-cells = <1>;
1235 #address-cells = <1>;
1251 #address-cells = <1>;
1267 #address-cells = <1>;
1283 #address-cells = <1>;
1299 #address-cells = <1>;
1315 #address-cells = <1>;
1345 #address-cells = <1>;
1361 #address-cells = <1>;
1380 #address-cells = <1>;
1393 #address-cells = <1>;
1409 #address-cells = <1>;
1425 #address-cells = <1>;
1441 #address-cells = <1>;
1457 #address-cells = <1>;
1473 #address-cells = <1>;
1489 #address-cells = <1>;
1520 #address-cells = <1>;
1536 #address-cells = <1>;
1552 #address-cells = <1>;
1568 #address-cells = <1>;
1584 #address-cells = <1>;
1600 #address-cells = <1>;
1616 #address-cells = <1>;
1632 #address-cells = <1>;
1648 #address-cells = <1>;
1664 #address-cells = <1>;
1680 #address-cells = <1>;
1696 #address-cells = <1>;
1712 #address-cells = <1>;
1728 #address-cells = <1>;
1744 #address-cells = <1>;
1760 #address-cells = <1>;
1781 pcie4: pcie@1c00000 {
1800 num-lanes = <1>;
1810 #interrupt-cells = <1>;
1812 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1865 pcie4_phy: phy@1c06000 {
1894 pcie3b: pcie@1c08000 {
1923 #interrupt-cells = <1>;
1925 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH>,
1976 pcie3b_phy: phy@1c0e000 {
2005 pcie3a: pcie@1c10000 {
2034 #interrupt-cells = <1>;
2036 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>,
2087 pcie3a_phy: phy@1c14000 {
2109 qcom,4ln-config-sel = <&tcsr 0xa044 1>;
2119 pcie2b: pcie@1c18000 {
2148 #interrupt-cells = <1>;
2150 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
2201 pcie2b_phy: phy@1c1e000 {
2230 pcie2a: pcie@1c20000 {
2259 #interrupt-cells = <1>;
2261 interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>,
2312 pcie2a_phy: phy@1c24000 {
2344 ufs_mem_hc: ufshc@1d84000 {
2352 #reset-cells = <1>;
2389 ufs_mem_phy: phy@1d87000 {
2410 ufs_card_hc: ufshc@1da4000 {
2418 #reset-cells = <1>;
2454 ufs_card_phy: phy@1da7000 {
2475 tcsr_mutex: hwlock@1f40000 {
2478 #hwlock-cells = <1>;
2481 tcsr: syscon@1fc0000 {
2492 <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
2532 #address-cells = <1>;
2535 compute-cb@1 {
2537 reg = <1>;
2562 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2600 #address-cells = <1>;
2603 q6apm: service@1 {
2616 #sound-dai-cells = <1>;
2649 #sound-dai-cells = <1>;
2680 #sound-dai-cells = <1>;
2705 #sound-dai-cells = <1>;
2725 #sound-dai-cells = <1>;
2756 #sound-dai-cells = <1>;
2766 #clock-cells = <1>;
2767 #reset-cells = <1>;
2782 #sound-dai-cells = <1>;
2814 #sound-dai-cells = <1>;
2838 slew-rate = <1>;
2846 slew-rate = <1>;
2856 slew-rate = <1>;
2864 slew-rate = <1>;
2942 slew-rate = <1>;
2950 slew-rate = <1>;
2960 slew-rate = <1>;
2968 slew-rate = <1>;
2977 #clock-cells = <1>;
2978 #reset-cells = <1>;
2991 iommus = <&gpu_smmu 0 0xc00>, <&gpu_smmu 1 0xc00>;
3110 #clock-cells = <1>;
3111 #reset-cells = <1>;
3112 #power-domain-cells = <1>;
3279 #clock-cells = <1>;
3280 #phy-cells = <1>;
3285 #address-cells = <1>;
3294 port@1 {
3295 reg = <1>;
3388 #clock-cells = <1>;
3389 #phy-cells = <1>;
3394 #address-cells = <1>;
3403 port@1 {
3404 reg = <1>;
3431 #clock-cells = <1>;
3449 #clock-cells = <1>;
3471 opp-1 {
3525 opp-1 {
3634 "usb2-1", "usb3-1",
3701 #address-cells = <1>;
3711 port@1 {
3712 reg = <1>;
3780 #address-cells = <1>;
3790 port@1 {
3791 reg = <1>;
3819 pinctrl-1 = <&cci0_sleep>;
3822 #address-cells = <1>;
3830 #address-cells = <1>;
3834 cci0_i2c1: i2c-bus@1 {
3835 reg = <1>;
3837 #address-cells = <1>;
3860 pinctrl-1 = <&cci1_sleep>;
3863 #address-cells = <1>;
3871 #address-cells = <1>;
3875 cci1_i2c1: i2c-bus@1 {
3876 reg = <1>;
3878 #address-cells = <1>;
3900 pinctrl-1 = <&cci2_sleep>;
3903 #address-cells = <1>;
3911 #address-cells = <1>;
3915 cci2_i2c1: i2c-bus@1 {
3916 reg = <1>;
3918 #address-cells = <1>;
3941 pinctrl-1 = <&cci3_sleep>;
3944 #address-cells = <1>;
3952 #address-cells = <1>;
3956 cci3_i2c1: i2c-bus@1 {
3957 reg = <1>;
3959 #address-cells = <1>;
4170 #address-cells = <1>;
4175 #address-cells = <1>;
4179 port@1 {
4180 reg = <1>;
4181 #address-cells = <1>;
4187 #address-cells = <1>;
4193 #address-cells = <1>;
4208 #clock-cells = <1>;
4209 #reset-cells = <1>;
4210 #power-domain-cells = <1>;
4233 #interrupt-cells = <1>;
4267 #address-cells = <1>;
4363 #address-cells = <1>;
4374 port@1 {
4375 reg = <1>;
4441 #address-cells = <1>;
4452 port@1 {
4453 reg = <1>;
4509 assigned-clock-parents = <&mdss0_dp2_phy 0>, <&mdss0_dp2_phy 1>;
4517 #address-cells = <1>;
4527 port@1 {
4528 reg = <1>;
4581 assigned-clock-parents = <&mdss0_dp3_phy 0>, <&mdss0_dp3_phy 1>;
4589 #address-cells = <1>;
4599 port@1 {
4600 reg = <1>;
4642 #clock-cells = <1>;
4660 #clock-cells = <1>;
4678 <&mdss0_dp2_phy 1>,
4680 <&mdss0_dp3_phy 1>,
4687 #clock-cells = <1>;
4688 #power-domain-cells = <1>;
4689 #reset-cells = <1>;
4699 <54 263 1>,
4705 <69 86 1>,
4708 <159 638 1>,
4710 <168 801 1>,
4713 <201 449 1>,
4714 <202 89 1>,
4715 <203 451 1>,
4716 <204 462 1>,
4717 <205 264 1>,
4718 <206 579 1>,
4719 <207 653 1>,
4720 <208 656 1>,
4721 <209 659 1>,
4722 <210 122 1>,
4723 <211 699 1>,
4724 <212 705 1>,
4725 <213 450 1>,
4726 <214 643 1>,
4731 <232 269 1>,
4732 <233 377 1>,
4733 <234 372 1>,
4734 <235 138 1>,
4735 <236 857 1>,
4736 <237 860 1>,
4737 <238 137 1>,
4738 <239 668 1>,
4739 <240 366 1>,
4740 <241 949 1>,
4742 <247 769 1>,
4743 <248 768 1>,
4744 <249 663 1>,
4746 <252 798 1>,
4747 <253 765 1>,
4748 <254 763 1>,
4749 <255 454 1>,
4750 <258 139 1>,
4767 #thermal-sensor-cells = <1>;
4778 #thermal-sensor-cells = <1>;
4789 #thermal-sensor-cells = <1>;
4807 #thermal-sensor-cells = <1>;
4834 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
5032 #iommu-cells = <1>;
5188 #redistributor-regions = <1>;
5199 #msi-cells = <1>;
5213 #address-cells = <1>;
5214 #size-cells = <1>;
5226 frame-number = <1>;
5273 reg-names = "drv-0", "drv-1", "drv-2";
5280 <WAKE_TCS 3>, <CONTROL_TCS 1>;
5290 #clock-cells = <1>;
5297 #power-domain-cells = <1>;
5353 #interconnect-cells = <1>;
5365 "dcvsh-irq-1";
5370 #freq-domain-cells = <1>;
5371 #clock-cells = <1>;
5374 remoteproc_nsp0: remoteproc@1b300000 {
5380 <&smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING>,
5415 #address-cells = <1>;
5418 compute-cb@1 {
5420 reg = <1>;
5511 <&smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING>,
5565 #interrupt-cells = <1>;
5599 #address-cells = <1>;
5684 assigned-clock-parents = <&mdss1_dp0_phy 0>, <&mdss1_dp0_phy 1>;
5692 #address-cells = <1>;
5702 port@1 {
5703 reg = <1>;
5756 assigned-clock-parents = <&mdss1_dp1_phy 0>, <&mdss1_dp1_phy 1>;
5764 #address-cells = <1>;
5774 port@1 {
5775 reg = <1>;
5828 assigned-clock-parents = <&mdss1_dp2_phy 0>, <&mdss1_dp2_phy 1>;
5836 #address-cells = <1>;
5846 port@1 {
5847 reg = <1>;
5900 assigned-clock-parents = <&mdss1_dp3_phy 0>, <&mdss1_dp3_phy 1>;
5908 #address-cells = <1>;
5918 port@1 {
5919 reg = <1>;
5961 #clock-cells = <1>;
5979 #clock-cells = <1>;
5993 <&mdss1_dp0_phy 1>,
5995 <&mdss1_dp1_phy 1>,
5997 <&mdss1_dp2_phy 1>,
5999 <&mdss1_dp3_phy 1>,
6006 #clock-cells = <1>;
6007 #power-domain-cells = <1>;
6008 #reset-cells = <1>;
6051 thermal-sensors = <&tsens0 1>;