Lines Matching +full:1 +full:ac00000
233 clocks = <&cpufreq_hw 1>;
244 qcom,freq-domain = <&cpufreq_hw 1>;
257 clocks = <&cpufreq_hw 1>;
268 qcom,freq-domain = <&cpufreq_hw 1>;
326 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
336 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
346 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
367 CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
693 qcom,client-id = <1>;
717 #qcom,smem-state-cells = <1>;
741 #qcom,smem-state-cells = <1>;
758 qcom,remote-pid = <1>;
762 #qcom,smem-state-cells = <1>;
773 #qcom,smem-state-cells = <1>;
797 #clock-cells = <1>;
798 #reset-cells = <1>;
799 #power-domain-cells = <1>;
812 #address-cells = <1>;
813 #size-cells = <1>;
817 bits = <1 3>;
820 gpu_speed_bin: gpu-speed-bin@1d2 {
851 mmc-ddr-1_8v;
852 mmc-hs200-1_8v;
853 mmc-hs400-1_8v;
897 #address-cells = <1>;
917 #address-cells = <1>;
951 #address-cells = <1>;
971 #address-cells = <1>;
1005 #address-cells = <1>;
1041 #address-cells = <1>;
1061 #address-cells = <1>;
1095 #address-cells = <1>;
1131 #address-cells = <1>;
1151 #address-cells = <1>;
1198 #address-cells = <1>;
1218 #address-cells = <1>;
1252 #address-cells = <1>;
1288 #address-cells = <1>;
1308 #address-cells = <1>;
1342 #address-cells = <1>;
1378 #address-cells = <1>;
1398 #address-cells = <1>;
1432 #address-cells = <1>;
1452 #address-cells = <1>;
1535 ufs_mem_hc: ufshc@1d84000 {
1542 lanes-per-direction = <1>;
1543 #reset-cells = <1>;
1584 ufs_mem_phy: phy@1d87000 {
1600 ice: crypto@1d90000 {
1607 ipa: ipa@1e40000 {
1622 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1641 <&ipa_smp2p_out 1>;
1648 tcsr_mutex: hwlock@1f40000 {
1651 #hwlock-cells = <1>;
1654 tcsr_regs_1: syscon@1f60000 {
1659 tcsr_regs_2: syscon@1fc0000 {
2134 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2161 qcom,remote-pid = <1>;
2248 #iommu-cells = <1>;
2305 #clock-cells = <1>;
2306 #reset-cells = <1>;
2307 #power-domain-cells = <1>;
2351 #address-cells = <1>;
2379 #address-cells = <1>;
2407 #address-cells = <1>;
2417 port@1 {
2418 reg = <1>;
2484 #address-cells = <1>;
2721 #address-cells = <1>;
2731 port@1 {
2732 reg = <1>;
2853 #address-cells = <1>;
2900 #clock-cells = <1>;
2901 #phy-cells = <1>;
2920 opp-1 {
2958 opp-1 {
3141 #clock-cells = <1>;
3142 #reset-cells = <1>;
3143 #power-domain-cells = <1>;
3146 camnoc_virt: interconnect@ac00000 {
3160 #clock-cells = <1>;
3161 #reset-cells = <1>;
3162 #power-domain-cells = <1>;
3179 #interrupt-cells = <1>;
3223 #address-cells = <1>;
3289 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
3296 #address-cells = <1>;
3302 #address-cells = <1>;
3312 port@1 {
3313 reg = <1>;
3348 #clock-cells = <1>;
3391 #address-cells = <1>;
3400 port@1 {
3401 reg = <1>;
3438 <&mdss_dsi0_phy 1>,
3447 #clock-cells = <1>;
3448 #reset-cells = <1>;
3449 #power-domain-cells = <1>;
3455 qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3464 #reset-cells = <1>;
3475 #thermal-sensor-cells = <1>;
3486 #thermal-sensor-cells = <1>;
3492 #reset-cells = <1>;
3518 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3531 #address-cells = <1>;
3532 #size-cells = <1>;
3546 #global-interrupts = <1>;
3644 #msi-cells = <1>;
3654 #mbox-cells = <1>;
3665 #address-cells = <1>;
3666 #size-cells = <1>;
3680 frame-number = <1>;
3727 reg-names = "drv-0", "drv-1", "drv-2";
3736 <CONTROL_TCS 1>;
3743 #clock-cells = <1>;
3748 #power-domain-cells = <1>;
3812 #interconnect-cells = <1>;
3823 #freq-domain-cells = <1>;
3824 #clock-cells = <1>;
3856 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
3888 #address-cells = <1>;
3904 #address-cells = <1>;
3906 #sound-dai-cells = <1>;
3922 #address-cells = <1>;
3924 #sound-dai-cells = <1>;
3945 #address-cells = <1>;
3979 #clock-cells = <1>;
3980 #power-domain-cells = <1>;
4012 #sound-dai-cells = <1>;
4013 #address-cells = <1>;
4029 #clock-cells = <1>;
4030 #power-domain-cells = <1>;
4040 thermal-sensors = <&tsens0 1>;
4620 thermal-sensors = <&tsens1 1>;
4800 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,