Lines Matching +full:0 +full:xb3e4
50 reg = <0x0 0x94600000 0x0 0x800000>;
56 reg = <0x0 0x80b00000 0x0 0x100000>;
61 reg = <0x0 0x86000000 0x0 0x8c00000>;
66 reg = <0x0 0x8ec00000 0x0 0x500000>;
71 reg = <0 0x8f600000 0 0x500000>;
76 reg = <0x0 0x94100000 0x0 0x200000>;
81 reg = <0x0 0x94400000 0x0 0x200000>;
86 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
87 size = <0x0 0x4000>;
94 regulators-0 {
308 panel@0 {
310 reg = <0>;
316 pinctrl-0 = <&disp_pins>;
331 data-lanes = <0 1 2 3>;
349 pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>;
351 flash@0 {
353 reg = <0>;
371 reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
382 iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
389 qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
390 qcom,spare-regs = <&tcsr_regs_2 0xb3e4>;
402 pinctrl-0 = <&sdc1_on>;
412 pinctrl-0 = <&sdc2_on>;
460 qcom,bias-ctrl-value = <0x22>;
462 qcom,hsdisc-trim-value = <0>;
473 iommus = <&apps_smmu 0x0c42 0x0>;
485 iommus = <&apps_smmu 0xc2 0x1>;
497 power-source = <0>;