Lines Matching +full:qup +full:- +full:memory
1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
18 #include <dt-bindings/power/qcom-rpmpd.h>
19 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
22 interrupt-parent = <&intc>;
24 #address-cells = <2>;
25 #size-cells = <2>;
28 xo_board_clk: xo-board-clk {
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
33 sleep_clk: sleep-clk {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
40 #address-cells = <2>;
41 #size-cells = <0>;
47 enable-method = "psci";
48 power-domains = <&cpu_pd0>;
49 power-domain-names = "psci";
50 qcom,freq-domain = <&cpufreq_hw 0>;
51 next-level-cache = <&l2_0>;
52 capacity-dmips-mhz = <1024>;
53 dynamic-power-coefficient = <100>;
54 l2_0: l2-cache {
56 cache-level = <2>;
57 cache-unified;
58 next-level-cache = <&l3_0>;
59 l3_0: l3-cache {
61 cache-level = <3>;
62 cache-unified;
71 enable-method = "psci";
72 power-domains = <&cpu_pd1>;
73 power-domain-names = "psci";
74 qcom,freq-domain = <&cpufreq_hw 0>;
75 next-level-cache = <&l2_1>;
76 capacity-dmips-mhz = <1024>;
77 dynamic-power-coefficient = <100>;
78 l2_1: l2-cache {
80 cache-level = <2>;
81 cache-unified;
82 next-level-cache = <&l3_0>;
90 enable-method = "psci";
91 power-domains = <&cpu_pd2>;
92 power-domain-names = "psci";
93 qcom,freq-domain = <&cpufreq_hw 0>;
94 next-level-cache = <&l2_2>;
95 capacity-dmips-mhz = <1024>;
96 dynamic-power-coefficient = <100>;
97 l2_2: l2-cache {
99 cache-level = <2>;
100 cache-unified;
101 next-level-cache = <&l3_0>;
109 enable-method = "psci";
110 power-domains = <&cpu_pd3>;
111 power-domain-names = "psci";
112 qcom,freq-domain = <&cpufreq_hw 0>;
113 next-level-cache = <&l2_3>;
114 capacity-dmips-mhz = <1024>;
115 dynamic-power-coefficient = <100>;
116 l2_3: l2-cache {
118 cache-level = <2>;
119 cache-unified;
120 next-level-cache = <&l3_0>;
128 enable-method = "psci";
129 power-domains = <&cpu_pd4>;
130 power-domain-names = "psci";
131 qcom,freq-domain = <&cpufreq_hw 1>;
132 next-level-cache = <&l2_4>;
133 capacity-dmips-mhz = <1024>;
134 dynamic-power-coefficient = <100>;
135 l2_4: l2-cache {
137 cache-level = <2>;
138 cache-unified;
139 next-level-cache = <&l3_1>;
140 l3_1: l3-cache {
142 cache-level = <3>;
143 cache-unified;
153 enable-method = "psci";
154 power-domains = <&cpu_pd5>;
155 power-domain-names = "psci";
156 qcom,freq-domain = <&cpufreq_hw 1>;
157 next-level-cache = <&l2_5>;
158 capacity-dmips-mhz = <1024>;
159 dynamic-power-coefficient = <100>;
160 l2_5: l2-cache {
162 cache-level = <2>;
163 cache-unified;
164 next-level-cache = <&l3_1>;
172 enable-method = "psci";
173 power-domains = <&cpu_pd6>;
174 power-domain-names = "psci";
175 qcom,freq-domain = <&cpufreq_hw 1>;
176 next-level-cache = <&l2_6>;
177 capacity-dmips-mhz = <1024>;
178 dynamic-power-coefficient = <100>;
179 l2_6: l2-cache {
181 cache-level = <2>;
182 cache-unified;
183 next-level-cache = <&l3_1>;
191 enable-method = "psci";
192 power-domains = <&cpu_pd7>;
193 power-domain-names = "psci";
194 qcom,freq-domain = <&cpufreq_hw 1>;
195 next-level-cache = <&l2_7>;
196 capacity-dmips-mhz = <1024>;
197 dynamic-power-coefficient = <100>;
198 l2_7: l2-cache {
200 cache-level = <2>;
201 cache-unified;
202 next-level-cache = <&l3_1>;
206 cpu-map {
244 idle-states {
245 entry-method = "psci";
247 gold_cpu_sleep_0: cpu-sleep-0 {
248 compatible = "arm,idle-state";
249 idle-state-name = "gold-power-collapse";
250 arm,psci-suspend-param = <0x40000003>;
251 entry-latency-us = <549>;
252 exit-latency-us = <901>;
253 min-residency-us = <1774>;
254 local-timer-stop;
257 gold_rail_cpu_sleep_0: cpu-sleep-1 {
258 compatible = "arm,idle-state";
259 idle-state-name = "gold-rail-power-collapse";
260 arm,psci-suspend-param = <0x40000004>;
261 entry-latency-us = <702>;
262 exit-latency-us = <1061>;
263 min-residency-us = <4488>;
264 local-timer-stop;
268 domain-idle-states {
269 cluster_sleep_gold: cluster-sleep-0 {
270 compatible = "domain-idle-state";
271 arm,psci-suspend-param = <0x41000044>;
272 entry-latency-us = <2752>;
273 exit-latency-us = <3048>;
274 min-residency-us = <6118>;
277 cluster_sleep_apss_rsc_pc: cluster-sleep-1 {
278 compatible = "domain-idle-state";
279 arm,psci-suspend-param = <0x42000144>;
280 entry-latency-us = <3263>;
281 exit-latency-us = <6562>;
282 min-residency-us = <9987>;
287 dummy-sink {
288 compatible = "arm,coresight-dummy-sink";
290 in-ports {
293 remote-endpoint =
302 compatible = "qcom,scm-sa8775p", "qcom,scm";
303 qcom,dload-mode = <&tcsr 0x13000>;
304 memory-region = <&tz_ffi_mem>;
308 aggre1_noc: interconnect-aggre1-noc {
309 compatible = "qcom,sa8775p-aggre1-noc";
310 #interconnect-cells = <2>;
311 qcom,bcm-voters = <&apps_bcm_voter>;
314 aggre2_noc: interconnect-aggre2-noc {
315 compatible = "qcom,sa8775p-aggre2-noc";
316 #interconnect-cells = <2>;
317 qcom,bcm-voters = <&apps_bcm_voter>;
320 clk_virt: interconnect-clk-virt {
321 compatible = "qcom,sa8775p-clk-virt";
322 #interconnect-cells = <2>;
323 qcom,bcm-voters = <&apps_bcm_voter>;
326 config_noc: interconnect-config-noc {
327 compatible = "qcom,sa8775p-config-noc";
328 #interconnect-cells = <2>;
329 qcom,bcm-voters = <&apps_bcm_voter>;
332 dc_noc: interconnect-dc-noc {
333 compatible = "qcom,sa8775p-dc-noc";
334 #interconnect-cells = <2>;
335 qcom,bcm-voters = <&apps_bcm_voter>;
338 gem_noc: interconnect-gem-noc {
339 compatible = "qcom,sa8775p-gem-noc";
340 #interconnect-cells = <2>;
341 qcom,bcm-voters = <&apps_bcm_voter>;
344 gpdsp_anoc: interconnect-gpdsp-anoc {
345 compatible = "qcom,sa8775p-gpdsp-anoc";
346 #interconnect-cells = <2>;
347 qcom,bcm-voters = <&apps_bcm_voter>;
350 lpass_ag_noc: interconnect-lpass-ag-noc {
351 compatible = "qcom,sa8775p-lpass-ag-noc";
352 #interconnect-cells = <2>;
353 qcom,bcm-voters = <&apps_bcm_voter>;
356 mc_virt: interconnect-mc-virt {
357 compatible = "qcom,sa8775p-mc-virt";
358 #interconnect-cells = <2>;
359 qcom,bcm-voters = <&apps_bcm_voter>;
362 mmss_noc: interconnect-mmss-noc {
363 compatible = "qcom,sa8775p-mmss-noc";
364 #interconnect-cells = <2>;
365 qcom,bcm-voters = <&apps_bcm_voter>;
368 nspa_noc: interconnect-nspa-noc {
369 compatible = "qcom,sa8775p-nspa-noc";
370 #interconnect-cells = <2>;
371 qcom,bcm-voters = <&apps_bcm_voter>;
374 nspb_noc: interconnect-nspb-noc {
375 compatible = "qcom,sa8775p-nspb-noc";
376 #interconnect-cells = <2>;
377 qcom,bcm-voters = <&apps_bcm_voter>;
380 pcie_anoc: interconnect-pcie-anoc {
381 compatible = "qcom,sa8775p-pcie-anoc";
382 #interconnect-cells = <2>;
383 qcom,bcm-voters = <&apps_bcm_voter>;
386 system_noc: interconnect-system-noc {
387 compatible = "qcom,sa8775p-system-noc";
388 #interconnect-cells = <2>;
389 qcom,bcm-voters = <&apps_bcm_voter>;
393 memory@80000000 {
394 device_type = "memory";
398 qup_opp_table_100mhz: opp-table-qup100mhz {
399 compatible = "operating-points-v2";
401 opp-100000000 {
402 opp-hz = /bits/ 64 <100000000>;
403 required-opps = <&rpmhpd_opp_svs_l1>;
408 compatible = "arm,armv8-pmuv3";
413 compatible = "arm,psci-1.0";
416 cpu_pd0: power-domain-cpu0 {
417 #power-domain-cells = <0>;
418 power-domains = <&cluster_0_pd>;
419 domain-idle-states = <&gold_cpu_sleep_0>,
423 cpu_pd1: power-domain-cpu1 {
424 #power-domain-cells = <0>;
425 power-domains = <&cluster_0_pd>;
426 domain-idle-states = <&gold_cpu_sleep_0>,
430 cpu_pd2: power-domain-cpu2 {
431 #power-domain-cells = <0>;
432 power-domains = <&cluster_0_pd>;
433 domain-idle-states = <&gold_cpu_sleep_0>,
437 cpu_pd3: power-domain-cpu3 {
438 #power-domain-cells = <0>;
439 power-domains = <&cluster_0_pd>;
440 domain-idle-states = <&gold_cpu_sleep_0>,
444 cpu_pd4: power-domain-cpu4 {
445 #power-domain-cells = <0>;
446 power-domains = <&cluster_1_pd>;
447 domain-idle-states = <&gold_cpu_sleep_0>,
451 cpu_pd5: power-domain-cpu5 {
452 #power-domain-cells = <0>;
453 power-domains = <&cluster_1_pd>;
454 domain-idle-states = <&gold_cpu_sleep_0>,
458 cpu_pd6: power-domain-cpu6 {
459 #power-domain-cells = <0>;
460 power-domains = <&cluster_1_pd>;
461 domain-idle-states = <&gold_cpu_sleep_0>,
465 cpu_pd7: power-domain-cpu7 {
466 #power-domain-cells = <0>;
467 power-domains = <&cluster_1_pd>;
468 domain-idle-states = <&gold_cpu_sleep_0>,
472 cluster_0_pd: power-domain-cluster0 {
473 #power-domain-cells = <0>;
474 power-domains = <&cluster_2_pd>;
475 domain-idle-states = <&cluster_sleep_gold>;
478 cluster_1_pd: power-domain-cluster1 {
479 #power-domain-cells = <0>;
480 power-domains = <&cluster_2_pd>;
481 domain-idle-states = <&cluster_sleep_gold>;
484 cluster_2_pd: power-domain-cluster2 {
485 #power-domain-cells = <0>;
486 domain-idle-states = <&cluster_sleep_apss_rsc_pc>;
490 reserved-memory {
491 #address-cells = <2>;
492 #size-cells = <2>;
495 sail_ss_mem: sail-ss@80000000 {
497 no-map;
502 no-map;
505 xbl_boot_mem: xbl-boot@90600000 {
507 no-map;
510 aop_image_mem: aop-image@90800000 {
512 no-map;
515 aop_cmd_db_mem: aop-cmd-db@90860000 {
516 compatible = "qcom,cmd-db";
518 no-map;
521 uefi_log: uefi-log@908b0000 {
523 no-map;
526 ddr_training_checksum: ddr-training-checksum@908c0000 {
528 no-map;
533 no-map;
536 secdata_apss_mem: secdata-apss@908fe000 {
538 no-map;
544 no-map;
548 tz_sail_mailbox_mem: tz-sail-mailbox@90c00000 {
550 no-map;
553 sail_mailbox_mem: sail-ss@90d00000 {
555 no-map;
558 sail_ota_mem: sail-ss@90e00000 {
560 no-map;
563 aoss_backup_mem: aoss-backup@91b00000 {
565 no-map;
568 cpucp_backup_mem: cpucp-backup@91b40000 {
570 no-map;
573 tz_config_backup_mem: tz-config-backup@91b80000 {
575 no-map;
578 ddr_training_data_mem: ddr-training-data@91b90000 {
580 no-map;
583 cdt_data_backup_mem: cdt-data-backup@91ba0000 {
585 no-map;
588 tz_ffi_mem: tz-ffi@91c00000 {
589 compatible = "shared-dma-pool";
591 no-map;
594 lpass_machine_learning_mem: lpass-machine-learning@93b00000 {
596 no-map;
599 adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@94a00000 {
601 no-map;
604 pil_camera_mem: pil-camera@95200000 {
606 no-map;
609 pil_adsp_mem: pil-adsp@95c00000 {
611 no-map;
614 pil_gdsp0_mem: pil-gdsp0@97b00000 {
616 no-map;
619 pil_gdsp1_mem: pil-gdsp1@99900000 {
621 no-map;
624 pil_cdsp0_mem: pil-cdsp0@9b800000 {
626 no-map;
629 pil_gpu_mem: pil-gpu@9d600000 {
631 no-map;
634 pil_cdsp1_mem: pil-cdsp1@9d700000 {
636 no-map;
639 pil_cvp_mem: pil-cvp@9f500000 {
641 no-map;
644 pil_video_mem: pil-video@9fc00000 {
646 no-map;
649 audio_mdf_mem: audio-mdf-region@ae000000 {
651 no-map;
654 firmware_mem: firmware-region@b0000000 {
656 no-map;
659 hyptz_reserved_mem: hyptz-reserved@beb00000 {
661 no-map;
664 scmi_mem: scmi-region@d0000000 {
666 no-map;
669 firmware_logs_mem: firmware-logs@d0040000 {
671 no-map;
674 firmware_audio_mem: firmware-audio@d0050000 {
676 no-map;
679 firmware_reserved_mem: firmware-reserved@d0054000 {
681 no-map;
684 firmware_quantum_test_mem: firmware-quantum-test@d00f0000 {
686 no-map;
691 no-map;
696 no-map;
699 deepsleep_backup_mem: deepsleep-backup@d1800000 {
701 no-map;
704 trusted_apps_mem: trusted-apps@d1900000 {
706 no-map;
709 tz_stat_mem: tz-stat@db100000 {
711 no-map;
714 cpucp_fw_mem: cpucp-fw@db200000 {
716 no-map;
720 smp2p-adsp {
723 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
728 qcom,local-pid = <0>;
729 qcom,remote-pid = <2>;
731 smp2p_adsp_out: master-kernel {
732 qcom,entry-name = "master-kernel";
733 #qcom,smem-state-cells = <1>;
736 smp2p_adsp_in: slave-kernel {
737 qcom,entry-name = "slave-kernel";
738 interrupt-controller;
739 #interrupt-cells = <2>;
743 smp2p-cdsp0 {
746 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
751 qcom,local-pid = <0>;
752 qcom,remote-pid = <5>;
754 smp2p_cdsp0_out: master-kernel {
755 qcom,entry-name = "master-kernel";
756 #qcom,smem-state-cells = <1>;
759 smp2p_cdsp0_in: slave-kernel {
760 qcom,entry-name = "slave-kernel";
761 interrupt-controller;
762 #interrupt-cells = <2>;
766 smp2p-cdsp1 {
769 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
774 qcom,local-pid = <0>;
775 qcom,remote-pid = <12>;
777 smp2p_cdsp1_out: master-kernel {
778 qcom,entry-name = "master-kernel";
779 #qcom,smem-state-cells = <1>;
782 smp2p_cdsp1_in: slave-kernel {
783 qcom,entry-name = "slave-kernel";
784 interrupt-controller;
785 #interrupt-cells = <2>;
789 smp2p-gpdsp0 {
792 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
797 qcom,local-pid = <0>;
798 qcom,remote-pid = <17>;
800 smp2p_gpdsp0_out: master-kernel {
801 qcom,entry-name = "master-kernel";
802 #qcom,smem-state-cells = <1>;
805 smp2p_gpdsp0_in: slave-kernel {
806 qcom,entry-name = "slave-kernel";
807 interrupt-controller;
808 #interrupt-cells = <2>;
812 smp2p-gpdsp1 {
815 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
820 qcom,local-pid = <0>;
821 qcom,remote-pid = <18>;
823 smp2p_gpdsp1_out: master-kernel {
824 qcom,entry-name = "master-kernel";
825 #qcom,smem-state-cells = <1>;
828 smp2p_gpdsp1_in: slave-kernel {
829 qcom,entry-name = "slave-kernel";
830 interrupt-controller;
831 #interrupt-cells = <2>;
836 compatible = "simple-bus";
837 #address-cells = <2>;
838 #size-cells = <2>;
841 gcc: clock-controller@100000 {
842 compatible = "qcom,sa8775p-gcc";
844 #clock-cells = <1>;
845 #reset-cells = <1>;
846 #power-domain-cells = <1>;
862 power-domains = <&rpmhpd SA8775P_CX>;
866 compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
869 interrupt-controller;
870 #interrupt-cells = <3>;
871 #mbox-cells = <2>;
874 gpi_dma2: dma-controller@800000 {
875 compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";
877 #dma-cells = <3>;
890 dma-channels = <12>;
891 dma-channel-mask = <0xfff>;
897 compatible = "qcom,geni-se-qup";
902 clock-names = "m-ahb", "s-ahb";
904 #address-cells = <2>;
905 #size-cells = <2>;
909 compatible = "qcom,geni-i2c";
911 #address-cells = <1>;
912 #size-cells = <0>;
915 clock-names = "se";
922 interconnect-names = "qup-core",
923 "qup-config",
924 "qup-memory";
925 power-domains = <&rpmhpd SA8775P_CX>;
928 dma-names = "tx",
934 compatible = "qcom,geni-spi";
936 #address-cells = <1>;
937 #size-cells = <0>;
940 clock-names = "se";
947 interconnect-names = "qup-core",
948 "qup-config",
949 "qup-memory";
950 power-domains = <&rpmhpd SA8775P_CX>;
953 dma-names = "tx",
959 compatible = "qcom,geni-uart";
963 clock-names = "se";
968 interconnect-names = "qup-core", "qup-config";
969 power-domains = <&rpmhpd SA8775P_CX>;
974 compatible = "qcom,geni-i2c";
976 #address-cells = <1>;
977 #size-cells = <0>;
980 clock-names = "se";
987 interconnect-names = "qup-core",
988 "qup-config",
989 "qup-memory";
990 power-domains = <&rpmhpd SA8775P_CX>;
993 dma-names = "tx",
999 compatible = "qcom,geni-spi";
1001 #address-cells = <1>;
1002 #size-cells = <0>;
1005 clock-names = "se";
1012 interconnect-names = "qup-core",
1013 "qup-config",
1014 "qup-memory";
1015 power-domains = <&rpmhpd SA8775P_CX>;
1018 dma-names = "tx",
1024 compatible = "qcom,geni-uart";
1028 clock-names = "se";
1033 interconnect-names = "qup-core", "qup-config";
1034 power-domains = <&rpmhpd SA8775P_CX>;
1039 compatible = "qcom,geni-i2c";
1041 #address-cells = <1>;
1042 #size-cells = <0>;
1045 clock-names = "se";
1052 interconnect-names = "qup-core",
1053 "qup-config",
1054 "qup-memory";
1055 power-domains = <&rpmhpd SA8775P_CX>;
1058 dma-names = "tx",
1064 compatible = "qcom,geni-spi";
1068 clock-names = "se";
1075 interconnect-names = "qup-core",
1076 "qup-config",
1077 "qup-memory";
1078 power-domains = <&rpmhpd SA8775P_CX>;
1081 dma-names = "tx",
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1089 compatible = "qcom,geni-uart";
1093 clock-names = "se";
1098 interconnect-names = "qup-core", "qup-config";
1099 power-domains = <&rpmhpd SA8775P_CX>;
1104 compatible = "qcom,geni-i2c";
1106 #address-cells = <1>;
1107 #size-cells = <0>;
1110 clock-names = "se";
1117 interconnect-names = "qup-core",
1118 "qup-config",
1119 "qup-memory";
1120 power-domains = <&rpmhpd SA8775P_CX>;
1123 dma-names = "tx",
1129 compatible = "qcom,geni-spi";
1131 #address-cells = <1>;
1132 #size-cells = <0>;
1135 clock-names = "se";
1142 interconnect-names = "qup-core",
1143 "qup-config",
1144 "qup-memory";
1145 power-domains = <&rpmhpd SA8775P_CX>;
1148 dma-names = "tx",
1154 compatible = "qcom,geni-uart";
1158 clock-names = "se";
1163 interconnect-names = "qup-core", "qup-config";
1164 power-domains = <&rpmhpd SA8775P_CX>;
1169 compatible = "qcom,geni-i2c";
1173 clock-names = "se";
1180 interconnect-names = "qup-core",
1181 "qup-config",
1182 "qup-memory";
1183 power-domains = <&rpmhpd SA8775P_CX>;
1186 dma-names = "tx",
1188 #address-cells = <1>;
1189 #size-cells = <0>;
1194 compatible = "qcom,geni-spi";
1196 #address-cells = <1>;
1197 #size-cells = <0>;
1200 clock-names = "se";
1207 interconnect-names = "qup-core",
1208 "qup-config",
1209 "qup-memory";
1210 power-domains = <&rpmhpd SA8775P_CX>;
1213 dma-names = "tx",
1219 compatible = "qcom,geni-uart";
1223 clock-names = "se";
1228 interconnect-names = "qup-core", "qup-config";
1229 power-domains = <&rpmhpd SA8775P_CX>;
1234 compatible = "qcom,geni-i2c";
1236 #address-cells = <1>;
1237 #size-cells = <0>;
1240 clock-names = "se";
1247 interconnect-names = "qup-core",
1248 "qup-config",
1249 "qup-memory";
1250 power-domains = <&rpmhpd SA8775P_CX>;
1253 dma-names = "tx",
1259 compatible = "qcom,geni-spi";
1261 #address-cells = <1>;
1262 #size-cells = <0>;
1265 clock-names = "se";
1272 interconnect-names = "qup-core",
1273 "qup-config",
1274 "qup-memory";
1275 power-domains = <&rpmhpd SA8775P_CX>;
1278 dma-names = "tx",
1284 compatible = "qcom,geni-uart";
1288 clock-names = "se";
1293 interconnect-names = "qup-core", "qup-config";
1294 power-domains = <&rpmhpd SA8775P_CX>;
1299 compatible = "qcom,geni-i2c";
1301 #address-cells = <1>;
1302 #size-cells = <0>;
1305 clock-names = "se";
1312 interconnect-names = "qup-core",
1313 "qup-config",
1314 "qup-memory";
1315 power-domains = <&rpmhpd SA8775P_CX>;
1318 dma-names = "tx",
1324 compatible = "qcom,geni-spi";
1326 #address-cells = <1>;
1327 #size-cells = <0>;
1330 clock-names = "se";
1337 interconnect-names = "qup-core",
1338 "qup-config",
1339 "qup-memory";
1340 power-domains = <&rpmhpd SA8775P_CX>;
1343 dma-names = "tx",
1349 compatible = "qcom,geni-uart";
1353 clock-names = "se";
1358 interconnect-names = "qup-core", "qup-config";
1359 power-domains = <&rpmhpd SA8775P_CX>;
1365 gpi_dma0: dma-controller@900000 {
1366 compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";
1368 #dma-cells = <3>;
1381 dma-channels = <12>;
1382 dma-channel-mask = <0xfff>;
1388 compatible = "qcom,geni-se-qup";
1390 #address-cells = <2>;
1391 #size-cells = <2>;
1393 clock-names = "m-ahb", "s-ahb";
1400 compatible = "qcom,geni-i2c";
1402 #address-cells = <1>;
1403 #size-cells = <0>;
1406 clock-names = "se";
1413 interconnect-names = "qup-core",
1414 "qup-config",
1415 "qup-memory";
1416 power-domains = <&rpmhpd SA8775P_CX>;
1419 dma-names = "tx",
1425 compatible = "qcom,geni-spi";
1427 #address-cells = <1>;
1428 #size-cells = <0>;
1431 clock-names = "se";
1438 interconnect-names = "qup-core",
1439 "qup-config",
1440 "qup-memory";
1441 power-domains = <&rpmhpd SA8775P_CX>;
1444 dma-names = "tx",
1450 compatible = "qcom,geni-uart";
1454 clock-names = "se";
1459 interconnect-names = "qup-core", "qup-config";
1460 power-domains = <&rpmhpd SA8775P_CX>;
1465 compatible = "qcom,geni-i2c";
1467 #address-cells = <1>;
1468 #size-cells = <0>;
1471 clock-names = "se";
1478 interconnect-names = "qup-core",
1479 "qup-config",
1480 "qup-memory";
1481 power-domains = <&rpmhpd SA8775P_CX>;
1484 dma-names = "tx",
1490 compatible = "qcom,geni-spi";
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1496 clock-names = "se";
1503 interconnect-names = "qup-core",
1504 "qup-config",
1505 "qup-memory";
1506 power-domains = <&rpmhpd SA8775P_CX>;
1509 dma-names = "tx",
1515 compatible = "qcom,geni-uart";
1519 clock-names = "se";
1524 interconnect-names = "qup-core", "qup-config";
1525 power-domains = <&rpmhpd SA8775P_CX>;
1530 compatible = "qcom,geni-i2c";
1532 #address-cells = <1>;
1533 #size-cells = <0>;
1536 clock-names = "se";
1543 interconnect-names = "qup-core",
1544 "qup-config",
1545 "qup-memory";
1546 power-domains = <&rpmhpd SA8775P_CX>;
1549 dma-names = "tx",
1555 compatible = "qcom,geni-spi";
1557 #address-cells = <1>;
1558 #size-cells = <0>;
1561 clock-names = "se";
1568 interconnect-names = "qup-core",
1569 "qup-config",
1570 "qup-memory";
1571 power-domains = <&rpmhpd SA8775P_CX>;
1574 dma-names = "tx",
1580 compatible = "qcom,geni-uart";
1584 clock-names = "se";
1589 interconnect-names = "qup-core", "qup-config";
1590 power-domains = <&rpmhpd SA8775P_CX>;
1595 compatible = "qcom,geni-i2c";
1597 #address-cells = <1>;
1598 #size-cells = <0>;
1601 clock-names = "se";
1608 interconnect-names = "qup-core",
1609 "qup-config",
1610 "qup-memory";
1611 power-domains = <&rpmhpd SA8775P_CX>;
1614 dma-names = "tx",
1620 compatible = "qcom,geni-spi";
1622 #address-cells = <1>;
1623 #size-cells = <0>;
1626 clock-names = "se";
1633 interconnect-names = "qup-core",
1634 "qup-config",
1635 "qup-memory";
1636 power-domains = <&rpmhpd SA8775P_CX>;
1639 dma-names = "tx",
1645 compatible = "qcom,geni-uart";
1649 clock-names = "se";
1654 interconnect-names = "qup-core", "qup-config";
1655 power-domains = <&rpmhpd SA8775P_CX>;
1660 compatible = "qcom,geni-i2c";
1662 #address-cells = <1>;
1663 #size-cells = <0>;
1666 clock-names = "se";
1673 interconnect-names = "qup-core",
1674 "qup-config",
1675 "qup-memory";
1676 power-domains = <&rpmhpd SA8775P_CX>;
1679 dma-names = "tx",
1685 compatible = "qcom,geni-spi";
1687 #address-cells = <1>;
1688 #size-cells = <0>;
1691 clock-names = "se";
1698 interconnect-names = "qup-core",
1699 "qup-config",
1700 "qup-memory";
1701 power-domains = <&rpmhpd SA8775P_CX>;
1704 dma-names = "tx",
1710 compatible = "qcom,geni-uart";
1714 clock-names = "se";
1719 interconnect-names = "qup-core", "qup-config";
1720 power-domains = <&rpmhpd SA8775P_CX>;
1725 compatible = "qcom,geni-i2c";
1727 #address-cells = <1>;
1728 #size-cells = <0>;
1731 clock-names = "se";
1738 interconnect-names = "qup-core",
1739 "qup-config",
1740 "qup-memory";
1741 power-domains = <&rpmhpd SA8775P_CX>;
1744 dma-names = "tx",
1750 compatible = "qcom,geni-spi";
1752 #address-cells = <1>;
1753 #size-cells = <0>;
1756 clock-names = "se";
1763 interconnect-names = "qup-core",
1764 "qup-config",
1765 "qup-memory";
1766 power-domains = <&rpmhpd SA8775P_CX>;
1769 dma-names = "tx",
1775 compatible = "qcom,geni-uart";
1779 clock-names = "se";
1784 interconnect-names = "qup-core", "qup-config";
1785 power-domains = <&rpmhpd SA8775P_CX>;
1790 gpi_dma1: dma-controller@a00000 {
1791 compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";
1793 #dma-cells = <3>;
1807 dma-channels = <12>;
1808 dma-channel-mask = <0xfff>;
1813 compatible = "qcom,geni-se-qup";
1815 #address-cells = <2>;
1816 #size-cells = <2>;
1818 clock-names = "m-ahb", "s-ahb";
1825 compatible = "qcom,geni-i2c";
1827 #address-cells = <1>;
1828 #size-cells = <0>;
1831 clock-names = "se";
1838 interconnect-names = "qup-core",
1839 "qup-config",
1840 "qup-memory";
1841 power-domains = <&rpmhpd SA8775P_CX>;
1844 dma-names = "tx",
1850 compatible = "qcom,geni-spi";
1852 #address-cells = <1>;
1853 #size-cells = <0>;
1856 clock-names = "se";
1863 interconnect-names = "qup-core",
1864 "qup-config",
1865 "qup-memory";
1866 power-domains = <&rpmhpd SA8775P_CX>;
1869 dma-names = "tx",
1875 compatible = "qcom,geni-uart";
1878 clock-names = "se";
1880 interconnect-names = "qup-core", "qup-config";
1885 power-domains = <&rpmhpd SA8775P_CX>;
1886 operating-points-v2 = <&qup_opp_table_100mhz>;
1891 compatible = "qcom,geni-i2c";
1893 #address-cells = <1>;
1894 #size-cells = <0>;
1897 clock-names = "se";
1904 interconnect-names = "qup-core",
1905 "qup-config",
1906 "qup-memory";
1907 power-domains = <&rpmhpd SA8775P_CX>;
1910 dma-names = "tx",
1916 compatible = "qcom,geni-spi";
1918 #address-cells = <1>;
1919 #size-cells = <0>;
1922 clock-names = "se";
1929 interconnect-names = "qup-core",
1930 "qup-config",
1931 "qup-memory";
1932 power-domains = <&rpmhpd SA8775P_CX>;
1935 dma-names = "tx",
1941 compatible = "qcom,geni-uart";
1944 clock-names = "se";
1946 interconnect-names = "qup-core", "qup-config";
1951 power-domains = <&rpmhpd SA8775P_CX>;
1952 operating-points-v2 = <&qup_opp_table_100mhz>;
1957 compatible = "qcom,geni-i2c";
1959 #address-cells = <1>;
1960 #size-cells = <0>;
1963 clock-names = "se";
1970 interconnect-names = "qup-core",
1971 "qup-config",
1972 "qup-memory";
1973 power-domains = <&rpmhpd SA8775P_CX>;
1976 dma-names = "tx",
1982 compatible = "qcom,geni-spi";
1984 #address-cells = <1>;
1985 #size-cells = <0>;
1988 clock-names = "se";
1995 interconnect-names = "qup-core",
1996 "qup-config",
1997 "qup-memory";
1998 power-domains = <&rpmhpd SA8775P_CX>;
2001 dma-names = "tx",
2007 compatible = "qcom,geni-uart";
2011 clock-names = "se";
2016 interconnect-names = "qup-core", "qup-config";
2017 power-domains = <&rpmhpd SA8775P_CX>;
2022 compatible = "qcom,geni-i2c";
2024 #address-cells = <1>;
2025 #size-cells = <0>;
2028 clock-names = "se";
2035 interconnect-names = "qup-core",
2036 "qup-config",
2037 "qup-memory";
2038 power-domains = <&rpmhpd SA8775P_CX>;
2041 dma-names = "tx",
2047 compatible = "qcom,geni-spi";
2049 #address-cells = <1>;
2050 #size-cells = <0>;
2053 clock-names = "se";
2060 interconnect-names = "qup-core",
2061 "qup-config",
2062 "qup-memory";
2063 power-domains = <&rpmhpd SA8775P_CX>;
2066 dma-names = "tx",
2072 compatible = "qcom,geni-uart";
2075 clock-names = "se";
2077 interconnect-names = "qup-core", "qup-config";
2082 power-domains = <&rpmhpd SA8775P_CX>;
2083 operating-points-v2 = <&qup_opp_table_100mhz>;
2088 compatible = "qcom,geni-i2c";
2090 #address-cells = <1>;
2091 #size-cells = <0>;
2094 clock-names = "se";
2101 interconnect-names = "qup-core",
2102 "qup-config",
2103 "qup-memory";
2104 power-domains = <&rpmhpd SA8775P_CX>;
2107 dma-names = "tx",
2113 compatible = "qcom,geni-spi";
2115 #address-cells = <1>;
2116 #size-cells = <0>;
2119 clock-names = "se";
2126 interconnect-names = "qup-core",
2127 "qup-config",
2128 "qup-memory";
2129 power-domains = <&rpmhpd SA8775P_CX>;
2132 dma-names = "tx",
2138 compatible = "qcom,geni-uart";
2141 clock-names = "se";
2143 interconnect-names = "qup-core", "qup-config";
2148 power-domains = <&rpmhpd SA8775P_CX>;
2149 operating-points-v2 = <&qup_opp_table_100mhz>;
2154 compatible = "qcom,geni-i2c";
2156 #address-cells = <1>;
2157 #size-cells = <0>;
2160 clock-names = "se";
2167 interconnect-names = "qup-core",
2168 "qup-config",
2169 "qup-memory";
2170 power-domains = <&rpmhpd SA8775P_CX>;
2173 dma-names = "tx",
2179 compatible = "qcom,geni-spi";
2181 #address-cells = <1>;
2182 #size-cells = <0>;
2185 clock-names = "se";
2192 interconnect-names = "qup-core",
2193 "qup-config",
2194 "qup-memory";
2195 power-domains = <&rpmhpd SA8775P_CX>;
2198 dma-names = "tx",
2204 compatible = "qcom,geni-uart";
2208 clock-names = "se";
2213 interconnect-names = "qup-core", "qup-config";
2214 power-domains = <&rpmhpd SA8775P_CX>;
2219 compatible = "qcom,geni-i2c";
2221 #address-cells = <1>;
2222 #size-cells = <0>;
2225 clock-names = "se";
2232 interconnect-names = "qup-core",
2233 "qup-config",
2234 "qup-memory";
2235 power-domains = <&rpmhpd SA8775P_CX>;
2238 dma-names = "tx",
2245 gpi_dma3: dma-controller@b00000 {
2246 compatible = "qcom,sa8775p-gpi-dma", "qcom,sm6350-gpi-dma";
2248 #dma-cells = <3>;
2254 dma-channels = <4>;
2255 dma-channel-mask = <0xf>;
2260 compatible = "qcom,geni-se-qup";
2262 #address-cells = <2>;
2263 #size-cells = <2>;
2265 clock-names = "m-ahb", "s-ahb";
2272 compatible = "qcom,geni-i2c";
2274 #address-cells = <1>;
2275 #size-cells = <0>;
2278 clock-names = "se";
2285 interconnect-names = "qup-core",
2286 "qup-config",
2287 "qup-memory";
2288 power-domains = <&rpmhpd SA8775P_CX>;
2291 dma-names = "tx",
2297 compatible = "qcom,geni-spi";
2299 #address-cells = <1>;
2300 #size-cells = <0>;
2303 clock-names = "se";
2310 interconnect-names = "qup-core",
2311 "qup-config",
2312 "qup-memory";
2313 power-domains = <&rpmhpd SA8775P_CX>;
2316 dma-names = "tx",
2322 compatible = "qcom,geni-uart";
2325 clock-names = "se";
2327 interconnect-names = "qup-core", "qup-config";
2332 power-domains = <&rpmhpd SA8775P_CX>;
2333 operating-points-v2 = <&qup_opp_table_100mhz>;
2339 compatible = "qcom,sa8775p-trng", "qcom,trng";
2344 compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
2348 phy-names = "ufsphy";
2349 lanes-per-direction = <2>;
2350 #reset-cells = <1>;
2352 reset-names = "rst";
2353 power-domains = <&gcc UFS_PHY_GDSC>;
2354 required-opps = <&rpmhpd_opp_nom>;
2356 dma-coherent;
2365 clock-names = "core_clk",
2373 freq-table-hz = <75000000 300000000>,
2386 compatible = "qcom,sa8775p-qmp-ufs-phy";
2395 clock-names = "ref", "ref_aux", "qref";
2396 power-domains = <&gcc UFS_PHY_GDSC>;
2398 reset-names = "ufsphy";
2399 #phy-cells = <0>;
2404 compatible = "qcom,sa8775p-inline-crypto-engine",
2405 "qcom,inline-crypto-engine";
2410 cryptobam: dma-controller@1dc4000 {
2411 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
2414 #dma-cells = <1>;
2416 qcom,controlled-remotely;
2422 compatible = "qcom,sa8775p-qce", "qcom,qce";
2425 dma-names = "rx", "tx";
2429 interconnect-names = "memory";
2433 compatible = "arm,coresight-stm", "arm,primecell";
2436 reg-names = "stm-base", "stm-stimulus-base";
2439 clock-names = "apb_pclk";
2441 out-ports {
2444 remote-endpoint =
2452 compatible = "qcom,coresight-tpdm", "arm,primecell";
2456 clock-names = "apb_pclk";
2458 qcom,cmb-element-bits = <32>;
2459 qcom,cmb-msrs-num = <32>;
2462 out-ports {
2465 remote-endpoint =
2473 compatible = "qcom,coresight-tpda", "arm,primecell";
2477 clock-names = "apb_pclk";
2479 out-ports {
2482 remote-endpoint =
2488 in-ports {
2489 #address-cells = <1>;
2490 #size-cells = <0>;
2495 remote-endpoint =
2503 remote-endpoint =
2511 compatible = "qcom,coresight-tpdm", "arm,primecell";
2515 clock-names = "apb_pclk";
2517 qcom,cmb-element-bits = <32>;
2518 qcom,cmb-msrs-num = <32>;
2520 out-ports {
2523 remote-endpoint =
2531 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2535 clock-names = "apb_pclk";
2537 out-ports {
2540 remote-endpoint =
2546 in-ports {
2547 #address-cells = <1>;
2548 #size-cells = <0>;
2553 remote-endpoint =
2561 remote-endpoint =
2569 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2573 clock-names = "apb_pclk";
2575 out-ports {
2578 remote-endpoint =
2584 in-ports {
2585 #address-cells = <1>;
2586 #size-cells = <0>;
2591 remote-endpoint =
2599 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2603 clock-names = "apb_pclk";
2605 out-ports {
2608 remote-endpoint =
2614 in-ports {
2615 #address-cells = <1>;
2616 #size-cells = <0>;
2621 remote-endpoint =
2629 remote-endpoint =
2637 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
2641 clock-names = "apb_pclk";
2643 out-ports {
2646 remote-endpoint =
2652 in-ports {
2653 #address-cells = <1>;
2654 #size-cells = <0>;
2659 remote-endpoint =
2667 remote-endpoint =
2675 compatible = "arm,coresight-tmc", "arm,primecell";
2679 clock-names = "apb_pclk";
2681 out-ports {
2684 remote-endpoint =
2690 in-ports {
2693 remote-endpoint =
2701 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
2705 clock-names = "apb_pclk";
2707 out-ports {
2708 #address-cells = <1>;
2709 #size-cells = <0>;
2714 remote-endpoint =
2720 in-ports {
2723 remote-endpoint =
2731 compatible = "qcom,coresight-tpda", "arm,primecell";
2735 clock-names = "apb_pclk";
2737 out-ports {
2740 remote-endpoint =
2746 in-ports {
2747 #address-cells = <1>;
2748 #size-cells = <0>;
2753 remote-endpoint =
2761 remote-endpoint =
2769 remote-endpoint =
2777 remote-endpoint =
2785 remote-endpoint =
2793 compatible = "qcom,coresight-tpdm", "arm,primecell";
2797 clock-names = "apb_pclk";
2799 qcom,cmb-element-bits = <64>;
2800 qcom,cmb-msrs-num = <32>;
2802 out-ports {
2805 remote-endpoint =
2813 compatible = "qcom,coresight-tpdm", "arm,primecell";
2817 clock-names = "apb_pclk";
2819 qcom,cmb-element-bits = <64>;
2820 qcom,cmb-msrs-num = <32>;
2822 out-ports {
2825 remote-endpoint =
2833 compatible = "qcom,coresight-tpdm", "arm,primecell";
2837 clock-names = "apb_pclk";
2839 qcom,cmb-element-bits = <64>;
2840 qcom,cmb-msrs-num = <32>;
2842 out-ports {
2845 remote-endpoint =
2853 compatible = "qcom,coresight-tpdm", "arm,primecell";
2857 clock-names = "apb_pclk";
2859 qcom,cmb-element-bits = <64>;
2860 qcom,cmb-msrs-num = <32>;
2862 out-ports {
2865 remote-endpoint =
2873 compatible = "qcom,coresight-tpdm", "arm,primecell";
2877 clock-names = "apb_pclk";
2879 qcom,dsb-element-bits = <32>;
2880 qcom,dsb-msrs-num = <32>;
2882 out-ports {
2885 remote-endpoint =
2893 compatible = "arm,coresight-cti", "arm,primecell";
2897 clock-names = "apb_pclk";
2906 clock-names = "apb_pclk";
2907 arm,coresight-loses-context-with-cpu;
2908 qcom,skip-power-up;
2910 out-ports {
2913 remote-endpoint =
2926 clock-names = "apb_pclk";
2927 arm,coresight-loses-context-with-cpu;
2928 qcom,skip-power-up;
2930 out-ports {
2933 remote-endpoint =
2946 clock-names = "apb_pclk";
2947 arm,coresight-loses-context-with-cpu;
2948 qcom,skip-power-up;
2950 out-ports {
2953 remote-endpoint =
2966 clock-names = "apb_pclk";
2967 arm,coresight-loses-context-with-cpu;
2968 qcom,skip-power-up;
2970 out-ports {
2973 remote-endpoint =
2986 clock-names = "apb_pclk";
2987 arm,coresight-loses-context-with-cpu;
2988 qcom,skip-power-up;
2990 out-ports {
2993 remote-endpoint =
3006 clock-names = "apb_pclk";
3007 arm,coresight-loses-context-with-cpu;
3008 qcom,skip-power-up;
3010 out-ports {
3013 remote-endpoint =
3026 clock-names = "apb_pclk";
3027 arm,coresight-loses-context-with-cpu;
3028 qcom,skip-power-up;
3030 out-ports {
3033 remote-endpoint =
3046 clock-names = "apb_pclk";
3047 arm,coresight-loses-context-with-cpu;
3048 qcom,skip-power-up;
3050 out-ports {
3053 remote-endpoint =
3061 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
3065 clock-names = "apb_pclk";
3067 out-ports {
3070 remote-endpoint =
3076 in-ports {
3077 #address-cells = <1>;
3078 #size-cells = <0>;
3083 remote-endpoint =
3091 remote-endpoint =
3099 remote-endpoint =
3107 remote-endpoint =
3115 remote-endpoint =
3123 remote-endpoint =
3131 remote-endpoint =
3139 remote-endpoint =
3147 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
3151 clock-names = "apb_pclk";
3153 out-ports {
3156 remote-endpoint =
3162 in-ports {
3163 #address-cells = <1>;
3164 #size-cells = <0>;
3169 remote-endpoint =
3177 remote-endpoint =
3185 compatible = "qcom,coresight-tpdm", "arm,primecell";
3189 clock-names = "apb_pclk";
3191 qcom,cmb-element-bits = <64>;
3192 qcom,cmb-msrs-num = <32>;
3194 out-ports {
3197 remote-endpoint =
3205 compatible = "qcom,coresight-tpdm", "arm,primecell";
3209 clock-names = "apb_pclk";
3211 qcom,dsb-element-bits = <32>;
3212 qcom,dsb-msrs-num = <32>;
3214 out-ports {
3217 remote-endpoint =
3225 compatible = "qcom,coresight-tpda", "arm,primecell";
3229 clock-names = "apb_pclk";
3231 out-ports {
3234 remote-endpoint =
3240 in-ports {
3241 #address-cells = <1>;
3242 #size-cells = <0>;
3247 remote-endpoint =
3255 remote-endpoint =
3263 remote-endpoint =
3271 remote-endpoint =
3279 remote-endpoint =
3287 compatible = "qcom,coresight-tpdm", "arm,primecell";
3291 clock-names = "apb_pclk";
3293 qcom,cmb-element-bits = <32>;
3294 qcom,cmb-msrs-num = <32>;
3296 out-ports {
3299 remote-endpoint =
3307 compatible = "qcom,coresight-tpdm", "arm,primecell";
3311 clock-names = "apb_pclk";
3313 qcom,cmb-element-bits = <32>;
3314 qcom,cmb-msrs-num = <32>;
3316 out-ports {
3319 remote-endpoint =
3327 compatible = "qcom,coresight-tpdm", "arm,primecell";
3331 clock-names = "apb_pclk";
3333 qcom,dsb-element-bits = <32>;
3334 qcom,dsb-msrs-num = <32>;
3336 out-ports {
3339 remote-endpoint =
3347 compatible = "qcom,sa8775p-usb-hs-phy",
3348 "qcom,usb-snps-hs-5nm-phy";
3351 clock-names = "ref";
3354 #phy-cells = <0>;
3360 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
3367 clock-names = "aux", "ref", "com_aux", "pipe";
3371 reset-names = "phy", "phy_phy";
3373 power-domains = <&gcc USB30_PRIM_GDSC>;
3375 #clock-cells = <0>;
3376 clock-output-names = "usb3_prim_phy_pipe_clk_src";
3378 #phy-cells = <0>;
3384 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3386 #address-cells = <2>;
3387 #size-cells = <2>;
3395 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3397 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
3399 assigned-clock-rates = <19200000>, <200000000>;
3401 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
3406 interrupt-names = "pwr_event",
3412 power-domains = <&gcc USB30_PRIM_GDSC>;
3413 required-opps = <&rpmhpd_opp_nom>;
3419 interconnect-names = "usb-ddr", "apps-usb";
3421 wakeup-source;
3431 phy-names = "usb2-phy", "usb3-phy";
3432 snps,dis-u1-entry-quirk;
3433 snps,dis-u2-entry-quirk;
3438 compatible = "qcom,sa8775p-usb-hs-phy",
3439 "qcom,usb-snps-hs-5nm-phy";
3442 clock-names = "ref";
3445 #phy-cells = <0>;
3451 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
3458 clock-names = "aux", "ref", "com_aux", "pipe";
3462 reset-names = "phy", "phy_phy";
3464 power-domains = <&gcc USB30_SEC_GDSC>;
3466 #clock-cells = <0>;
3467 clock-output-names = "usb3_sec_phy_pipe_clk_src";
3469 #phy-cells = <0>;
3475 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3477 #address-cells = <2>;
3478 #size-cells = <2>;
3486 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3488 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
3490 assigned-clock-rates = <19200000>, <200000000>;
3492 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
3497 interrupt-names = "pwr_event",
3503 power-domains = <&gcc USB30_SEC_GDSC>;
3504 required-opps = <&rpmhpd_opp_nom>;
3510 interconnect-names = "usb-ddr", "apps-usb";
3512 wakeup-source;
3522 phy-names = "usb2-phy", "usb3-phy";
3523 snps,dis-u1-entry-quirk;
3524 snps,dis-u2-entry-quirk;
3529 compatible = "qcom,sa8775p-usb-hs-phy",
3530 "qcom,usb-snps-hs-5nm-phy";
3533 clock-names = "ref";
3536 #phy-cells = <0>;
3542 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
3544 #address-cells = <2>;
3545 #size-cells = <2>;
3553 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
3555 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
3557 assigned-clock-rates = <19200000>, <200000000>;
3559 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
3563 interrupt-names = "pwr_event",
3568 power-domains = <&gcc USB20_PRIM_GDSC>;
3569 required-opps = <&rpmhpd_opp_nom>;
3575 interconnect-names = "usb-ddr", "apps-usb";
3577 wakeup-source;
3587 phy-names = "usb2-phy";
3588 snps,dis-u1-entry-quirk;
3589 snps,dis-u2-entry-quirk;
3594 compatible = "qcom,tcsr-mutex";
3596 #hwlock-cells = <1>;
3600 compatible = "qcom,sa8775p-tcsr", "syscon";
3604 gpucc: clock-controller@3d90000 {
3605 compatible = "qcom,sa8775p-gpucc";
3610 clock-names = "bi_tcxo",
3613 #clock-cells = <1>;
3614 #reset-cells = <1>;
3615 #power-domain-cells = <1>;
3619 compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
3620 "qcom,smmu-500", "arm,mmu-500";
3622 #iommu-cells = <2>;
3623 #global-interrupts = <2>;
3624 dma-coherent;
3625 power-domains = <&gpucc GPU_CC_CX_GDSC>;
3633 clock-names = "gcc_gpu_memnoc_gfx_clk",
3655 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3658 clock-names = "sgmi_ref";
3659 #phy-cells = <0>;
3664 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
3667 clock-names = "sgmi_ref";
3668 #phy-cells = <0>;
3673 compatible = "qcom,sa8775p-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
3679 operating-points-v2 = <&llcc_bwmon_opp_table>;
3681 llcc_bwmon_opp_table: opp-table {
3682 compatible = "operating-points-v2";
3684 opp-0 {
3685 opp-peak-kBps = <762000>;
3688 opp-1 {
3689 opp-peak-kBps = <1720000>;
3692 opp-2 {
3693 opp-peak-kBps = <2086000>;
3696 opp-3 {
3697 opp-peak-kBps = <2601000>;
3700 opp-4 {
3701 opp-peak-kBps = <2929000>;
3704 opp-5 {
3705 opp-peak-kBps = <5931000>;
3708 opp-6 {
3709 opp-peak-kBps = <6515000>;
3712 opp-7 {
3713 opp-peak-kBps = <7984000>;
3716 opp-8 {
3717 opp-peak-kBps = <10437000>;
3720 opp-9 {
3721 opp-peak-kBps = <12195000>;
3727 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3733 operating-points-v2 = <&cpu_bwmon_opp_table>;
3735 cpu_bwmon_opp_table: opp-table {
3736 compatible = "operating-points-v2";
3738 opp-0 {
3739 opp-peak-kBps = <9155000>;
3742 opp-1 {
3743 opp-peak-kBps = <12298000>;
3746 opp-2 {
3747 opp-peak-kBps = <14236000>;
3750 opp-3 {
3751 opp-peak-kBps = <16265000>;
3758 compatible = "qcom,sa8775p-cpu-bwmon", "qcom,sdm845-bwmon";
3764 operating-points-v2 = <&cpu_bwmon_opp_table>;
3767 llcc: system-cache-controller@9200000 {
3768 compatible = "qcom,sa8775p-llcc";
3776 reg-names = "llcc0_base",
3786 videocc: clock-controller@abf0000 {
3787 compatible = "qcom,sa8775p-videocc";
3793 power-domains = <&rpmhpd SA8775P_MMCX>;
3794 #clock-cells = <1>;
3795 #reset-cells = <1>;
3796 #power-domain-cells = <1>;
3799 camcc: clock-controller@ade0000 {
3800 compatible = "qcom,sa8775p-camcc";
3806 power-domains = <&rpmhpd SA8775P_MMCX>;
3807 #clock-cells = <1>;
3808 #reset-cells = <1>;
3809 #power-domain-cells = <1>;
3812 mdss0: display-subsystem@ae00000 {
3813 compatible = "qcom,sa8775p-mdss";
3815 reg-names = "mdss";
3824 interconnect-names = "mdp0-mem",
3825 "mdp1-mem",
3826 "cpu-cfg";
3830 power-domains = <&dispcc0 MDSS_DISP_CC_MDSS_CORE_GDSC>;
3837 interrupt-controller;
3838 #interrupt-cells = <1>;
3842 #address-cells = <2>;
3843 #size-cells = <2>;
3848 mdss0_mdp: display-controller@ae01000 {
3849 compatible = "qcom,sa8775p-dpu";
3852 reg-names = "mdp", "vbif";
3859 clock-names = "bus",
3865 assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>;
3866 assigned-clock-rates = <19200000>;
3868 operating-points-v2 = <&mdss0_mdp_opp_table>;
3869 power-domains = <&rpmhpd SA8775P_MMCX>;
3871 interrupt-parent = <&mdss0>;
3875 #address-cells = <1>;
3876 #size-cells = <0>;
3882 remote-endpoint = <&mdss0_dp0_in>;
3890 remote-endpoint = <&mdss0_dp1_in>;
3895 mdss0_mdp_opp_table: opp-table {
3896 compatible = "operating-points-v2";
3898 opp-375000000 {
3899 opp-hz = /bits/ 64 <375000000>;
3900 required-opps = <&rpmhpd_opp_svs_l1>;
3903 opp-500000000 {
3904 opp-hz = /bits/ 64 <500000000>;
3905 required-opps = <&rpmhpd_opp_nom>;
3908 opp-575000000 {
3909 opp-hz = /bits/ 64 <575000000>;
3910 required-opps = <&rpmhpd_opp_turbo>;
3913 opp-650000000 {
3914 opp-hz = /bits/ 64 <650000000>;
3915 required-opps = <&rpmhpd_opp_turbo_l1>;
3921 compatible = "qcom,sa8775p-edp-phy";
3930 clock-names = "aux",
3933 #clock-cells = <1>;
3934 #phy-cells = <0>;
3940 compatible = "qcom,sa8775p-edp-phy";
3949 clock-names = "aux",
3952 #clock-cells = <1>;
3953 #phy-cells = <0>;
3958 mdss0_dp0: displayport-controller@af54000 {
3959 compatible = "qcom,sa8775p-dp";
3967 interrupt-parent = <&mdss0>;
3975 clock-names = "core_iface",
3980 assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
3982 assigned-clock-parents = <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy 1>;
3984 phy-names = "dp";
3986 operating-points-v2 = <&dp_opp_table>;
3987 power-domains = <&rpmhpd SA8775P_MMCX>;
3989 #sound-dai-cells = <0>;
3994 #address-cells = <1>;
3995 #size-cells = <0>;
4001 remote-endpoint = <&dpu_intf0_out>;
4012 dp_opp_table: opp-table {
4013 compatible = "operating-points-v2";
4015 opp-160000000 {
4016 opp-hz = /bits/ 64 <160000000>;
4017 required-opps = <&rpmhpd_opp_low_svs>;
4020 opp-270000000 {
4021 opp-hz = /bits/ 64 <270000000>;
4022 required-opps = <&rpmhpd_opp_svs>;
4025 opp-540000000 {
4026 opp-hz = /bits/ 64 <540000000>;
4027 required-opps = <&rpmhpd_opp_svs_l1>;
4030 opp-810000000 {
4031 opp-hz = /bits/ 64 <810000000>;
4032 required-opps = <&rpmhpd_opp_nom>;
4037 mdss0_dp1: displayport-controller@af5c000 {
4038 compatible = "qcom,sa8775p-dp";
4046 interrupt-parent = <&mdss0>;
4054 clock-names = "core_iface",
4059 assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
4061 assigned-clock-parents = <&mdss0_dp1_phy 0>, <&mdss0_dp1_phy 1>;
4063 phy-names = "dp";
4065 operating-points-v2 = <&dp1_opp_table>;
4066 power-domains = <&rpmhpd SA8775P_MMCX>;
4068 #sound-dai-cells = <0>;
4073 #address-cells = <1>;
4074 #size-cells = <0>;
4080 remote-endpoint = <&dpu_intf4_out>;
4091 dp1_opp_table: opp-table {
4092 compatible = "operating-points-v2";
4094 opp-160000000 {
4095 opp-hz = /bits/ 64 <160000000>;
4096 required-opps = <&rpmhpd_opp_low_svs>;
4099 opp-270000000 {
4100 opp-hz = /bits/ 64 <270000000>;
4101 required-opps = <&rpmhpd_opp_svs>;
4104 opp-540000000 {
4105 opp-hz = /bits/ 64 <540000000>;
4106 required-opps = <&rpmhpd_opp_svs_l1>;
4109 opp-810000000 {
4110 opp-hz = /bits/ 64 <810000000>;
4111 required-opps = <&rpmhpd_opp_nom>;
4117 dispcc0: clock-controller@af00000 {
4118 compatible = "qcom,sa8775p-dispcc0";
4127 power-domains = <&rpmhpd SA8775P_MMCX>;
4128 #clock-cells = <1>;
4129 #reset-cells = <1>;
4130 #power-domain-cells = <1>;
4133 pdc: interrupt-controller@b220000 {
4134 compatible = "qcom,sa8775p-pdc", "qcom,pdc";
4137 qcom,pdc-ranges = <0 480 40>,
4175 #interrupt-cells = <2>;
4176 interrupt-parent = <&intc>;
4177 interrupt-controller;
4180 tsens2: thermal-sensor@c251000 {
4181 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
4187 interrupt-names = "uplow", "critical";
4188 #thermal-sensor-cells = <1>;
4191 tsens3: thermal-sensor@c252000 {
4192 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
4198 interrupt-names = "uplow", "critical";
4199 #thermal-sensor-cells = <1>;
4202 tsens0: thermal-sensor@c263000 {
4203 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
4209 interrupt-names = "uplow", "critical";
4210 #thermal-sensor-cells = <1>;
4213 tsens1: thermal-sensor@c265000 {
4214 compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
4220 interrupt-names = "uplow", "critical";
4221 #thermal-sensor-cells = <1>;
4224 aoss_qmp: power-management@c300000 {
4225 compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
4227 interrupts-extended = <&ipcc IPCC_CLIENT_AOP
4231 #clock-cells = <0>;
4235 compatible = "qcom,rpmh-stats";
4240 compatible = "qcom,spmi-pmic-arb";
4246 reg-names = "core",
4253 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
4254 interrupt-names = "periph_irq";
4255 interrupt-controller;
4256 #interrupt-cells = <4>;
4257 #address-cells = <2>;
4258 #size-cells = <0>;
4262 compatible = "qcom,sa8775p-tlmm";
4265 gpio-controller;
4266 #gpio-cells = <2>;
4267 interrupt-controller;
4268 #interrupt-cells = <2>;
4269 gpio-ranges = <&tlmm 0 0 149>;
4270 wakeup-parent = <&pdc>;
4274 compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd";
4278 #address-cells = <1>;
4279 #size-cells = <1>;
4281 pil-reloc@94c {
4282 compatible = "qcom,pil-reloc-info";
4288 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
4290 #iommu-cells = <2>;
4291 #global-interrupts = <2>;
4292 dma-coherent;
4427 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
4429 #iommu-cells = <2>;
4430 #global-interrupts = <2>;
4431 dma-coherent;
4501 intc: interrupt-controller@17a00000 {
4502 compatible = "arm,gic-v3";
4505 interrupt-controller;
4506 #interrupt-cells = <3>;
4508 #redistributor-regions = <1>;
4509 redistributor-stride = <0x0 0x20000>;
4513 compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
4520 compatible = "arm,armv7-timer-mem";
4523 #address-cells = <1>;
4524 #size-cells = <1>;
4531 frame-number = <0>;
4537 frame-number = <1>;
4544 frame-number = <2>;
4551 frame-number = <3>;
4558 frame-number = <4>;
4565 frame-number = <5>;
4572 frame-number = <6>;
4578 compatible = "qcom,rpmh-rsc";
4582 reg-names = "drv-0", "drv-1", "drv-2";
4586 qcom,tcs-offset = <0xd00>;
4587 qcom,drv-id = <2>;
4588 qcom,tcs-config = <ACTIVE_TCS 2>,
4594 apps_bcm_voter: bcm-voter {
4595 compatible = "qcom,bcm-voter";
4598 rpmhcc: clock-controller {
4599 compatible = "qcom,sa8775p-rpmh-clk";
4600 #clock-cells = <1>;
4601 clock-names = "xo";
4605 rpmhpd: power-controller {
4606 compatible = "qcom,sa8775p-rpmhpd";
4607 #power-domain-cells = <1>;
4608 operating-points-v2 = <&rpmhpd_opp_table>;
4610 rpmhpd_opp_table: opp-table {
4611 compatible = "operating-points-v2";
4613 rpmhpd_opp_ret: opp-0 {
4614 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
4617 rpmhpd_opp_min_svs: opp-1 {
4618 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
4622 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
4626 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
4629 rpmhpd_opp_svs_l1: opp-4 {
4630 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
4633 rpmhpd_opp_nom: opp-5 {
4634 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
4637 rpmhpd_opp_nom_l1: opp-6 {
4638 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
4641 rpmhpd_opp_nom_l2: opp-7 {
4642 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
4645 rpmhpd_opp_turbo: opp-8 {
4646 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
4649 rpmhpd_opp_turbo_l1: opp-9 {
4650 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
4657 compatible = "qcom,sa8775p-cpufreq-epss",
4658 "qcom,cpufreq-epss";
4661 reg-names = "freq-domain0", "freq-domain1";
4664 clock-names = "xo", "alternate";
4666 #freq-domain-cells = <1>;
4670 compatible = "qcom,sa8775p-gpdsp0-pas";
4673 interrupts-extended = <&intc GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
4678 interrupt-names = "wdog", "fatal", "ready",
4679 "handover", "stop-ack";
4682 clock-names = "xo";
4684 power-domains = <&rpmhpd RPMHPD_CX>,
4686 power-domain-names = "cx", "mxc";
4691 memory-region = <&pil_gdsp0_mem>;
4695 qcom,smem-states = <&smp2p_gpdsp0_out 0>;
4696 qcom,smem-state-names = "stop";
4700 glink-edge {
4701 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP0
4708 qcom,remote-pid = <17>;
4713 compatible = "qcom,sa8775p-gpdsp1-pas";
4716 interrupts-extended = <&intc GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
4721 interrupt-names = "wdog", "fatal", "ready",
4722 "handover", "stop-ack";
4725 clock-names = "xo";
4727 power-domains = <&rpmhpd RPMHPD_CX>,
4729 power-domain-names = "cx", "mxc";
4734 memory-region = <&pil_gdsp1_mem>;
4738 qcom,smem-states = <&smp2p_gpdsp1_out 0>;
4739 qcom,smem-state-names = "stop";
4743 glink-edge {
4744 interrupts-extended = <&ipcc IPCC_CLIENT_GPDSP1
4751 qcom,remote-pid = <18>;
4755 dispcc1: clock-controller@22100000 {
4756 compatible = "qcom,sa8775p-dispcc1";
4764 power-domains = <&rpmhpd SA8775P_MMCX>;
4765 #clock-cells = <1>;
4766 #reset-cells = <1>;
4767 #power-domain-cells = <1>;
4772 compatible = "qcom,sa8775p-ethqos";
4775 reg-names = "stmmaceth", "rgmii";
4779 interrupt-names = "macirq", "sfty";
4785 clock-names = "stmmaceth",
4794 interconnect-names = "mac-mem", "cpu-mac";
4796 power-domains = <&gcc EMAC1_GDSC>;
4799 phy-names = "serdes";
4802 dma-coherent;
4806 rx-fifo-depth = <16384>;
4807 tx-fifo-depth = <16384>;
4813 compatible = "qcom,sa8775p-ethqos";
4816 reg-names = "stmmaceth", "rgmii";
4820 interrupt-names = "macirq", "sfty";
4826 clock-names = "stmmaceth",
4835 interconnect-names = "mac-mem", "cpu-mac";
4837 power-domains = <&gcc EMAC0_GDSC>;
4840 phy-names = "serdes";
4843 dma-coherent;
4847 rx-fifo-depth = <16384>;
4848 tx-fifo-depth = <16384>;
4854 compatible = "qcom,sa8775p-cdsp0-pas";
4857 interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
4862 interrupt-names = "wdog", "fatal", "ready",
4863 "handover", "stop-ack";
4866 clock-names = "xo";
4868 power-domains = <&rpmhpd RPMHPD_CX>,
4871 power-domain-names = "cx", "mxc", "nsp";
4876 memory-region = <&pil_cdsp0_mem>;
4880 qcom,smem-states = <&smp2p_cdsp0_out 0>;
4881 qcom,smem-state-names = "stop";
4885 glink-edge {
4886 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
4893 qcom,remote-pid = <5>;
4897 qcom,glink-channels = "fastrpcglink-apps-dsp";
4899 #address-cells = <1>;
4900 #size-cells = <0>;
4902 compute-cb@1 {
4903 compatible = "qcom,fastrpc-compute-cb";
4915 dma-coherent;
4918 compute-cb@2 {
4919 compatible = "qcom,fastrpc-compute-cb";
4931 dma-coherent;
4934 compute-cb@3 {
4935 compatible = "qcom,fastrpc-compute-cb";
4947 dma-coherent;
4950 compute-cb@4 {
4951 compatible = "qcom,fastrpc-compute-cb";
4963 dma-coherent;
4966 compute-cb@5 {
4967 compatible = "qcom,fastrpc-compute-cb";
4979 dma-coherent;
4982 compute-cb@6 {
4983 compatible = "qcom,fastrpc-compute-cb";
4995 dma-coherent;
4998 compute-cb@7 {
4999 compatible = "qcom,fastrpc-compute-cb";
5011 dma-coherent;
5014 compute-cb@8 {
5015 compatible = "qcom,fastrpc-compute-cb";
5027 dma-coherent;
5030 compute-cb@9 {
5031 compatible = "qcom,fastrpc-compute-cb";
5043 dma-coherent;
5046 compute-cb@10 {
5047 compatible = "qcom,fastrpc-compute-cb";
5059 dma-coherent;
5062 compute-cb@11 {
5063 compatible = "qcom,fastrpc-compute-cb";
5075 dma-coherent;
5082 compatible = "qcom,sa8775p-cdsp1-pas";
5085 interrupts-extended = <&intc GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
5090 interrupt-names = "wdog", "fatal", "ready",
5091 "handover", "stop-ack";
5094 clock-names = "xo";
5096 power-domains = <&rpmhpd RPMHPD_CX>,
5099 power-domain-names = "cx", "mxc", "nsp";
5104 memory-region = <&pil_cdsp1_mem>;
5108 qcom,smem-states = <&smp2p_cdsp1_out 0>;
5109 qcom,smem-state-names = "stop";
5113 glink-edge {
5114 interrupts-extended = <&ipcc IPCC_CLIENT_NSP1
5121 qcom,remote-pid = <12>;
5125 qcom,glink-channels = "fastrpcglink-apps-dsp";
5127 #address-cells = <1>;
5128 #size-cells = <0>;
5130 compute-cb@1 {
5131 compatible = "qcom,fastrpc-compute-cb";
5143 dma-coherent;
5146 compute-cb@2 {
5147 compatible = "qcom,fastrpc-compute-cb";
5159 dma-coherent;
5162 compute-cb@3 {
5163 compatible = "qcom,fastrpc-compute-cb";
5175 dma-coherent;
5178 compute-cb@4 {
5179 compatible = "qcom,fastrpc-compute-cb";
5191 dma-coherent;
5194 compute-cb@5 {
5195 compatible = "qcom,fastrpc-compute-cb";
5207 dma-coherent;
5210 compute-cb@6 {
5211 compatible = "qcom,fastrpc-compute-cb";
5223 dma-coherent;
5226 compute-cb@7 {
5227 compatible = "qcom,fastrpc-compute-cb";
5239 dma-coherent;
5242 compute-cb@8 {
5243 compatible = "qcom,fastrpc-compute-cb";
5255 dma-coherent;
5258 compute-cb@9 {
5259 compatible = "qcom,fastrpc-compute-cb";
5271 dma-coherent;
5274 compute-cb@10 {
5275 compatible = "qcom,fastrpc-compute-cb";
5287 dma-coherent;
5290 compute-cb@11 {
5291 compatible = "qcom,fastrpc-compute-cb";
5303 dma-coherent;
5306 compute-cb@12 {
5307 compatible = "qcom,fastrpc-compute-cb";
5319 dma-coherent;
5322 compute-cb@13 {
5323 compatible = "qcom,fastrpc-compute-cb";
5335 dma-coherent;
5342 compatible = "qcom,sa8775p-adsp-pas";
5345 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
5350 interrupt-names = "wdog", "fatal", "ready", "handover",
5351 "stop-ack";
5354 clock-names = "xo";
5356 power-domains = <&rpmhpd RPMHPD_LCX>,
5358 power-domain-names = "lcx", "lmx";
5362 memory-region = <&pil_adsp_mem>;
5366 qcom,smem-states = <&smp2p_adsp_out 0>;
5367 qcom,smem-state-names = "stop";
5371 remoteproc_adsp_glink: glink-edge {
5372 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
5379 qcom,remote-pid = <2>;
5383 qcom,glink-channels = "fastrpcglink-apps-dsp";
5385 memory-region = <&adsp_rpc_remote_heap_mem>;
5388 #address-cells = <1>;
5389 #size-cells = <0>;
5391 compute-cb@3 {
5392 compatible = "qcom,fastrpc-compute-cb";
5395 dma-coherent;
5398 compute-cb@4 {
5399 compatible = "qcom,fastrpc-compute-cb";
5402 dma-coherent;
5405 compute-cb@5 {
5406 compatible = "qcom,fastrpc-compute-cb";
5410 dma-coherent;
5417 thermal-zones {
5418 aoss-0-thermal {
5419 thermal-sensors = <&tsens0 0>;
5422 trip-point0 {
5428 trip-point1 {
5436 cpu-0-0-0-thermal {
5437 polling-delay-passive = <10>;
5439 thermal-sensors = <&tsens0 1>;
5442 trip-point0 {
5448 trip-point1 {
5456 cpu-0-1-0-thermal {
5457 polling-delay-passive = <10>;
5459 thermal-sensors = <&tsens0 2>;
5462 trip-point0 {
5468 trip-point1 {
5476 cpu-0-2-0-thermal {
5477 polling-delay-passive = <10>;
5479 thermal-sensors = <&tsens0 3>;
5482 trip-point0 {
5488 trip-point1 {
5496 cpu-0-3-0-thermal {
5497 polling-delay-passive = <10>;
5499 thermal-sensors = <&tsens0 4>;
5502 trip-point0 {
5508 trip-point1 {
5516 gpuss-0-thermal {
5517 polling-delay-passive = <10>;
5519 thermal-sensors = <&tsens0 5>;
5522 trip-point0 {
5528 trip-point1 {
5536 gpuss-1-thermal {
5537 polling-delay-passive = <10>;
5539 thermal-sensors = <&tsens0 6>;
5542 trip-point0 {
5548 trip-point1 {
5556 gpuss-2-thermal {
5557 polling-delay-passive = <10>;
5559 thermal-sensors = <&tsens0 7>;
5562 trip-point0 {
5568 trip-point1 {
5576 audio-thermal {
5577 thermal-sensors = <&tsens0 8>;
5580 trip-point0 {
5586 trip-point1 {
5594 camss-0-thermal {
5595 thermal-sensors = <&tsens0 9>;
5598 trip-point0 {
5604 trip-point1 {
5612 pcie-0-thermal {
5613 thermal-sensors = <&tsens0 10>;
5616 trip-point0 {
5622 trip-point1 {
5630 cpuss-0-0-thermal {
5631 thermal-sensors = <&tsens0 11>;
5634 trip-point0 {
5640 trip-point1 {
5648 aoss-1-thermal {
5649 thermal-sensors = <&tsens1 0>;
5652 trip-point0 {
5658 trip-point1 {
5666 cpu-0-0-1-thermal {
5667 polling-delay-passive = <10>;
5669 thermal-sensors = <&tsens1 1>;
5672 trip-point0 {
5678 trip-point1 {
5686 cpu-0-1-1-thermal {
5687 polling-delay-passive = <10>;
5689 thermal-sensors = <&tsens1 2>;
5692 trip-point0 {
5698 trip-point1 {
5706 cpu-0-2-1-thermal {
5707 polling-delay-passive = <10>;
5709 thermal-sensors = <&tsens1 3>;
5712 trip-point0 {
5718 trip-point1 {
5726 cpu-0-3-1-thermal {
5727 polling-delay-passive = <10>;
5729 thermal-sensors = <&tsens1 4>;
5732 trip-point0 {
5738 trip-point1 {
5746 gpuss-3-thermal {
5747 polling-delay-passive = <10>;
5749 thermal-sensors = <&tsens1 5>;
5752 trip-point0 {
5758 trip-point1 {
5766 gpuss-4-thermal {
5767 polling-delay-passive = <10>;
5769 thermal-sensors = <&tsens1 6>;
5772 trip-point0 {
5778 trip-point1 {
5786 gpuss-5-thermal {
5787 polling-delay-passive = <10>;
5789 thermal-sensors = <&tsens1 7>;
5792 trip-point0 {
5798 trip-point1 {
5806 video-thermal {
5807 thermal-sensors = <&tsens1 8>;
5810 trip-point0 {
5816 trip-point1 {
5824 camss-1-thermal {
5825 thermal-sensors = <&tsens1 9>;
5828 trip-point0 {
5834 trip-point1 {
5842 pcie-1-thermal {
5843 thermal-sensors = <&tsens1 10>;
5846 trip-point0 {
5852 trip-point1 {
5860 cpuss-0-1-thermal {
5861 thermal-sensors = <&tsens1 11>;
5864 trip-point0 {
5870 trip-point1 {
5878 aoss-2-thermal {
5879 thermal-sensors = <&tsens2 0>;
5882 trip-point0 {
5888 trip-point1 {
5896 cpu-1-0-0-thermal {
5897 polling-delay-passive = <10>;
5899 thermal-sensors = <&tsens2 1>;
5902 trip-point0 {
5908 trip-point1 {
5916 cpu-1-1-0-thermal {
5917 polling-delay-passive = <10>;
5919 thermal-sensors = <&tsens2 2>;
5922 trip-point0 {
5928 trip-point1 {
5936 cpu-1-2-0-thermal {
5937 polling-delay-passive = <10>;
5939 thermal-sensors = <&tsens2 3>;
5942 trip-point0 {
5948 trip-point1 {
5956 cpu-1-3-0-thermal {
5957 polling-delay-passive = <10>;
5959 thermal-sensors = <&tsens2 4>;
5962 trip-point0 {
5968 trip-point1 {
5976 nsp-0-0-0-thermal {
5977 polling-delay-passive = <10>;
5979 thermal-sensors = <&tsens2 5>;
5982 trip-point0 {
5988 trip-point1 {
5996 nsp-0-1-0-thermal {
5997 polling-delay-passive = <10>;
5999 thermal-sensors = <&tsens2 6>;
6002 trip-point0 {
6008 trip-point1 {
6016 nsp-0-2-0-thermal {
6017 polling-delay-passive = <10>;
6019 thermal-sensors = <&tsens2 7>;
6022 trip-point0 {
6028 trip-point1 {
6036 nsp-1-0-0-thermal {
6037 polling-delay-passive = <10>;
6039 thermal-sensors = <&tsens2 8>;
6042 trip-point0 {
6048 trip-point1 {
6056 nsp-1-1-0-thermal {
6057 polling-delay-passive = <10>;
6059 thermal-sensors = <&tsens2 9>;
6062 trip-point0 {
6068 trip-point1 {
6076 nsp-1-2-0-thermal {
6077 polling-delay-passive = <10>;
6079 thermal-sensors = <&tsens2 10>;
6082 trip-point0 {
6088 trip-point1 {
6096 ddrss-0-thermal {
6097 thermal-sensors = <&tsens2 11>;
6100 trip-point0 {
6106 trip-point1 {
6114 cpuss-1-0-thermal {
6115 thermal-sensors = <&tsens2 12>;
6118 trip-point0 {
6124 trip-point1 {
6132 aoss-3-thermal {
6133 thermal-sensors = <&tsens3 0>;
6136 trip-point0 {
6142 trip-point1 {
6150 cpu-1-0-1-thermal {
6151 polling-delay-passive = <10>;
6153 thermal-sensors = <&tsens3 1>;
6156 trip-point0 {
6162 trip-point1 {
6170 cpu-1-1-1-thermal {
6171 polling-delay-passive = <10>;
6173 thermal-sensors = <&tsens3 2>;
6176 trip-point0 {
6182 trip-point1 {
6190 cpu-1-2-1-thermal {
6191 polling-delay-passive = <10>;
6193 thermal-sensors = <&tsens3 3>;
6196 trip-point0 {
6202 trip-point1 {
6210 cpu-1-3-1-thermal {
6211 polling-delay-passive = <10>;
6213 thermal-sensors = <&tsens3 4>;
6216 trip-point0 {
6222 trip-point1 {
6230 nsp-0-0-1-thermal {
6231 polling-delay-passive = <10>;
6233 thermal-sensors = <&tsens3 5>;
6236 trip-point0 {
6242 trip-point1 {
6250 nsp-0-1-1-thermal {
6251 polling-delay-passive = <10>;
6253 thermal-sensors = <&tsens3 6>;
6256 trip-point0 {
6262 trip-point1 {
6270 nsp-0-2-1-thermal {
6271 polling-delay-passive = <10>;
6273 thermal-sensors = <&tsens3 7>;
6276 trip-point0 {
6282 trip-point1 {
6290 nsp-1-0-1-thermal {
6291 polling-delay-passive = <10>;
6293 thermal-sensors = <&tsens3 8>;
6296 trip-point0 {
6302 trip-point1 {
6310 nsp-1-1-1-thermal {
6311 polling-delay-passive = <10>;
6313 thermal-sensors = <&tsens3 9>;
6316 trip-point0 {
6322 trip-point1 {
6330 nsp-1-2-1-thermal {
6331 polling-delay-passive = <10>;
6333 thermal-sensors = <&tsens3 10>;
6336 trip-point0 {
6342 trip-point1 {
6350 ddrss-1-thermal {
6351 thermal-sensors = <&tsens3 11>;
6354 trip-point0 {
6360 trip-point1 {
6368 cpuss-1-1-thermal {
6369 thermal-sensors = <&tsens3 12>;
6372 trip-point0 {
6378 trip-point1 {
6388 compatible = "arm,armv8-timer";
6396 compatible = "qcom,pcie-sa8775p";
6403 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
6406 #address-cells = <3>;
6407 #size-cells = <2>;
6410 bus-range = <0x00 0xff>;
6412 dma-coherent;
6414 linux,pci-domain = <0>;
6415 num-lanes = <2>;
6425 interrupt-names = "msi0", "msi1", "msi2", "msi3",
6427 #interrupt-cells = <1>;
6428 interrupt-map-mask = <0 0 0 0x7>;
6429 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
6440 clock-names = "aux",
6446 assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>;
6447 assigned-clock-rates = <19200000>;
6451 interconnect-names = "pcie-mem", "cpu-pcie";
6453 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
6457 reset-names = "pci";
6458 power-domains = <&gcc PCIE_0_GDSC>;
6461 phy-names = "pciephy";
6468 bus-range = <0x01 0xff>;
6470 #address-cells = <3>;
6471 #size-cells = <2>;
6476 pcie0_ep: pcie-ep@1c00000 {
6477 compatible = "qcom,sa8775p-pcie-ep";
6485 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
6494 clock-names = "aux",
6504 interrupt-names = "global", "doorbell", "dma";
6508 interconnect-names = "pcie-mem", "cpu-pcie";
6510 dma-coherent;
6513 reset-names = "core";
6514 power-domains = <&gcc PCIE_0_GDSC>;
6516 phy-names = "pciephy";
6517 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
6518 num-lanes = <2>;
6519 linux,pci-domain = <0>;
6525 compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
6536 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
6539 assigned-clocks = <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>;
6540 assigned-clock-rates = <100000000>;
6543 reset-names = "phy";
6545 #clock-cells = <0>;
6546 clock-output-names = "pcie_0_pipe_clk";
6548 #phy-cells = <0>;
6554 compatible = "qcom,pcie-sa8775p";
6561 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
6564 #address-cells = <3>;
6565 #size-cells = <2>;
6568 bus-range = <0x00 0xff>;
6570 dma-coherent;
6572 linux,pci-domain = <1>;
6573 num-lanes = <4>;
6583 interrupt-names = "msi0", "msi1", "msi2", "msi3",
6585 #interrupt-cells = <1>;
6586 interrupt-map-mask = <0 0 0 0x7>;
6587 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
6598 clock-names = "aux",
6604 assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
6605 assigned-clock-rates = <19200000>;
6609 interconnect-names = "pcie-mem", "cpu-pcie";
6611 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
6615 reset-names = "pci";
6616 power-domains = <&gcc PCIE_1_GDSC>;
6619 phy-names = "pciephy";
6626 bus-range = <0x01 0xff>;
6628 #address-cells = <3>;
6629 #size-cells = <2>;
6634 pcie1_ep: pcie-ep@1c10000 {
6635 compatible = "qcom,sa8775p-pcie-ep";
6643 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
6652 clock-names = "aux",
6662 interrupt-names = "global", "doorbell", "dma";
6666 interconnect-names = "pcie-mem", "cpu-pcie";
6668 dma-coherent;
6671 reset-names = "core";
6672 power-domains = <&gcc PCIE_1_GDSC>;
6674 phy-names = "pciephy";
6675 max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
6676 num-lanes = <4>;
6677 linux,pci-domain = <1>;
6683 compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
6694 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
6697 assigned-clocks = <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>;
6698 assigned-clock-rates = <100000000>;
6701 reset-names = "phy";
6703 #clock-cells = <0>;
6704 clock-output-names = "pcie_1_pipe_clk";
6706 #phy-cells = <0>;